1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 * 25 * Inter-Domain Network 26 */ 27 28 #ifndef _SYS_IDN_H 29 #define _SYS_IDN_H 30 31 #ifndef _ASM 32 33 #ifdef _KERNEL 34 35 #include <sys/note.h> 36 37 #include <sys/cmn_err.h> 38 #include <sys/dditypes.h> 39 #include <sys/stream.h> 40 #include <sys/machsystm.h> 41 #include <sys/ethernet.h> 42 #include <sys/dlpi.h> 43 #include <sys/time.h> 44 #include <sys/kmem.h> 45 #include <sys/atomic.h> 46 #include <sys/cpuvar.h> 47 48 #include <sys/idn_sigb.h> 49 #include <sys/idn_smr.h> 50 #endif /* _KERNEL */ 51 52 #ifdef __cplusplus 53 extern "C" { 54 #endif 55 56 typedef const char * const procname_t; 57 58 #define MB2B(m) ((size_t)(m) << 20) /* MBytes to Bytes */ 59 #define B2MB(b) ((uint_t)((b) >> 20)) /* Bytes to MBytes */ 60 61 #ifdef _KERNEL 62 63 /* 64 * IDN_PROP_SMRSIZE - User specified size in MBytes. 65 * IDN_PROP_SMRADDR - OBP's internal physical address of the region. 66 * 67 * OBP properties of "memory" node that define the SMR space. 68 */ 69 #define IDN_PROP_SMRSIZE "idn-smr-size" 70 #define IDN_PROP_SMRADDR "idn-smr-addr" 71 72 /* 73 * IDN_AWOLMSG_INTERVAL (driver.conf) 74 * 75 * Number of seconds between AWOL messages on a per-domain basis. 76 * The purpose is to throttle the frequency at which these 77 * messages appear. 78 * 79 * IDN_MSGWAIT_NEGO (driver.conf) 80 * IDN_MSGWAIT_CFG 81 * IDN_MSGWAIT_CON 82 * IDN_MSGWAIT_FIN 83 * IDN_MSGWAIT_CMD 84 * IDN_MSGWAIT_DATA 85 * 86 * Number of seconds to wait for response to respective 87 * message type. 88 * 89 * IDN_RETRYFREQ_NEGO (driver.conf) 90 * IDN_RETRYFREQ_CON 91 * IDN_RETRYFREQ_FIN 92 * 93 * Number of seconds to wait between retries of the respective 94 * message type. 95 * 96 * IDN_SMR_ALIGN (not tunable) 97 * 98 * The hardware registers that describe the SMR are based on a 64K 99 * aligned physical address. 100 * 101 * IDN_SMR_SIZE (OBP [only]) 102 * 103 * Total size of the SMR (Shared Memory Region) in bytes. 104 * 105 * IDN_NWR_SIZE (driver.conf) 106 * 107 * Total size of the NWR (NetWork Region) portion of the SMR which 108 * is actually used to support network activity. The NWR is managed 109 * as simply a pool of I/O buffers which are distributed by the 110 * Master domain to the Slaves for the purpose of communicating 111 * between each other. If not set then the entire SMR is used 112 * as the NWR. 113 * Req: IDN_NWR_SIZE <= IDN_SMR_SIZE 114 * 115 * IDN_SMR_BUFSIZE (driver.conf) 116 * 117 * Size of individual SMR buffers. The SMR is divided into chunks 118 * of IDN_SMR_BUFSIZE bytes. The IDN_MTU is based on this size 119 * and thus the IDN_SMR_BUFSIZE should be chosen based on performance. 120 * 121 * IDN_DATA_SIZE (NOT tunable) 122 * 123 * Portion of IDN_SMR_BUFSIZE that can contain raw non-IDN dependent 124 * data. We subtract IDN_ALIGNSIZE bytes to allow for fast bcopy 125 * alignment. 126 * Req: IDN_DATA_SIZE <= 127 * (IDN_SMR_BUFSIZE - sizeof (smr_pkthdr_t) - IDN_ALIGNSIZE) 128 * 129 * IDN_MTU (indirectly tunable via IDN_SMR_BUFSIZE) 130 * 131 * This size represents the portion of an SMR I/O buffers that can 132 * contain (ethernet headerless) data. 133 * Req: IDN_MTU <= IDN_DATA_SIZE - sizeof (ether_header) 134 * 135 * IDN_WINDOW_MAX (driver.conf) 136 * 137 * Maximum number of outstanding packets that are allowed per 138 * domain. If this value is exceeded for a particular domain 139 * no further I/Os will be transmitted to that domain until it 140 * has acknowledged enough of the previous transmission to bring 141 * down its outstanding I/O count (idn_domain.dio) below this 142 * value. In addition, if this value is exceeded then a Timer 143 * is scheduled to check for any response from the remote domain. 144 * 145 * IDN_WINDOW_INCR (driver.conf) 146 * 147 * As more channels/nets are activated on a particular domain 148 * the greater the number of possible outstanding data packets 149 * that can be outstanding to a given domain. Since this natural 150 * occurence can result in the outstanding-I/O count to a given 151 * domain to increase we run the risk of dropping into the 152 * IDN_WINDOW_MAX region even though the receiving domain 153 * may be fine with handling the load. In order to compensate 154 * for this increased activity and to not incur unjustified 155 * slips into the IDN_WINDOW_MAX region, the IDN_WINDOW_MAX 156 * value is adjusted by IDN_WINDOW_INCR for each channel/net 157 * that is activated for a given domain. 158 * 159 * IDN_WINDOW_EMAX (not tunable) 160 * 161 * The effective value of IDN_WINDOW_MAX once it has 162 * been adjusted by IDN_WINDOW_INCR. 163 * 164 * IDN_RECLAIM_MIN (driver.conf) 165 * 166 * Minimum number of outstanding packets that our allowed 167 * before subsequent sends will attempt to reclaim some number 168 * of outstanding data packets. 169 * 170 * IDN_RECLAIM_MAX (driver.conf) 171 * This value represents the maximum number of outstanding 172 * packets we will try to reclaim during a send once we've 173 * passed the IDN_RECLAIM_MIN boundary. 174 * 175 * IDN_MODUNLOADABLE (ndd) 176 * 177 * By default the IDN driver is unloadable. Setting this 178 * variable will allow the IDN driver to be unloaded provided 179 * it's not in use. 180 * 181 * IDN_LOWAT/IDN_HIWAT (driver.conf) 182 * 183 * Low/High water marks for the STREAM interface to IDN. 184 * 185 * IDN_MBOX_PER_NET (driver.conf) 186 * 187 * Number of mailbox entries that are allocated per channel/net. 188 * This value effectively represents the amount of outstanding 189 * activity that can reside at a domain. Increasing this value 190 * allows more packets to be in transit to a domain, however 191 * at some point there are diminishing returns since the receiver 192 * can only consume packets so fast. 193 * 194 * IDN_MAX_NETS (driver.conf) 195 * 196 * Maximum number of network interfaces (channels) that IDN 197 * is currently configured to allow. The absolute max is 198 * IDN_MAXMAX_NETS. We don't automatically default IDN_MAX_NETS 199 * to IDN_MAXMAX_NETS because it would mean wasted space in 200 * the mailbox region having to reserve mailboxes that will 201 * very likely go unused. The smaller this value the fewer 202 * the number of mailboxes in the SMR and thus the greater the 203 * number of possible I/O buffers available. 204 * Req: IDN_MAX_NETS <= IDN_MAXMAX_NETS 205 * 206 * IDN_CHECKSUM (driver.conf) 207 * 208 * If enabled, IDN validates the smr_pkthdr_t of incoming packets 209 * via a checksum, and calculates the checksum for outgoing packets. 210 * Only the first 3 fields of smr_pkthdr_t are checksummed and 211 * must be set to their expected values prior to calculating the 212 * checksum. Turned OFF by default when compiled DEBUG. 213 * 214 * IDN_SMR_MAXSIZE (not tunable) 215 * 216 * The absolute maximum size of the SMR region that we'll allow. 217 * Note that the virtual address space comes out kernelmap. 218 */ 219 #define IDN_AWOLMSG_INTERVAL 60 /* seconds */ 220 #define IDN_MSGWAIT_NEGO 20 /* seconds */ 221 #define IDN_MSGWAIT_CFG 40 222 #define IDN_MSGWAIT_CON 20 223 #define IDN_MSGWAIT_FIN 40 224 #define IDN_MSGWAIT_CMD 40 225 #define IDN_MSGWAIT_DATA 30 226 #define IDN_RETRYFREQ_NEGO 2 227 #define IDN_RETRYFREQ_CON 2 228 #define IDN_RETRYFREQ_FIN 3 229 230 #define IDN_SMR_BUFSIZE_MIN 512 231 #define IDN_SMR_BUFSIZE_MAX (512*1024) 232 #define IDN_SMR_BUFSIZE_DEF (16*1024) 233 234 #define IDN_SMR_SHIFT (16) 235 #define IDN_SMR_ALIGN (1 << IDN_SMR_SHIFT) /* 64K */ 236 #define IDN_SMR_SIZE idn_smr_size 237 #define IDN_NWR_SIZE idn_nwr_size 238 #define IDN_SMR_BUFSIZE idn_smr_bufsize 239 #define IDN_DATA_SIZE (IDN_SMR_BUFSIZE \ 240 - sizeof (smr_pkthdr_t) \ 241 - IDN_ALIGNSIZE) 242 #define IDN_MTU (IDN_DATA_SIZE - sizeof (struct ether_header)) 243 #define IDN_WINDOW_MAX idn_window_max 244 #define IDN_WINDOW_INCR idn_window_incr 245 #define IDN_WINDOW_EMAX idn_window_emax 246 #define IDN_RECLAIM_MIN idn_reclaim_min 247 #define IDN_RECLAIM_MAX idn_reclaim_max 248 #define IDN_MODUNLOADABLE idn_modunloadable 249 #define IDN_LOWAT idn_lowat 250 #define IDN_HIWAT idn_hiwat 251 #define IDN_MBOX_PER_NET idn_mbox_per_net 252 #define IDN_MAX_NETS idn_max_nets 253 #define IDN_CHECKSUM idn_checksum 254 #define IDN_SMR_MAXSIZE 96 255 #define _IDN_SMR_SIZE 32 /* 32M */ 256 #define _IDN_NWR_SIZE _IDN_SMR_SIZE /* 32M */ 257 #define _IDN_SMR_BUFSIZE (16 * 1024) /* 16K */ 258 259 260 #define IDN_TUNEVAR_NAME(v) (*(char **)((ulong_t)&(v)+(sizeof (ulong_t)))) 261 #define IDN_TUNEVAR_VALUE(v) (v) 262 263 /* 264 * History structure to support problem analysis. 265 */ 266 #define IDN_HISTORY_NUM 1024 267 #define IDN_HISTORY_LOG(op, d0, d1, d2) \ 268 if (idn_history) { \ 269 mutex_enter(&idnhlog.h_mutex); \ 270 idnhlog.h_log[idnhlog.h_index].e_time = TIMESTAMP(); \ 271 idnhlog.h_log[idnhlog.h_index].e_op = (ushort_t)(op); \ 272 idnhlog.h_log[idnhlog.h_index].e_data[0] = (ushort_t)(d0); \ 273 idnhlog.h_log[idnhlog.h_index].e_data[1] = (ushort_t)(d1); \ 274 idnhlog.h_log[idnhlog.h_index].e_data[2] = (ushort_t)(d2); \ 275 idnhlog.h_index++; \ 276 idnhlog.h_index &= (IDN_HISTORY_NUM - 1); \ 277 mutex_exit(&idnhlog.h_mutex); \ 278 } 279 280 #define IDNH_GSTATE 0x0001 /* d0=gstate, d1=, d2= */ 281 #define IDNH_DSTATE 0x0002 /* d0=domid, d1=dstate, d2=cpuid */ 282 #define IDNH_AWOL 0x0003 /* d0=domid, d1=dstate, d2=cpuid */ 283 #define IDNH_MASTERID 0x0004 /* d0=masterid, d1=oldid, d2= */ 284 #define IDNH_NEGO 0x0005 /* d0=domid, d1=ds_trans_on, d2=ds_connected */ 285 #define IDNH_FIN 0x0006 /* d0=domid, d1=finstate, d2= */ 286 #define IDNH_RELINK 0x0007 /* d0=domid, d1=dstate, d2=ds_relink */ 287 288 struct idn_h_entry { 289 hrtime_t e_time; 290 ushort_t e_op; 291 ushort_t e_data[3]; 292 }; 293 294 struct idn_history { 295 kmutex_t h_mutex; 296 int h_index; 297 struct idn_h_entry h_log[IDN_HISTORY_NUM]; 298 }; 299 #endif /* _KERNEL */ 300 301 /* 302 * IDN_SIGBPIL - Interrupt level at which IDN driver 303 * wakes up idn_sigbhandler_thread 304 */ 305 #define IDN_SIGBPIL PIL_3 306 307 /* 308 * Definition of sigbintr.sb_busy values which 309 * represents state of idn_sigbhandler. 310 */ 311 #define IDNSIGB_NOTREADY ((uchar_t)0) 312 #define IDNSIGB_INACTIVE ((uchar_t)1) 313 #define IDNSIGB_STARTED ((uchar_t)2) 314 #define IDNSIGB_ACTIVE ((uchar_t)3) 315 #define IDNSIGB_DIE ((uchar_t)4) 316 317 /* 318 * Some Xfire based macros that assume 4 cpus per board. 319 */ 320 #define CPUID_TO_BOARDID(c) ((c) >> 2) 321 #define MAX_CPU_PER_BRD 4 322 #define CPUSET_TO_BOARDSET(cset, bset) \ 323 { \ 324 register int c, b; \ 325 (bset) = 0; \ 326 for (b = 0; b < MAX_BOARDS; b++) \ 327 for (c = 0; c < MAX_CPU_PER_BRD; c++) \ 328 if (CPU_IN_SET((cset), \ 329 (b * MAX_CPU_PER_BRD) + c)) \ 330 (bset) |= 1 << b; \ 331 } 332 333 /* 334 * Macros to manipulate boardset and domainset masks. 335 */ 336 typedef ushort_t boardset_t; /* assumes max of 16 boards */ 337 typedef ushort_t domainset_t; /* assumes max of 16 domains */ 338 339 #define BOARDSET(brd) ((boardset_t)(1 << (brd))) 340 #define BOARDSET_ALL ((boardset_t)~0) 341 #define BOARD_IN_SET(set, brd) ((set) & BOARDSET(brd)) 342 #define BOARDSET_ADD(set, brd) ((set) |= BOARDSET(brd)) 343 #define BOARDSET_DEL(set, brd) ((set) &= ~BOARDSET(brd)) 344 #define DOMAINSET(d) ((domainset_t)1 << (d)) 345 #define DOMAINSET_ALL ((domainset_t)~0) 346 #define DOMAIN_IN_SET(s, d) ((s) & DOMAINSET(d)) 347 #define DOMAINSET_ADD(s, d) ((s) |= DOMAINSET(d)) 348 #define DOMAINSET_DEL(s, d) ((s) &= ~DOMAINSET(d)) 349 350 /* 351 * PFN_TO_SMADDR macro converts a PFN to a IDN_SMR_ALIGN'ed 352 * address suitable for the CIC bar/lar registers. 353 */ 354 #if (IDN_SMR_SHIFT <= MMU_PAGESHIFT) 355 #define PFN_TO_SMADDR(pfn) ((pfn) << (MMU_PAGESHIFT - IDN_SMR_SHIFT)) 356 #else 357 #define PFN_TO_SMADDR(pfn) ((pfn) >> (IDN_SMR_SHIFT - MMU_PAGESHIFT)) 358 #endif 359 360 /* 361 * Translate a physical address to a unique domain identifier. 362 * IMPORTANT - Assumes each board's memory is configured on a 8GB 363 * boundary. PA(8G) = PFN(1M). 364 */ 365 #define MEM8G_SHIFT 33 /* (1 << 33) == 8G */ 366 #define PADDR_TO_DOMAINID(paddr) ((int)((paddr) >> MEM8G_SHIFT) & 0xf) 367 368 #define VALID_NWROFFSET(off, align) \ 369 (((uint_t)(off) >= 0) && \ 370 ((size_t)(off) < MB2B(IDN_NWR_SIZE)) && \ 371 !((uint_t)(off) & ((align) - 1))) 372 #define VALID_NWRADDR(addr, align) \ 373 (((caddr_t)(addr) >= idn.smr.vaddr) && \ 374 VALID_NWROFFSET(((caddr_t)(addr) - idn.smr.vaddr), (align))) 375 #define VALID_DOMAINID(d) (((d) >= 0) && ((d) < MAX_DOMAINS)) 376 #define VALID_UDOMAINID(d) ((d) < MAX_DOMAINS) 377 #define VALID_CPUID(c) (((c) >= 0) && ((c) < NCPU)) 378 #define VALID_CHANNEL(c) (((c) >= 0) && ((c) < IDN_MAX_NETS)) 379 #define VALID_UCHANNEL(c) ((c) < IDN_MAX_NETS) 380 381 /* 382 * The following are bit values of idn_debug, currently 383 * only useful if compiled with DEBUG. 384 */ 385 #ifdef DEBUG 386 #define STRING(sss) char sss[20] 387 #define INUM2STR(mm, ss) inum2str((mm), (ss)) 388 389 #define IDNDBG_XDC 0x00000001 390 #define IDNDBG_XF 0x00000002 391 #define IDNDBG_REGS 0x00000004 392 #define IDNDBG_SMR 0x00000008 393 #define IDNDBG_PROTO 0x00000010 394 #define IDNDBG_STR 0x00000020 395 #define IDNDBG_DRV 0x00000040 396 #define IDNDBG_DATA 0x00000080 397 #define IDNDBG_STATE 0x00000100 398 #define IDNDBG_DLPI 0x00000200 399 #define IDNDBG_KERN 0x00000400 400 #define IDNDBG_ALLOC 0x00000800 401 #define IDNDBG_REMAP 0x00001000 402 #define IDNDBG_TIMER 0x00002000 403 #define IDNDBG_CHAN 0x00004000 404 #define IDNDBG_AWOL 0x00008000 405 #define IDNDBG_SYNC 0x00010000 406 #define _IDNDBG_UNUSED0 0x00020000 407 #define IDNDBG_HITLIST 0x00040000 408 #define IDNDBG_XMON 0x00080000 409 #define IDNDBG_TEST 0x80000000 410 #define IDNDBG_ALL ((uint_t)-1) 411 412 #define PR_ALL if (idn_debug) printf 413 #define PR_XDC if (idn_debug & IDNDBG_XDC) printf 414 #define PR_XF if (idn_debug & IDNDBG_XF) printf 415 #define PR_REGS if (idn_debug & IDNDBG_REGS) printf 416 #define PR_SMR if (idn_debug & IDNDBG_SMR) printf 417 #define PR_PROTO if (idn_debug & IDNDBG_PROTO) printf 418 #define PR_STR if (idn_debug & IDNDBG_STR) printf 419 #define PR_DRV if (idn_debug & IDNDBG_DRV) printf 420 #define PR_DATA if (idn_debug & IDNDBG_DATA) printf 421 #define PR_STATE if (idn_debug & IDNDBG_STATE) printf 422 #define PR_DLPI if (idn_debug & IDNDBG_DLPI) printf 423 #define PR_KERN if (idn_debug & IDNDBG_KERN) printf 424 #define PR_ALLOC if (idn_debug & IDNDBG_ALLOC) printf 425 #define PR_REMAP if (idn_debug & (IDNDBG_SMR|IDNDBG_REMAP)) printf 426 #define PR_TIMER if (idn_debug & IDNDBG_TIMER) printf 427 #define PR_CHAN if (idn_debug & IDNDBG_CHAN) printf 428 #define PR_AWOL if (idn_debug & (IDNDBG_PROTO|IDNDBG_AWOL)) printf 429 #define PR_SYNC if (idn_debug & IDNDBG_SYNC) printf 430 #define _PR_UNUSED0 if (idn_debug & _IDNDBG_UNUSED0) printf 431 #define PR_HITLIST if (idn_debug & IDNDBG_HITLIST) printf 432 #define PR_XMON if (idn_debug & IDNDBG_XMON) printf 433 #define PR_TEST if (idn_debug & IDNDBG_TEST) printf 434 #else 435 #define STRING(sss) char *sss = "" 436 #define INUM2STR(mm, ss) 437 438 #define PR_ALL if (0) printf 439 #define PR_XDC PR_ALL 440 #define PR_XF PR_ALL 441 #define PR_REGS PR_ALL 442 #define PR_SMR PR_ALL 443 #define PR_PROTO PR_ALL 444 #define PR_STR PR_ALL 445 #define PR_DRV PR_ALL 446 #define PR_DATA PR_ALL 447 #define PR_STATE PR_ALL 448 #define PR_DLPI PR_ALL 449 #define PR_KERN PR_ALL 450 #define PR_ALLOC PR_ALL 451 #define PR_REMAP PR_ALL 452 #define PR_TIMER PR_ALL 453 #define PR_CHAN PR_ALL 454 #define PR_AWOL PR_ALL 455 #define PR_SYNC PR_ALL 456 #define PR_SNOOP PR_ALL 457 #define PR_HITLIST PR_ALL 458 #define PR_XMON PR_ALL 459 #define PR_TEST PR_ALL 460 #endif /* DEBUG */ 461 462 #ifdef _KERNEL 463 /* 464 * IDN drivers fields. 465 * 466 * IDNMINPSZ Minimum packet size the IDN supports. 467 * 468 * IDNMAXPSZ Maximum packet size that IDN supports from upper 469 * layers. Is equal to IDN_MTU + ether_header. Note 470 * that the IDN driver could support larger packets 471 * however the infrastructure to support fragmentation 472 * does not (and should not) exist with respect to 473 * ethernet packet types. 474 */ 475 #ifdef DEBUG 476 #define IDNDESC "Inter-Domain Network (DEBUG)" 477 #else 478 #define IDNDESC "Inter-Domain Network" 479 #endif /* DEBUG */ 480 481 #define IDNIDNUM 8264 482 #define IDNNAME "idn" 483 #define IDNMINPSZ 0 /* set at idnopen() */ 484 #define IDNMAXPSZ 0 /* set at idnopen() */ 485 486 #endif /* _KERNEL */ 487 488 /* 489 * IDN Global States. 490 */ 491 typedef enum { 492 /* 0 */ IDNGS_OFFLINE = 0, /* idle */ 493 /* 1 */ IDNGS_CONNECT, /* connecting initial domain */ 494 /* 2 */ IDNGS_ONLINE, /* master selected */ 495 /* 3 */ IDNGS_DISCONNECT, /* local is unlinking */ 496 /* 4 */ IDNGS_RECONFIG, /* selecting new master */ 497 /* 5 */ _IDNGS_UNUNSED5, 498 /* 6 */ _IDNGS_UNUNSED6, 499 /* 7 */ _IDNGS_UNUNSED7, 500 /* 8 */ _IDNGS_UNUNSED8, 501 /* 9 */ _IDNGS_UNUNSED9, 502 /* 10 */ IDNGS_IGNORE /* ignore requests (fault injection) */ 503 } idn_gstate_t; 504 505 #ifdef _KERNEL 506 507 #define TIMESTAMP() (gethrtime() / 1000000ull) 508 509 /* 510 * Spaced defined in: 511 * sigblkp[cpu0.cpu_id]->sigb_idn.reserved1. 512 */ 513 #define IDNSB_GSTATE_NEW 0 514 #define IDNSB_GSTATE_OLD 1 515 #define IDNSB_MASTERCPU 2 516 #define IDNSB_RESERVED 3 517 518 #define IDNSB_HWCHKPT_MAX 4 519 520 #define IDNSB_SIZE 72 521 /* 522 * This structure gets overlay onto: 523 * sigblkp[cpu0.cpu_id]->sigb_idn.reserved1. 524 * 525 * This structure must be exactly IDNSB_SIZE bytes. 526 */ 527 typedef struct idnsb { 528 uchar_t id_gstate; 529 uchar_t id_pgstate; 530 uchar_t id_master_board; 531 uchar_t id_pmaster_board; 532 533 uchar_t reserved_DO_NOT_USE[24]; /* idnevent_t field */ 534 535 struct { 536 uchar_t d_board; 537 uchar_t d_state; 538 } id_status[MAX_DOMAINS]; 539 uint_t id_hwstate; 540 ushort_t id_hwchkpt[IDNSB_HWCHKPT_MAX]; 541 } idnsb_t; /* sizeof = 72 (0x48) 18X bytes */ 542 543 544 #define IDNSB_DOMAIN_UPDATE(dp) \ 545 { \ 546 mutex_enter(&idn.idnsb_mutex); \ 547 if (idn.idnsb) { \ 548 int domid = (dp)->domid; \ 549 if ((dp)->dcpu == IDN_NIL_DCPU) \ 550 idn.idnsb->id_status[domid].d_board = \ 551 (uchar_t)0xff; \ 552 else if ((dp)->dvote.v.board == 0) \ 553 idn.idnsb->id_status[domid].d_board = \ 554 (uchar_t)CPUID_TO_BOARDID((dp)->dcpu); \ 555 else \ 556 idn.idnsb->id_status[domid].d_board = \ 557 (uchar_t)(dp)->dvote.v.board; \ 558 idn.idnsb->id_status[domid].d_state = \ 559 (uchar_t)(dp)->dstate; \ 560 } \ 561 mutex_exit(&idn.idnsb_mutex); \ 562 } 563 /* 564 * The following definitions and macros pertain to the 565 * id_hwstate and id_hwchkpt[] fields. 566 * 567 * id_hwstate (m = mark: 1=open, 2=close) 568 * 0 1 2 3 4 5 6 7 569 * --------------------------------- 570 * | m | m | m | m | XX unused XXX | 571 * --------------------------------- 572 * | | | | 573 * | | | +- CACHE 574 * | | +- CHAN 575 * | +- LINK 576 * +- SMR 577 * 578 * Note that nibble 4 is used in DEBUG for noting cache 579 * flush progress through idnxf_flushall_ecache(). This 580 * will override id_hwchkpt[] since it only has room for 581 * 4 items, however the BBSRAM space is there and 582 * unofficially available :-o 583 * 584 * id_hwchkpt[0] = SMR boardset 585 * id_hwchkpt[1] = LINK boardset 586 * id_hwchkpt[2] = CHAN boardset 587 * id_hwchkpt[3] = CACHE boardset. 588 */ 589 #define IDNSB_CHKPT_SMR 0 590 #define IDNSB_CHKPT_LINK 1 591 #define IDNSB_CHKPT_CHAN 2 592 #define IDNSB_CHKPT_CACHE 3 593 #define IDNSB_CHKPT_UNUSED 4 /* This is the max you can have */ 594 595 #define _CHKPT_MARKIT(item, mark) \ 596 { \ 597 uint_t mk = (((uint_t)((mark) & 0xf)) << \ 598 (((sizeof (uint_t) << 1) - 1 - (item)) << 2)); \ 599 uint_t *sp = &idn.idnsb->id_hwstate; \ 600 ASSERT(idn.idnsb); \ 601 *sp &= ~(((uint_t)0xf) << (((sizeof (uint_t) << 1) \ 602 - 1 - (item)) << 2)); \ 603 *sp |= mk; \ 604 } 605 606 #define CHECKPOINT_OPENED(item, bset, mark) \ 607 { \ 608 mutex_enter(&idn.idnsb_mutex); \ 609 if (idn.idnsb) { \ 610 ushort_t *sp = &idn.idnsb->id_hwchkpt[0]; \ 611 _CHKPT_MARKIT((item), (mark)); \ 612 sp[item] |= ((ushort_t)(bset)); \ 613 } \ 614 mutex_exit(&idn.idnsb_mutex); \ 615 } 616 617 #define CHECKPOINT_CLOSED(item, bset, mark) \ 618 { \ 619 mutex_enter(&idn.idnsb_mutex); \ 620 if (idn.idnsb) { \ 621 ushort_t *sp = &idn.idnsb->id_hwchkpt[0]; \ 622 _CHKPT_MARKIT((item), (mark)); \ 623 sp[item] &= (ushort_t)~(bset); \ 624 } \ 625 mutex_exit(&idn.idnsb_mutex); \ 626 } 627 628 #define CHECKPOINT_CLEAR(item, mark) \ 629 { \ 630 mutex_enter(&idn.idnsb_mutex); \ 631 if (idn.idnsb) { \ 632 ushort_t *sp = &idn.idnsb->id_hwchkpt[0]; \ 633 _CHKPT_MARKIT((item), (mark)); \ 634 sp[item] = 0; \ 635 } \ 636 mutex_exit(&idn.idnsb_mutex); \ 637 } 638 #ifdef DEBUG 639 #define CHECKPOINT_CACHE_CLEAR_DEBUG(mark) \ 640 CHECKPOINT_CLEAR(IDNSB_CHKPT_UNUSED, (mark)) 641 #define CHECKPOINT_CACHE_STEP_DEBUG(bset, mark) \ 642 CHECKPOINT_OPENED(IDNSB_CHKPT_UNUSED, (bset), (mark)) 643 #else 644 #define CHECKPOINT_CACHE_CLEAR_DEBUG(mark) 645 #define CHECKPOINT_CACHE_STEP_DEBUG(bset, mark) 646 #endif /* DEBUG */ 647 648 649 #ifdef DEBUG 650 #define IDN_GSTATE_TRANSITION(ns) \ 651 { \ 652 hrtime_t tstamp; \ 653 /*LINTED*/ \ 654 IDN_HISTORY_LOG(IDNH_GSTATE, (ns), 0, 0); \ 655 tstamp = TIMESTAMP(); \ 656 ASSERT(IDN_GLOCK_IS_EXCL()); \ 657 PR_STATE("GSTATE:%ld: (l=%d) %s(%d) -> %s(%d)\n", \ 658 (uint64_t)tstamp, __LINE__, \ 659 idngs_str[idn.state], idn.state, \ 660 idngs_str[ns], (ns)); \ 661 mutex_enter(&idn.idnsb_mutex); \ 662 if (idn.idnsb) { \ 663 idn.idnsb->id_pgstate = (uchar_t)idn.state; \ 664 idn.idnsb->id_gstate = (uchar_t)(ns); \ 665 } \ 666 mutex_exit(&idn.idnsb_mutex); \ 667 idn.state = (ns); \ 668 } 669 #else 670 #define IDN_GSTATE_TRANSITION(ns) \ 671 { \ 672 IDN_HISTORY_LOG(IDNH_GSTATE, (ns), 0, 0); \ 673 mutex_enter(&idn.idnsb_mutex); \ 674 if (idn.idnsb) { \ 675 idn.idnsb->id_pgstate = (uchar_t)idn.state; \ 676 idn.idnsb->id_gstate = (uchar_t)(ns); \ 677 } \ 678 mutex_exit(&idn.idnsb_mutex); \ 679 idn.state = (ns); \ 680 } 681 #endif /* DEBUG */ 682 683 /* 684 * IDN link/unlink operations occur asynchronously with respect to the 685 * caller. The following definitions are to support the return of 686 * success/failure back to the original requesting thread. It's 687 * unlikely to have multiple outstanding link/unlink requests so we 688 * just provide a very small cache of waiting list entries. If the 689 * cache becomes exhausted then additional ones are kmem_alloc'd. 690 */ 691 #define IDNOP_CACHE_SIZE 3 692 #define IDNOP_IN_CACHE(dwl) \ 693 (((dwl) >= &idn.dopers->_dop_wcache[0]) && \ 694 ((dwl) < &idn.dopers->_dop_wcache[IDNOP_CACHE_SIZE])) 695 696 typedef struct dop_waitlist { 697 struct dop_waitlist *dw_next; 698 domainset_t dw_reqset; 699 domainset_t dw_domset; 700 short dw_op; 701 domainset_t dw_errset; 702 idnsb_error_t *dw_idnerr; 703 short dw_errors[MAX_DOMAINS]; 704 } dop_waitlist_t; 705 706 typedef uint_t idn_xdcargs_t[4]; 707 typedef uint_t idn_chanset_t; 708 709 /* 710 * Types of synchronization zones which a connection 711 * could be in. 712 */ 713 typedef enum { 714 IDNSYNC_NIL, 715 IDNSYNC_CONNECT, 716 IDNSYNC_DISCONNECT 717 } idn_synccmd_t; 718 719 /* 720 * Type of sync-registration that is being requested. 721 */ 722 typedef enum { 723 IDNSYNC_REG_REG, 724 IDNSYNC_REG_NEW, 725 IDNSYNC_REG_QUERY 726 } idn_syncreg_t; 727 728 #define IDN_SYNC_NUMZONE 3 729 #define IDN_SYNC_GETZONE(s) ((((s) != IDNSYNC_CONNECT) && \ 730 ((s) != IDNSYNC_DISCONNECT)) ? \ 731 -1 : (int)(s) - 1) 732 #define IDN_SYNC_GETTRANS(s) (((s) == IDNSYNC_CONNECT) ? \ 733 idn.domset.ds_trans_on : \ 734 ((s) == IDNSYNC_DISCONNECT) ? \ 735 idn.domset.ds_trans_off : 0) 736 737 /* 738 * Generic states when in a state transition region. 739 * These ultimately map to domain states via 740 * a idn_xphase_t definition. General model: 741 * 742 * PEND 743 * /\ 744 * / \ 745 * | | 746 * V V 747 * SENT--->RCVD 748 * \ / 749 * \ / 750 * VV 751 * FINAL 752 * 753 * Start these types with PEND = 0 so that they're 754 * compatible with idnxs_state_table[] and idn_xphase_t 755 * phases that use the value as an index. 756 */ 757 typedef enum { 758 /* 0 */ IDNXS_PEND = 0, 759 /* 1 */ IDNXS_SENT, 760 /* 2 */ IDNXS_RCVD, 761 /* 3 */ IDNXS_FINAL, 762 /* 4 */ IDNXS_NIL 763 } idn_xstate_t; 764 765 /* 766 * Locking protocol: 767 * 768 * Each routine is called with SYNC_LOCK and 769 * the respective domain's DLOCK(EXCL) held. 770 * The routines must return with these locks 771 * still held. 772 */ 773 struct idn_msgtype; 774 775 typedef struct { 776 int t_state; 777 int (*t_check)(int domid, struct idn_msgtype *mtp, 778 idn_xdcargs_t xargs); 779 void (*t_action)(int domid, struct idn_msgtype *mtp, 780 idn_xdcargs_t xargs); 781 void (*t_error)(int domid, struct idn_msgtype *mtp, 782 idn_xdcargs_t xargs); 783 } idn_trans_t; 784 785 /* 786 * The callback routines (xt_final & xt_exit) are called with 787 * DLOCK and SYNC_LOCK held and they are required to return 788 * with these locks still held. 789 */ 790 typedef struct { 791 uint_t xt_msgtype; 792 idn_trans_t xt_trans[4]; 793 void (*xt_final)(int domid); 794 void (*xt_exit)(int domid, uint_t msgtype); 795 } idn_xphase_t; 796 797 /* 798 * Synchronization entry representing the synchronization 799 * state with respect to a given domain for a given zone. 800 */ 801 typedef struct idn_syncop { 802 struct idn_syncop *s_next; 803 int s_domid; 804 idn_synccmd_t s_cmd; 805 int s_msg; 806 807 domainset_t s_set_exp; 808 domainset_t s_set_rdy; 809 int (*s_transfunc)(int domid, void *arg); 810 void *s_transarg; 811 #ifdef DEBUG 812 int s_query[MAX_DOMAINS]; 813 #endif /* DEBUG */ 814 } idn_syncop_t; 815 816 #ifdef DEBUG 817 #define IDN_SYNC_QUERY_INIT(d) \ 818 (bzero((caddr_t)idn_domain[d].dsync.s_query, \ 819 sizeof (idn_domain[d].dsync.s_query))) 820 #define IDN_SYNC_QUERY_UPDATE(md, sd) (idn_domain[md].dsync.s_query[sd]++) 821 #else /* DEBUG */ 822 #define IDN_SYNC_QUERY_INIT(d) 823 #define IDN_SYNC_QUERY_UPDATE(md, sd) 824 #endif /* DEBUG */ 825 826 typedef struct { 827 idn_syncop_t *sc_op; 828 int sc_cnt; 829 } idn_synczone_t; 830 831 #endif /* _KERNEL */ 832 833 /* 834 * Vote Ticket used during negotiations and elections. 835 * 836 * 31 0 837 * ----------------------------------------- 838 * |m...|....|pppp|....|Cbbb|bccc|cccB|BBB1| 839 * ----------------------------------------- 840 * m [31] = master/slave 841 * . [30:24] = unused 842 * p [23:20] = priority 843 * . [19:16] = unused 844 * C [15] = connected (has master) 845 * b [14:11] = nmembrds-1 846 * c [10:5] = ncpus-1 847 * B [4:1] = board_id 848 * 1 [0] = one 849 */ 850 typedef union { 851 struct { 852 uint_t master :1; 853 uint_t unused0 :7; 854 uint_t priority :4; 855 uint_t unused1 :4; 856 uint_t connected :1; 857 uint_t nmembrds :4; 858 uint_t ncpus :6; 859 uint_t board :4; 860 uint_t one :1; 861 } v; 862 uint_t ticket; 863 } idn_vote_t; 864 865 #define IDNVOTE_PRI_MASK 0xf 866 #define IDNVOTE_MAXPRI 0xf 867 #define IDNVOTE_MINPRI 0 868 #define IDNVOTE_DEFPRI 1 /* must be larger than MINPRI */ 869 /* 870 * Initially: 871 * vote.v.priority = IDNVOTE_DEFPRI 872 * vote.v.one = 1 873 */ 874 #define IDNVOTE_INITIAL_TICKET ((IDNVOTE_DEFPRI << 20) | 1) 875 #define IDNVOTE_PRIVALUE(vvv) \ 876 ((int)vvv.v.priority + ((int)vvv.v.master ? IDNVOTE_MAXPRI : 0)) 877 878 /* 879 * During elections we only use the "elect" attributes of the 880 * election ticket, i.e. those physical attributes pertaining 881 * to the individual domain (priority, nboards, ncpus, board). 882 */ 883 #define IDNVOTE_ELECT_MASK 0x00f07fff 884 #define IDNVOTE_ELECT(tkt) ((tkt).ticket & IDNVOTE_ELECT_MASK) 885 #define IDNVOTE_BASICS_MASK 0x00f0ffff 886 #define IDNVOTE_BASICS(tkt) ((tkt).ticket & IDNVOTE_BASICS_MASK) 887 888 /* 889 * Values used in idn_select_master(). 890 */ 891 #define MASTER_IS_NONE 0 /* index into master_select_table */ 892 #define MASTER_IS_OTHER 1 893 #define MASTER_IS_LOCAL 2 894 #define MASTER_IS_REMOTE 3 895 896 typedef enum { 897 MASTER_SELECT_VOTE, 898 MASTER_SELECT_VOTE_RCFG, 899 MASTER_SELECT_CONNECT, 900 MASTER_SELECT_REMOTE, 901 MASTER_SELECT_LOCAL, 902 MASTER_SELECT_WAIT, 903 MASTER_SELECT_ERROR 904 } idn_master_select_t; 905 906 /* 907 * Used to synchronize completion of link/unlink with respect to 908 * the original requester (user). Necessary since link establishment 909 * occurs asynchronously. 910 */ 911 typedef enum { 912 /* 0 */ IDNOP_DISCONNECTED, /* successfully disconnected */ 913 /* 1 */ IDNOP_CONNECTED, /* successfully established */ 914 /* 2 */ IDNOP_ERROR /* error trying to link/unlink */ 915 } idn_opflag_t; 916 917 /* 918 * IDN Protocol Messages. 919 * These are IDN version (IDN_VERSION) dependent. 920 * 921 * ----- 7, --- 6,5.................0 922 * | ack | nack | IDN message type | 923 * ---------------------------------- 924 */ 925 #define IDN_VERSION 1 926 927 /* 928 * Must be no more than 6-bits. See DMV private data. 929 */ 930 #define IDNP_ACK 0x20 931 #define IDNP_NACK 0x10 932 #define IDNP_NULL 0x00 933 #define IDNP_NEGO 0x01 934 #define IDNP_CON 0x02 935 #define IDNP_CFG 0x03 936 #define IDNP_FIN 0x04 937 #define IDNP_CMD 0x05 938 #define IDNP_DATA 0x06 939 940 #define IDN_NUM_MSGTYPES 7 941 #define IDNP_ACKNACK_MASK (IDNP_ACK | IDNP_NACK) 942 #define IDNP_MSGTYPE_MASK 0x0f 943 #define VALID_MSGTYPE(m) (((m) >= IDNP_NEGO) && ((m) < IDN_NUM_MSGTYPES)) 944 945 typedef struct idn_msgtype { 946 ushort_t mt_mtype; 947 ushort_t mt_atype; 948 ushort_t mt_cookie; 949 } idn_msgtype_t; 950 951 /* 952 * IDN private data section of DMV layout (48 bits). 953 * 954 * 47......40,39.....34,33.....28,27..24,23......16,15..............0 955 * | version | msgtype | acktype | did | cpuid | cookie | 956 * ------------------------------------------------------------------ 957 * 958 * version Local domain's version of IDN software. 959 * msgtype Type of IDN message, e.g. nego, syn, etc. 960 * acktype If msgtype is a ACK or NACK, then acktype is the 961 * type of ack that we're receiving, e.g. ack/nego|ack. 962 * did Local domain's ID (netid) - system-wide unique. 963 * cpuid Local domain's CPU->cpu_id that sending message. 964 * cookie Cookie assigned by remote domain for authentication. 965 * For NEGO & NEGO+ACK messages, it's the cookie that 966 * the sender expects the receiver to use in subsequent 967 * messages. The upper-eight bits represent a timer 968 * cookie to associate timers with expected messages. 969 */ 970 #endif /* !_ASM */ 971 972 #ifdef _KERNEL 973 974 #define _IDNPD_COOKIE_MASK 0xffff 975 #define _IDNPD_COOKIE_SHIFT 32 976 #define _IDNPD_VER_MASK 0xff 977 #define _IDNPD_VER_SHIFT 24 978 #define _IDNPD_MTYPE_MASK 0x3f 979 #define _IDNPD_MTYPE_SHIFT 18 980 #define _IDNPD_ATYPE_MASK 0x3f 981 #define _IDNPD_ATYPE_SHIFT 12 982 #define _IDNPD_DOMID_MASK 0xf 983 #define _IDNPD_DOMID_SHIFT 8 984 #define _IDNPD_CPUID_MASK 0xff 985 #define _IDNPD_CPUID_SHIFT 0 986 987 #define _IDNPD_COOKIE_LEN 16 988 989 #ifndef _ASM 990 991 #define IDN_PD2COOKIE(pdata) \ 992 (((uint_t)((pdata) >> _IDNPD_COOKIE_SHIFT)) & _IDNPD_COOKIE_MASK) 993 #define IDN_PD2VER(pdata) \ 994 (((uint_t)((pdata) >> _IDNPD_VER_SHIFT)) & _IDNPD_VER_MASK) 995 #define IDN_PD2MTYPE(pdata) \ 996 (((uint_t)((pdata) >> _IDNPD_MTYPE_SHIFT)) & _IDNPD_MTYPE_MASK) 997 #define IDN_PD2ATYPE(pdata) \ 998 (((uint_t)((pdata) >> _IDNPD_ATYPE_SHIFT)) & _IDNPD_ATYPE_MASK) 999 #define IDN_PD2DOMID(pdata) \ 1000 (((uint_t)((pdata) >> _IDNPD_DOMID_SHIFT)) & _IDNPD_DOMID_MASK) 1001 #define IDN_PD2CPUID(pdata) \ 1002 (((uint_t)((pdata) >> _IDNPD_CPUID_SHIFT)) & _IDNPD_CPUID_MASK) 1003 1004 #define IDN_MAKE_PDATA(mtype, atype, cookie) \ 1005 ((((uint64_t)(cookie) & UINT64_C(_IDNPD_COOKIE_MASK)) << \ 1006 _IDNPD_COOKIE_SHIFT) | \ 1007 (((uint64_t)idn.version & UINT64_C(_IDNPD_VER_MASK)) << \ 1008 _IDNPD_VER_SHIFT) | \ 1009 (((uint64_t)(mtype) & UINT64_C(_IDNPD_MTYPE_MASK)) << \ 1010 _IDNPD_MTYPE_SHIFT) | \ 1011 (((uint64_t)(atype) & UINT64_C(_IDNPD_ATYPE_MASK)) << \ 1012 _IDNPD_ATYPE_SHIFT) | \ 1013 (((uint64_t)idn.localid & UINT64_C(_IDNPD_DOMID_MASK)) << \ 1014 _IDNPD_DOMID_SHIFT) | \ 1015 (((uint64_t)CPU->cpu_id & UINT64_C(_IDNPD_CPUID_MASK)) << \ 1016 _IDNPD_CPUID_SHIFT)) 1017 1018 #define IDN_TCOOKIE(ck) (((ck) >> 8) & 0xff) 1019 #define IDN_DCOOKIE(ck) ((ck) & 0xff) 1020 #define IDN_MAKE_COOKIE(d, t) ((((t) & 0xff) << 8) | ((d) & 0xff)) 1021 1022 /* 1023 * IDNP_NEGO 1024 * 1025 * 127........96,95........64,63........32,31.........0 1026 * | vote | domainset | 1027 * ---------------------------------------------------- 1028 * vote Local/Remote domain's vote ticket. 1029 * domainset Mask of cpuids of domains to which 1030 * sender is connected. Position in domainset 1031 * designates respective domainid. 1032 * E.g. domainset[6] = 20 -> domainid 6 is 1033 * accessible via cpuid 20. 1034 * The slot for the receiving domain 1035 * contains the masterid of the sending 1036 * domain. If the sending domain does 1037 * not have a master then the entry will 1038 * contain IDNNEG_NO_MASTER. 1039 * 1040 * These macros insert a domainid-cpuid pair into the 1041 * domainset to be subsequently passed in a NEGO message, 1042 * also retrieve the cpuid from the domainset for a 1043 * given domainid. 1044 * 1045 * Usage: 1046 * Sending: 1047 * mask = IDNNEG_DSET_MYMASK(); 1048 * IDNNEG_DSET_INIT(dset, mask) 1049 * for (all domains except self) 1050 * IDNNEG_DSET_SET(dset, domain, cpuid, mask); 1051 * 1052 * Receiving: 1053 * IDNNEG_DSET_GET_MASK(dset, recv_domid, recv_mask); 1054 * for (all domains except recv_domid) 1055 * IDNNEG_DSET_GET(dset, domid, cpuid, recv_mask); 1056 */ 1057 typedef uint_t idnneg_dset_t[3]; 1058 1059 #define IDNNEG_NO_MASTER 0x3f 1060 #define __IDNNEG_DSET_CLEAR(dset) (bzero((caddr_t)(dset), \ 1061 sizeof (idnneg_dset_t))) 1062 #define IDNNEG_DSET_MYMASK() (idn_domain[idn.localid].dcpu) 1063 1064 #define IDNNEG_DSET_INIT(dset, mask) \ 1065 { \ 1066 __IDNNEG_DSET_CLEAR(dset); \ 1067 IDNNEG_DSET_SET((dset), idn.localid, (mask), idn.localid); \ 1068 } 1069 1070 #define IDNNEG_DSET_SET(dset, domid, cpuid, mask) \ 1071 { \ 1072 uint_t _s = ((domid) & 0xf) * 6; \ 1073 int _i = _s >> 5; \ 1074 uint_t _s0 = _s & 0x1f; \ 1075 uint_t _t = ((cpuid) ^ (mask)) & 0x3f; \ 1076 /*LINTED*/ \ 1077 ASSERT(((domid) == idn.localid) ? \ 1078 ((mask) == idn.localid) : ((cpuid) != (mask))); \ 1079 (dset)[_i] |= _t << _s0; \ 1080 if ((_s0 + 6) > 32) \ 1081 (dset)[_i + 1] |= _t >> (32 - _s0); \ 1082 } 1083 1084 #define __IDNNEG_DSET_GET(dset, domid, cpuid, mask, uncond) \ 1085 { \ 1086 uint_t _s = ((domid) & 0xf) * 6; \ 1087 int _i = _s >> 5; \ 1088 uint_t _s0 = _s & 0x1f; \ 1089 uint_t _s1 = (_s + 6) & 0x1f; \ 1090 (cpuid) = ((dset)[_i] >> _s0) & 0x3f; \ 1091 if ((_s0 + 6) > 32) \ 1092 (cpuid) |= ((dset)[_i + 1] << (6 - _s1)) & 0x3f; \ 1093 if ((cpuid) || (uncond)) \ 1094 (cpuid) ^= (mask) & 0x3f; \ 1095 else \ 1096 (cpuid) = -1; \ 1097 } 1098 1099 #define IDNNEG_DSET_GET_MASK(dset, domid, mask) \ 1100 __IDNNEG_DSET_GET((dset), (domid), (mask), (domid), 1) 1101 1102 #define IDNNEG_DSET_GET_MASTER(dset, master) \ 1103 __IDNNEG_DSET_GET((dset), idn.localid, (master), \ 1104 idn.localid+MAX_DOMAINS, 0) 1105 1106 #define IDNNEG_DSET_SET_MASTER(dset, domid, master) \ 1107 IDNNEG_DSET_SET((dset), (domid), (master), \ 1108 (domid)+MAX_DOMAINS) 1109 1110 #define IDNNEG_DSET_GET(dset, domid, cpuid, mask) \ 1111 __IDNNEG_DSET_GET((dset), (domid), (cpuid), (mask), 0) 1112 1113 /* 1114 * IDNP_CFG sub-types. 1115 * 1116 * Format of first 32 bit word in XDC: 1117 * stX = sub-type. 1118 * staX = sub-type arg. 1119 * X = position in idn_cfgsubtype_t.param.p[] array. 1120 * num = number of parameters in this XDC (0-3) 1121 * 1122 * 31...28,27...24,23...20,19...16,15...12,11....8,7.....3,2....0 1123 * | st0 . sta0 | st1 . sta1 | st2 . sta2 | phase | num | 1124 * -------------------------------------------------------------- 1125 * 1126 * Note that since the first 32-bit word in a (IDNP_CFG) XDC is used 1127 * for a sub-type, subsequent three 32-bits words are used for data that 1128 * pertains to respective sub-type, i.e. first sub-type corresponds 1129 * to first of the 3x32-bit words (pos=0), second sub-type corresponds 1130 * to second of the 3x32-bit words (pos=1), etc. Obviously, a max of 1131 * only three sub-types can be sent per xdc. 1132 */ 1133 #define IDNCFG_BARLAR 0x1 /* SMR base/limit pfn */ 1134 #define IDNCFGARG_BARLAR_BAR 0 /* BAR */ 1135 #define IDNCFGARG_BARLAR_LAR 1 /* LAR */ 1136 #define IDNCFG_MCADR 0x2 /* MC ADR, arg = board number */ 1137 #define IDNCFG_NMCADR 0x3 /* Number of MC ADRs to expect */ 1138 #define IDNCFG_CPUSET 0x4 /* dcpuset of remote domain */ 1139 #define IDNCFGARG_CPUSET_UPPER 0 /* 1st word */ 1140 #define IDNCFGARG_CPUSET_LOWER 1 /* 2nd word */ 1141 #define IDNCFG_NETID 0x5 /* dnetid, arg = 0 */ 1142 #define IDNCFG_BOARDSET 0x6 /* board set, arg = 0 */ 1143 #define IDNCFG_SIZE 0x7 /* SMR size parameters */ 1144 #define IDNCFGARG_SIZE_MTU 0 /* IDN_MTU */ 1145 #define IDNCFGARG_SIZE_BUF 1 /* IDN_SMR_BUFSIZE */ 1146 #define IDNCFGARG_SIZE_SLAB 2 /* IDN_SLAB_BUFCOUNT */ 1147 #define IDNCFGARG_SIZE_NWR 3 /* IDN_NWR_SIZE */ 1148 #define IDNCFG_DATAMBOX 0x8 /* SMR data mailbox info */ 1149 #define IDNCFGARG_DATAMBOX_TABLE 0 /* recvmbox table */ 1150 #define IDNCFGARG_DATAMBOX_DOMAIN 1 /* domain's recvmbox */ 1151 #define IDNCFGARG_DATAMBOX_INDEX 2 /* domain's index into table */ 1152 #define IDNCFG_DATASVR 0x9 /* Data server info */ 1153 #define IDNCFGARG_DATASVR_MAXNETS 0 /* max # of nets/channels */ 1154 #define IDNCFGARG_DATASVR_MBXPERNET 1 /* # mbox per net/channel */ 1155 #define IDNCFG_OPTIONS 0xa /* various options */ 1156 #define IDNCFGARG_CHECKSUM 0 /* IDN_CHECKSUM */ 1157 1158 #define IDN_CFGPARAM(st, sta) ((uchar_t)((((st) & 0xf) << 4) | ((sta) & 0xf))) 1159 #define IDN_CFGPARAM_TYPE(p) (((p) >> 4) & 0xf) 1160 #define IDN_CFGPARAM_ARG(p) ((p) & 0xf) 1161 1162 typedef union { 1163 struct { 1164 uchar_t p[3]; 1165 uchar_t _num_phase; /* info.num, info.phase used instead */ 1166 } param; 1167 struct { 1168 uint_t _p : 24; /* param.p[] used instead */ 1169 uint_t num : 2; 1170 uint_t phase : 6; 1171 } info; 1172 uint_t val; 1173 } idn_cfgsubtype_t; 1174 1175 /* 1176 * IDN_MASTER_NCFGITEMS 1177 * Minimum number of config items expected from master. 1178 * 1179 * IDN_SLAVE_NCFGITEMS 1180 * Number of config items expected from slave. 1181 */ 1182 #define IDN_MASTER_NCFGITEMS 17 /* max = +14 (mcadrs) */ 1183 #define IDN_SLAVE_NCFGITEMS 12 1184 1185 /* 1186 * IDNP_CMD sub-types. 1187 */ 1188 typedef enum { 1189 /* 1 */ IDNCMD_SLABALLOC = 1, /* Request to allocate a slab */ 1190 /* 2 */ IDNCMD_SLABFREE, /* Request to free a slab */ 1191 /* 3 */ IDNCMD_SLABREAP, /* Reap any free slabs */ 1192 /* 4 */ IDNCMD_NODENAME /* Query nodename of domain */ 1193 } idn_cmd_t; 1194 1195 #define VALID_IDNCMD(c) (((int)(c) >= (int)IDNCMD_SLABALLOC) && \ 1196 ((int)(c) <= (int)IDNCMD_NODENAME)) 1197 /* 1198 * IDNP_NACK 1199 */ 1200 typedef enum { 1201 /* 1 */ IDNNACK_NOCONN = 1, 1202 /* 2 */ IDNNACK_BADCHAN, 1203 /* 3 */ IDNNACK_BADCFG, 1204 /* 4 */ IDNNACK_BADCMD, 1205 /* 5 */ IDNNACK_RETRY, 1206 /* 6 */ IDNNACK_DUP, 1207 /* 7 */ IDNNACK_EXIT, 1208 /* 8 */ IDNNACK_RESERVED1, 1209 /* 9 */ IDNNACK_RESERVED2, 1210 /* 10 */ IDNNACK_RESERVED3 1211 } idn_nack_t; 1212 1213 /* 1214 * IDNP_CON sub-types. 1215 */ 1216 typedef enum { 1217 /* 0 */ IDNCON_OFF = 0, 1218 /* 1 */ IDNCON_NORMAL, /* regular connect sequence */ 1219 /* 2 */ IDNCON_QUERY /* query for connect info */ 1220 } idn_con_t; 1221 1222 /* 1223 * IDNP_FIN sub-types. 1224 */ 1225 typedef enum { 1226 /* 0 */ IDNFIN_OFF = 0, /* active, no fin */ 1227 /* 1 */ IDNFIN_NORMAL, /* normal disconnect req */ 1228 /* 2 */ IDNFIN_FORCE_SOFT, /* normal dis, force if goes AWOL */ 1229 /* 3 */ IDNFIN_FORCE_HARD, /* force disconnect of AWOL domain */ 1230 /* 4 */ IDNFIN_QUERY /* query for fin info */ 1231 } idn_fin_t; 1232 1233 #define VALID_FIN(f) (((int)(f) > 0) && \ 1234 ((int)(f) < (int)IDNFIN_QUERY)) 1235 #define FIN_IS_FORCE(f) (((f) == IDNFIN_FORCE_SOFT) || \ 1236 ((f) == IDNFIN_FORCE_HARD)) 1237 1238 /* 1239 * FIN ARG types - reasons a FIN was sent. 1240 */ 1241 typedef enum { 1242 /* 0 */ IDNFIN_ARG_NONE = 0, /* no argument */ 1243 /* 1 */ IDNFIN_ARG_SMRBAD, /* SMR is corrupted */ 1244 /* 2 */ IDNFIN_ARG_CPUCFG, /* missing cpu per board */ 1245 /* 3 */ IDNFIN_ARG_HWERR, /* error programming hardware */ 1246 /* 4 */ IDNFIN_ARG_CFGERR_FATAL, /* Fatal error during CONFIG */ 1247 /* 5 */ IDNFIN_ARG_CFGERR_MTU, /* MTU sizes conflict */ 1248 /* 6 */ IDNFIN_ARG_CFGERR_BUF, /* SMR_BUF_SIZE conflicts */ 1249 /* 7 */ IDNFIN_ARG_CFGERR_SLAB, /* SLAB sizes conflict */ 1250 /* 8 */ IDNFIN_ARG_CFGERR_NWR, /* NWR sizes conflict */ 1251 /* 9 */ IDNFIN_ARG_CFGERR_NETS, /* MAX_NETS conflict */ 1252 /* 10 */ IDNFIN_ARG_CFGERR_MBOX, /* MBOX_PER_NET conflict */ 1253 /* 11 */ IDNFIN_ARG_CFGERR_NMCADR, /* NMCADR mismatches actual */ 1254 /* 12 */ IDNFIN_ARG_CFGERR_MCADR, /* missing some MCADRs */ 1255 /* 13 */ IDNFIN_ARG_CFGERR_CKSUM, /* checksum settings conflict */ 1256 /* 14 */ IDNFIN_ARG_CFGERR_SMR /* SMR sizes conflict */ 1257 } idn_finarg_t; 1258 1259 #define IDNFIN_ARG_IS_FATAL(fa) ((fa) > IDNFIN_ARG_NONE) 1260 1261 #define SET_FIN_TYPE(x, t) \ 1262 ((x) &= 0xffff, (x) |= (((uint_t)(t) & 0xffff) << 16)) 1263 #define SET_FIN_ARG(x, a) \ 1264 ((x) &= ~0xffff, (x) |= ((uint_t)(a) & 0xffff)) 1265 #define GET_FIN_TYPE(x) ((idn_fin_t)(((x) >> 16) & 0xffff)) 1266 #define GET_FIN_ARG(x) ((idn_finarg_t)((x) & 0xffff)) 1267 1268 #define FINARG2IDNKERR(fa) \ 1269 (((fa) == IDNFIN_ARG_SMRBAD) ? IDNKERR_SMR_CORRUPTED : \ 1270 ((fa) == IDNFIN_ARG_CPUCFG) ? IDNKERR_CPU_CONFIG : \ 1271 ((fa) == IDNFIN_ARG_HWERR) ? IDNKERR_HW_ERROR : \ 1272 ((fa) == IDNFIN_ARG_CFGERR_FATAL) ? IDNKERR_HW_ERROR : \ 1273 ((fa) == IDNFIN_ARG_CFGERR_MTU) ? IDNKERR_CONFIG_MTU : \ 1274 ((fa) == IDNFIN_ARG_CFGERR_BUF) ? IDNKERR_CONFIG_BUF : \ 1275 ((fa) == IDNFIN_ARG_CFGERR_SLAB) ? IDNKERR_CONFIG_SLAB : \ 1276 ((fa) == IDNFIN_ARG_CFGERR_NWR) ? IDNKERR_CONFIG_NWR : \ 1277 ((fa) == IDNFIN_ARG_CFGERR_NETS) ? IDNKERR_CONFIG_NETS : \ 1278 ((fa) == IDNFIN_ARG_CFGERR_MBOX) ? IDNKERR_CONFIG_MBOX : \ 1279 ((fa) == IDNFIN_ARG_CFGERR_NMCADR) ? IDNKERR_CONFIG_NMCADR : \ 1280 ((fa) == IDNFIN_ARG_CFGERR_MCADR) ? IDNKERR_CONFIG_MCADR : \ 1281 ((fa) == IDNFIN_ARG_CFGERR_CKSUM) ? IDNKERR_CONFIG_CKSUM : \ 1282 ((fa) == IDNFIN_ARG_CFGERR_SMR) ? IDNKERR_CONFIG_SMR : 0) 1283 1284 /* 1285 * FIN SYNC types. 1286 */ 1287 #define IDNFIN_SYNC_OFF 0 /* not set */ 1288 #define IDNFIN_SYNC_NO 1 /* no-sync necessary */ 1289 #define IDNFIN_SYNC_YES 2 /* do fin synchronously */ 1290 1291 typedef short idn_finsync_t; 1292 1293 /* 1294 * IDNP_FIN options. 1295 */ 1296 typedef enum { 1297 /* 0 */ IDNFIN_OPT_NONE = 0, /* none (used w/query) */ 1298 /* 1 */ IDNFIN_OPT_UNLINK, /* normal unlink request */ 1299 /* 2 */ IDNFIN_OPT_RELINK /* disconnect and retry link */ 1300 } idn_finopt_t; 1301 1302 #define VALID_FINOPT(f) (((f) == IDNFIN_OPT_UNLINK) || \ 1303 ((f) == IDNFIN_OPT_RELINK)) 1304 1305 #define FIN_MASTER_DOMID(x) (((((x) >> 16) & 0xffff) == 0xffff) ? \ 1306 IDN_NIL_DOMID : (((x) >> 16) & 0xffff)) 1307 #define FIN_MASTER_CPUID(x) ((((x) & 0xffff) == 0xffff) ? \ 1308 IDN_NIL_DCPU : ((x) & 0xfff)) 1309 #define MAKE_FIN_MASTER(d, c) ((((uint_t)(d) & 0xffff) << 16) | \ 1310 ((uint_t)(c) & 0xffff)) 1311 #define NIL_FIN_MASTER MAKE_FIN_MASTER(IDN_NIL_DOMID, IDN_NIL_DCPU) 1312 1313 #ifdef DEBUG 1314 #define IDN_FSTATE_TRANSITION(dp, ns) \ 1315 { \ 1316 int _id; \ 1317 _id = (dp)->domid; \ 1318 if ((dp)->dfin != (ns)) { \ 1319 hrtime_t tstamp; \ 1320 tstamp = TIMESTAMP(); \ 1321 IDN_HISTORY_LOG(IDNH_FIN, _id, (ns), 0); \ 1322 PR_STATE("FSTATE:%ld:%d: (l=%d, b/p=%d/%d) " \ 1323 "%s(%d) -> %s(%d)\n", \ 1324 (uint64_t)tstamp, _id, \ 1325 __LINE__, \ 1326 ((dp)->dcpu == IDN_NIL_DCPU) ? -1 : \ 1327 CPUID_TO_BOARDID((dp)->dcpu), \ 1328 (dp)->dcpu, \ 1329 idnfin_str[(dp)->dfin], (dp)->dfin, \ 1330 idnfin_str[ns], (ns)); \ 1331 (dp)->dfin = (ns); \ 1332 } \ 1333 } 1334 #else 1335 #define IDN_FSTATE_TRANSITION(dp, ns) \ 1336 { \ 1337 IDN_HISTORY_LOG(IDNH_FIN, (dp)->domid, (ns), 0); \ 1338 (dp)->dfin = (ns); \ 1339 } 1340 #endif /* DEBUG */ 1341 1342 #endif /* !_ASM */ 1343 #endif /* _KERNEL */ 1344 1345 #ifndef _ASM 1346 /* 1347 * IDN Per-Domain States. 1348 */ 1349 typedef enum { 1350 /* 0 */ IDNDS_CLOSED, /* idle */ 1351 /* 1 */ IDNDS_NEGO_PEND, /* link initiating */ 1352 /* 2 */ IDNDS_NEGO_SENT, /* link initiated, nego sent */ 1353 /* 3 */ IDNDS_NEGO_RCVD, /* link wanted, nego+ack sent */ 1354 /* 4 */ IDNDS_CONFIG, /* passing config info, prgm hw */ 1355 /* 5 */ IDNDS_CON_PEND, /* connection pending */ 1356 /* 6 */ IDNDS_CON_SENT, /* con sent */ 1357 /* 7 */ IDNDS_CON_RCVD, /* con sent & received */ 1358 /* 8 */ IDNDS_CON_READY, /* ready to establish link */ 1359 /* 9 */ IDNDS_CONNECTED, /* established - linked */ 1360 /* 10 */ IDNDS_FIN_PEND, /* unlink initiating */ 1361 /* 11 */ IDNDS_FIN_SENT, /* unlink initiated, fin sent */ 1362 /* 12 */ IDNDS_FIN_RCVD, /* unlink wanted by remote */ 1363 /* 13 */ IDNDS_DMAP /* deprogramming hw */ 1364 } idn_dstate_t; 1365 1366 #define IDNDS_IS_CLOSED(dp) (((dp)->dstate == IDNDS_CLOSED) || \ 1367 ((dp)->dstate == IDNDS_DMAP)) 1368 #define IDNDS_IS_CONNECTING(dp) (((dp)->dstate > IDNDS_CLOSED) && \ 1369 ((dp)->dstate < IDNDS_CONNECTED)) 1370 #define IDNDS_IS_DISCONNECTING(dp) ((dp)->dstate > IDNDS_CONNECTED) 1371 #define IDNDS_CONFIG_DONE(dp) (((dp)->dstate == IDNDS_CLOSED) || \ 1372 ((dp)->dstate > IDNDS_CONFIG)) 1373 #define IDNDS_SYNC_TYPE(dp) (((dp)->dfin_sync != IDNFIN_SYNC_OFF) ? \ 1374 (dp)->dfin_sync : \ 1375 ((dp)->dstate < IDNDS_CON_READY) ? \ 1376 IDNFIN_SYNC_NO : IDNFIN_SYNC_YES) 1377 1378 #endif /* !_ASM */ 1379 1380 #ifdef _KERNEL 1381 #ifndef _ASM 1382 /* 1383 * --------------------------------------------------------------------- 1384 */ 1385 typedef struct idn_timer { 1386 struct idn_timer *t_forw, 1387 *t_back; 1388 struct idn_timerq *t_q; 1389 1390 timeout_id_t t_id; 1391 short t_domid; 1392 short t_onq; 1393 ushort_t t_type; 1394 ushort_t t_subtype; 1395 uint_t t_cookie; 1396 #ifdef DEBUG 1397 hrtime_t t_posttime; 1398 hrtime_t t_exectime; 1399 #endif /* DEBUG */ 1400 } idn_timer_t; 1401 1402 #define IDN_TIMER_PUBLIC_COOKIE 0xf 1403 1404 #define IDN_TIMERQ_IS_LOCKED(tq) (MUTEX_HELD(&(tq)->tq_mutex)) 1405 #define IDN_TIMERQ_LOCK(tq) (mutex_enter(&(tq)->tq_mutex)) 1406 #define IDN_TIMERQ_UNLOCK(tq) (mutex_exit(&(tq)->tq_mutex)) 1407 1408 #define IDN_TIMERQ_INIT(tq) (idn_timerq_init(tq)) 1409 #define IDN_TIMERQ_DEINIT(tq) (idn_timerq_deinit(tq)) 1410 #define IDN_TIMER_ALLOC() (idn_timer_alloc()) 1411 #define IDN_TIMER_FREE(tp) (idn_timer_free(tp)) 1412 1413 #define IDN_TIMER_START(tq, tp, tim) \ 1414 (idn_timer_start((tq), (tp), (tim))) 1415 #define IDN_TIMER_STOP(tq, typ, ck) \ 1416 ((void) idn_timer_stop((tq), (typ), (ck))) 1417 #define IDN_TIMER_STOPALL(tp) \ 1418 ((void) idn_timer_stopall(tp)) 1419 #define IDN_TIMER_GET(tq, typ, tp, ck) \ 1420 { \ 1421 mutex_enter(&((tq)->tq_mutex)); \ 1422 (tp) = idn_timer_get((tq), (typ), (ck)); \ 1423 mutex_exit(&((tq)->tq_mutex)); \ 1424 } 1425 #define IDN_TIMER_DEQUEUE(tq, tp) \ 1426 (idn_timer_dequeue((tq), (tp))) 1427 #ifdef DEBUG 1428 #define IDN_TIMER_POST(tp) \ 1429 ((tp)->t_posttime = gethrtime(), (tp)->t_exectime = 0) 1430 #define IDN_TIMER_EXEC(tp) ((tp)->t_exectime = gethrtime()) 1431 #else /* DEBUG */ 1432 #define IDN_TIMER_POST(tp) 1433 #define IDN_TIMER_EXEC(tp) 1434 #endif /* DEBUG */ 1435 1436 #define IDN_MSGTIMER_START(domid, typ, subtyp, tim, ckp) \ 1437 { \ 1438 idn_timer_t *_tp; \ 1439 char _str[15]; \ 1440 ushort_t *_ckp = (ckp); \ 1441 inum2str((typ), _str); \ 1442 PR_TIMER("msgtimer:%d: START: type = %s (0x%x)\n", \ 1443 (domid), _str, (typ)); \ 1444 _tp = IDN_TIMER_ALLOC(); \ 1445 _tp->t_type = (ushort_t)(typ); \ 1446 _tp->t_subtype = (ushort_t)(subtyp); \ 1447 _tp->t_domid = (short)(domid); \ 1448 _tp->t_cookie = (_ckp) ? *(_ckp) : 0; \ 1449 IDN_TIMER_POST(_tp); \ 1450 if (_ckp) { \ 1451 *(_ckp) = IDN_TIMER_START(&idn_domain[domid].dtimerq, \ 1452 _tp, (tim)); \ 1453 } else { \ 1454 (void) IDN_TIMER_START(&idn_domain[domid].dtimerq, \ 1455 _tp, (tim)); \ 1456 } \ 1457 } 1458 #define IDN_MSGTIMER_STOP(domid, typ, ck) \ 1459 { \ 1460 char _str[15]; \ 1461 inum2str((typ), _str); \ 1462 PR_TIMER("msgtimer:%d: STOP: type = %s (0x%x), " \ 1463 "cookie = 0x%x\n", \ 1464 (domid), _str, (typ), (ck)); \ 1465 IDN_TIMER_STOP(&idn_domain[domid].dtimerq, (typ), (ck)); \ 1466 } 1467 #define IDN_MSGTIMER_GET(dp, typ, tp, ck) \ 1468 IDN_TIMER_GET(&(dp)->dtimerq, (typ), (tp), (ck)) 1469 1470 /* 1471 * IDN_SLABALLOC_WAITTIME 1472 * Max wait time in ticks that local domains waits for 1473 * master to respond to a slab allocation request. Has 1474 * to be at least as long as wait time for a response to 1475 * the command. 1476 */ 1477 #define IDN_SLABALLOC_WAITTIME ((3 * idn_msg_waittime[IDNP_CMD]) / 2) 1478 1479 /* 1480 * Domain state transition macros. 1481 */ 1482 #ifdef DEBUG 1483 #define IDN_DSTATE_TRANSITION(dp, ns) \ 1484 { \ 1485 int id; \ 1486 hrtime_t tstamp; \ 1487 tstamp = TIMESTAMP(); \ 1488 ASSERT(RW_WRITE_HELD(&(dp)->drwlock)); \ 1489 id = (dp)->domid; \ 1490 IDN_HISTORY_LOG(IDNH_DSTATE, id, (ns), \ 1491 (uint_t)(dp)->dcpu); \ 1492 PR_STATE("DSTATE:%ld:%d: (l=%d, b/p=%d/%d) " \ 1493 "%s(%d) -> %s(%d)\n", \ 1494 (uint64_t)tstamp, id, \ 1495 __LINE__, \ 1496 ((dp)->dcpu == IDN_NIL_DCPU) ? \ 1497 -1 : CPUID_TO_BOARDID((dp)->dcpu), \ 1498 (dp)->dcpu, \ 1499 idnds_str[(dp)->dstate], (dp)->dstate, \ 1500 idnds_str[ns], (ns)); \ 1501 (dp)->dstate = (ns); \ 1502 IDNSB_DOMAIN_UPDATE(dp); \ 1503 } 1504 #else 1505 #define IDN_DSTATE_TRANSITION(dp, ns) \ 1506 { \ 1507 IDN_HISTORY_LOG(IDNH_DSTATE, (dp)->domid, \ 1508 (ns), (uint_t)(dp)->dcpu); \ 1509 (dp)->dstate = (ns); \ 1510 IDNSB_DOMAIN_UPDATE(dp); \ 1511 } 1512 #endif /* DEBUG */ 1513 1514 #define IDN_XSTATE_TRANSITION(dp, xs) \ 1515 { \ 1516 int _xs = (xs); \ 1517 (dp)->dxstate = _xs; \ 1518 if (_xs != IDNXS_NIL) { \ 1519 ASSERT((dp)->dxp); \ 1520 IDN_DSTATE_TRANSITION((dp), \ 1521 (dp)->dxp->xt_trans[_xs].t_state); \ 1522 } \ 1523 } 1524 1525 /* 1526 * --------------------------------------------------------------------- 1527 * IDN Per-Domain Data 1528 * 1529 * The comment to the right of the respective field represents 1530 * what lock protects that field. If there is no comment then 1531 * no lock is required to access the field. 1532 * --------------------------------------------------------------------- 1533 */ 1534 1535 #define MAXDNAME 32 1536 1537 typedef struct idn_domain { 1538 krwlock_t drwlock; 1539 /* 1540 * Assigned domid for domain. Never 1541 * changes once idn_domain[] is 1542 * initialized. We are guaranteed that 1543 * all domains in IDN will have a 1544 * uniqueue domid in the range (0-15). 1545 */ 1546 int domid; 1547 idn_dstate_t dstate; /* drwlock */ 1548 idn_xstate_t dxstate; /* drwlock */ 1549 /* 1550 * Gotten from uname -n for local 1551 * domain. Remote domains pass 1552 * theirs during Config phase. 1553 */ 1554 char dname[MAXDNAME]; /* drwlock */ 1555 /* 1556 * IDN-wide unique identifier for the 1557 * given domain. This value will be 1558 * the same as the domid. 1559 */ 1560 ushort_t dnetid; /* drwlock */ 1561 idn_vote_t dvote; /* drwlock */ 1562 /* 1563 * Used during FIN sequenece to 1564 * determine what type of shutdown 1565 * (unlink) we're executing with 1566 * respect to the given domain. 1567 */ 1568 idn_fin_t dfin; /* drwlock */ 1569 /* 1570 * A non-zero value for dfin_sync 1571 * indicates that unlink of respective 1572 * domain does not need to be performed 1573 * synchronously among all the IDN 1574 * member domains. 1575 */ 1576 short dfin_sync; /* grwlock */ 1577 /* 1578 * Cookie used to determine the 1579 * proper context in which we're 1580 * receiving messages from the given 1581 * domain. Assigned cookies are exchanged 1582 * during initial NEGO messages. 1583 */ 1584 ushort_t dcookie_send; /* drwlock */ 1585 ushort_t dcookie_recv; /* drwlock */ 1586 short dcookie_err; /* drwlock */ 1587 int dcookie_errcnt; /* drwlock */ 1588 /* 1589 * Primary target cpu for sending 1590 * messages. Can change to help 1591 * distribute interrupts on receiving 1592 * side. 1593 */ 1594 int dcpu; /* drwlock */ 1595 /* 1596 * Used to store dcpu from a previous 1597 * life. Only used when requesting 1598 * a RELINK with a domain we were just 1599 * previously linked with. Thus, it 1600 * does represent a valid cpu in the 1601 * remote domain. 1602 */ 1603 int dcpu_save; /* drwlock */ 1604 /* 1605 * Used to store from which cpu the 1606 * last message was received. 1607 */ 1608 int dcpu_last; 1609 /* 1610 * Transition phase area. This field 1611 * points to the proper phase structure 1612 * depending on what stage the given 1613 * domain is in. 1614 */ 1615 idn_xphase_t *dxp; /* drwlock */ 1616 /* 1617 * Actual synchronization object for 1618 * the given domain. 1619 */ 1620 idn_syncop_t dsync; /* drwlock & idn.sync.sz_mutex */ 1621 /* 1622 * Slab information for given domain. 1623 * If the local domain is a master, 1624 * then this field in each domain is used 1625 * to store which slabs have been assigned 1626 * to given domain. If the local domain 1627 * is a slave, then this information is 1628 * NULL for all remote idn_domain[] 1629 * entries, but for local domain holds 1630 * those slabs assigned to local domain. 1631 */ 1632 smr_slab_t *dslab; /* dslab_rwlock */ 1633 short dnslabs; /* dslab_rwlock */ 1634 short dslab_state; /* dslab_rwlock */ 1635 krwlock_t dslab_rwlock; 1636 /* 1637 * Set of cpus belonging to domain. 1638 */ 1639 cpuset_t dcpuset; /* drwlock */ 1640 1641 int dncpus; /* drwlock */ 1642 /* 1643 * Index into dcpumap to determine 1644 * which cpu to target next for 1645 * interrupt. Intended to allow fair 1646 * distribution of interrupts on 1647 * remote domain. 1648 */ 1649 uint_t dcpuindex; /* drwlock */ 1650 /* 1651 * Quick look-up map of cpus belonging 1652 * to domain. Used to select next target. 1653 */ 1654 uchar_t *dcpumap; /* drwlock */ 1655 /* 1656 * Non-zero indicates outstanding 1657 * I/O's to given domain. 1658 */ 1659 int dio; /* drwlock */ 1660 int dioerr; /* drwlock */ 1661 /* 1662 * Set when we fail to allocate a buffer 1663 * for a domain. Dictates whether to 1664 * reclaim max buffers or not. 1665 */ 1666 lock_t diowanted; 1667 /* 1668 * Set when remote domain does not 1669 * seem to be picking up messages sent 1670 * to it. Non-zero indicates we have 1671 * an outstanding "ping" to domain. 1672 */ 1673 lock_t diocheck; /* drwlock */ 1674 short dslabsize; /* drwlock */ 1675 uint_t dmtu; /* drwlock */ 1676 1677 uint_t dbufsize; /* drwlock */ 1678 short dnwrsize; /* drwlock */ 1679 lock_t dreclaim_inprogress; /* drwlock */ 1680 uchar_t dreclaim_index; /* drwlock */ 1681 /* 1682 * The following field is primarily 1683 * used during CFG exchange to keep 1684 * track of certain per-domain information. 1685 */ 1686 union { /* all - drwlock */ 1687 struct { 1688 uint_t _dcfgphase : 6; 1689 uint_t _dcfgsnddone : 1; 1690 uint_t _dcfgrcvdone : 1; 1691 uint_t _dcksum : 2; 1692 uint_t _dmaxnets : 6; 1693 uint_t _dmboxpernet : 9; 1694 uint_t _dncfgitems : 6; 1695 uint_t _drecfg : 1; 1696 } _s; 1697 int _dtmp; 1698 } _u; 1699 /* 1700 * Each domain entry maintains a 1701 * timer queue holding timers for 1702 * messages outstanding to that domain. 1703 */ 1704 struct idn_timerq { 1705 int tq_cookie; /* tq_mutex */ 1706 kmutex_t tq_mutex; 1707 int tq_count; /* tq_mutex */ 1708 idn_timer_t *tq_queue; /* tq_mutex */ 1709 } dtimerq; 1710 /* 1711 * dawol is used to keep 1712 * track of AWOL details for 1713 * given domain when it is 1714 * non-responsive. 1715 */ 1716 struct { 1717 int a_count; /* drwlock */ 1718 clock_t a_time; /* drwlock */ 1719 clock_t a_last; /* drwlock */ 1720 clock_t a_msg; /* drwlock */ 1721 } dawol; 1722 1723 struct hwconfig { 1724 short dh_nboards; /* drwlock */ 1725 short dh_nmcadr; /* drwlock */ 1726 boardset_t dh_boardset; /* drwlock */ 1727 uint_t dh_mcadr[MAX_BOARDS]; /* drwlock */ 1728 } dhw; 1729 /* 1730 * Mailbox information used to 1731 * send/recv messages to given domain. 1732 */ 1733 struct { 1734 kmutex_t m_mutex; 1735 struct idn_mboxtbl *m_tbl; /* m_mutex */ 1736 struct idn_mainmbox *m_send; /* m_mutex */ 1737 struct idn_mainmbox *m_recv; /* m_mutex */ 1738 } dmbox; 1739 } idn_domain_t; 1740 1741 typedef struct idn_timerq idn_timerq_t; 1742 1743 #define dcfgphase _u._s._dcfgphase 1744 #define dcfgsnddone _u._s._dcfgsnddone 1745 #define dcfgrcvdone _u._s._dcfgrcvdone 1746 #define dcksum _u._s._dcksum 1747 #define dmaxnets _u._s._dmaxnets 1748 #define dmboxpernet _u._s._dmboxpernet 1749 #define dncfgitems _u._s._dncfgitems 1750 #define drecfg _u._s._drecfg 1751 #define dbindport _u._dbindport 1752 #define dconnected _u._dconnected 1753 #define dtmp _u._dtmp 1754 1755 #define IDN_DLOCK_EXCL(dd) (rw_enter(&idn_domain[dd].drwlock, RW_WRITER)) 1756 #define IDN_DLOCK_SHARED(dd) (rw_enter(&idn_domain[dd].drwlock, RW_READER)) 1757 #define IDN_DLOCK_TRY_SHARED(dd) \ 1758 (rw_tryenter(&idn_domain[dd].drwlock, \ 1759 RW_READER)) 1760 #define IDN_DLOCK_DOWNGRADE(dd) (rw_downgrade(&idn_domain[dd].drwlock)) 1761 #define IDN_DUNLOCK(dd) (rw_exit(&idn_domain[dd].drwlock)) 1762 #define IDN_DLOCK_IS_EXCL(dd) (RW_WRITE_HELD(&idn_domain[dd].drwlock)) 1763 #define IDN_DLOCK_IS_SHARED(dd) (RW_READ_HELD(&idn_domain[dd].drwlock)) 1764 #define IDN_DLOCK_IS_HELD(dd) (RW_LOCK_HELD(&idn_domain[dd].drwlock)) 1765 1766 #define IDN_MBOX_LOCK(dd) (mutex_enter(&idn_domain[dd].dmbox.m_mutex)) 1767 #define IDN_MBOX_UNLOCK(dd) (mutex_exit(&idn_domain[dd].dmbox.m_mutex)) 1768 1769 #define IDN_RESET_COOKIES(dd) \ 1770 (idn_domain[dd].dcookie_send = idn_domain[dd].dcookie_recv = 0) 1771 1772 #define DSLAB_STATE_UNKNOWN 0 1773 #define DSLAB_STATE_LOCAL 1 1774 #define DSLAB_STATE_REMOTE 2 1775 1776 #define DSLAB_READ_HELD(d) RW_READ_HELD(&idn_domain[d].dslab_rwlock) 1777 #define DSLAB_WRITE_HELD(d) RW_WRITE_HELD(&idn_domain[d].dslab_rwlock) 1778 1779 #define DSLAB_LOCK_EXCL(d) \ 1780 rw_enter(&idn_domain[d].dslab_rwlock, RW_WRITER) 1781 #define DSLAB_LOCK_SHARED(d) \ 1782 rw_enter(&idn_domain[d].dslab_rwlock, RW_READER) 1783 #define DSLAB_LOCK_TRYUPGRADE(d) \ 1784 rw_tryupgrade(&idn_domain[d].dslab_rwlock) 1785 #define DSLAB_UNLOCK(d) rw_exit(&idn_domain[d].dslab_rwlock) 1786 1787 /* 1788 * --------------------------------------------------------------------- 1789 * Macro to pick another target for the given domain. This hopefully 1790 * improves performance by better distributing the SSI responsibilities 1791 * at the target domain. 1792 * --------------------------------------------------------------------- 1793 */ 1794 #define BUMP_INDEX(set, index) \ 1795 { \ 1796 register int p; \ 1797 for (p = (index)+1; p < NCPU; p++) \ 1798 if (CPU_IN_SET((set), p)) \ 1799 break; \ 1800 if (p >= NCPU) \ 1801 for (p = 0; p <= (index); p++) \ 1802 if (CPU_IN_SET((set), p)) \ 1803 break; \ 1804 if (!CPU_IN_SET((set), p)) { \ 1805 uint_t _u32, _l32; \ 1806 _u32 = UPPER32_CPUMASK(set); \ 1807 _l32 = LOWER32_CPUMASK(set); \ 1808 cmn_err(CE_PANIC, \ 1809 "IDN: cpu %d not in cpuset 0x%x.%0x\n", \ 1810 p, _u32, _l32); \ 1811 } \ 1812 (index) = p; \ 1813 } 1814 1815 #define IDN_ASSIGN_DCPU(dp, cookie) \ 1816 ((dp)->dcpu = (int)((dp)->dcpumap[(cookie) & (NCPU-1)])) 1817 1818 /* 1819 * --------------------------------------------------------------------- 1820 * Atomic increment/decrement, swap, compare-swap functions. 1821 * --------------------------------------------------------------------- 1822 */ 1823 #define ATOMIC_INC(v) atomic_inc_32((uint_t *)&(v)) 1824 #define ATOMIC_DEC(v) atomic_dec_32((uint_t *)&(v)) 1825 #define ATOMIC_SUB(v, n) atomic_add_32((uint_t *)&(v), -(n)) 1826 #define ATOMIC_CAS(a, c, n) atomic_cas_32((uint32_t *)(a), (uint32_t)(c), \ 1827 (uint32_t)(n)) 1828 #define ATOMIC_SWAPL(a, v) atomic_swap_32((uint32_t *)(a), (uint32_t)(v)) 1829 1830 /* 1831 * DMV vector interrupt support. 1832 * 1833 * A fixed-size circular buffer is maintained as a queue of 1834 * incoming interrupts. The low-level idn_dmv_handler() waits 1835 * for an entry to become FREE and will atomically mark it INUSE. 1836 * Once he has filled in the appropriate fields it will be marked 1837 * as READY. The high-level idn_handler() will be invoked and will 1838 * process all messages in the queue that are READY. Each message 1839 * is marked PROCESS, a protojob job created and filled in, and 1840 * then the interrupt message is marked FREE for use in the next 1841 * interrupt. The iv_state field is used to hold the relevant 1842 * state and is updated atomically. 1843 */ 1844 #define IDN_PIL PIL_8 1845 #define IDN_DMV_PENDING_MAX 128 /* per cpu */ 1846 1847 #endif /* !_ASM */ 1848 1849 #ifndef _ASM 1850 1851 /* 1852 * The size of this structure must be a power of 2 1853 * so that we can do a simple shift to calculate 1854 * our offset into based on cpuid. 1855 */ 1856 typedef struct idn_dmv_cpu { 1857 uint32_t idn_dmv_current; 1858 int32_t idn_dmv_lostintr; 1859 lock_t idn_dmv_active; 1860 char _padding[(2 * sizeof (uint64_t)) - \ 1861 sizeof (uint32_t) - \ 1862 sizeof (lock_t) - \ 1863 sizeof (int32_t)]; 1864 } idn_dmv_cpu_t; 1865 1866 typedef struct idn_dmv_data { 1867 uint64_t idn_soft_inum; 1868 uint64_t idn_dmv_qbase; 1869 idn_dmv_cpu_t idn_dmv_cpu[NCPU]; 1870 } idn_dmv_data_t; 1871 1872 /* 1873 * Requirements of the following data structure: 1874 * - MUST be double-word (8 bytes) aligned. 1875 * - _iv_head field MUST start on double-word boundary. 1876 * - iv_xargs0 MUST start on double-word boundary 1877 * with iv_xargs1 immediately following. 1878 * - iv_xargs2 MUST start on double-word boundary 1879 * with iv_xargs3 immediately following. 1880 */ 1881 typedef struct idn_dmv_msg { 1882 uint32_t iv_next; /* offset */ 1883 uchar_t iv_inuse; 1884 uchar_t iv_ready; 1885 ushort_t _padding; 1886 uint32_t iv_head : 16; 1887 uint32_t iv_cookie : 16; 1888 uint32_t iv_ver : 8; 1889 uint32_t iv_mtype : 6; 1890 uint32_t iv_atype : 6; 1891 uint32_t iv_domid : 4; 1892 uint32_t iv_cpuid : 8; 1893 uint32_t iv_xargs0; 1894 uint32_t iv_xargs1; 1895 uint32_t iv_xargs2; 1896 uint32_t iv_xargs3; 1897 } idn_dmv_msg_t; 1898 1899 extern uint_t idn_dmv_inum; 1900 extern uint_t idn_soft_inum; 1901 1902 /* 1903 * An IDN-network address has the following format: 1904 * 1905 * 31......16,15........0 1906 * | channel | dnetid | 1907 * ---------------------- 1908 * channel - network interface. 1909 * netid - idn_domain[].dnetid 1910 */ 1911 #define IDN_MAXMAX_NETS 32 1912 #define IDN_BROADCAST_ALLCHAN ((ushort_t)-1) 1913 #define IDN_BROADCAST_ALLNETID ((ushort_t)-1) 1914 1915 typedef union { 1916 struct { 1917 ushort_t chan; 1918 ushort_t netid; 1919 } net; 1920 uint_t netaddr; 1921 } idn_netaddr_t; 1922 1923 #define CHANSET_ALL (~((idn_chanset_t)0)) 1924 #define CHANSET(c) \ 1925 ((idn_chanset_t)1 << ((c) & 31)) 1926 #define CHAN_IN_SET(m, c) \ 1927 (((m) & ((idn_chanset_t)1 << ((c) & 31))) != 0) 1928 #define CHANSET_ADD(m, c) \ 1929 ((m) |= ((idn_chanset_t)1 << ((c) & 31))) 1930 #define CHANSET_DEL(m, c) \ 1931 ((m) &= ~((idn_chanset_t)1 << ((c) & 31))) 1932 #define CHANSET_ZERO(m) ((m) = 0) 1933 1934 typedef enum { 1935 /* 0 */ IDNCHAN_OPEN, 1936 /* 1 */ IDNCHAN_SOFT_CLOSE, 1937 /* 2 */ IDNCHAN_HARD_CLOSE, 1938 /* 3 */ IDNCHAN_OFFLINE, 1939 /* 4 */ IDNCHAN_ONLINE 1940 } idn_chanop_t; 1941 1942 /* 1943 * Retry support. 1944 */ 1945 #define IDN_RETRY_TOKEN(d, x) ((((d) & 0xf) << 16) | \ 1946 (0xffff & (uint_t)(x))) 1947 #define IDN_RETRY_TOKEN2DOMID(t) ((int)(((t) >> 16) & 0xf)) 1948 #define IDN_RETRY_TOKEN2TYPE(t) ((idn_retry_t)((t) & 0xffff)) 1949 #define IDN_RETRY_TYPEALL ((idn_retry_t)0xffff) 1950 #define IDN_RETRY_INTERVAL hz /* 1 sec */ 1951 #define IDN_RETRY_RECFG_MULTIPLE 10 1952 1953 #define IDN_RETRYINTERVAL_NEGO (2 * hz) 1954 #define IDN_RETRYINTERVAL_CON (2 * hz) 1955 #define IDN_RETRYINTERVAL_FIN (2 * hz) 1956 1957 typedef struct idn_retry_job { 1958 struct idn_retry_job *rj_prev; 1959 struct idn_retry_job *rj_next; 1960 void (*rj_func)(uint_t token, void *arg); 1961 void *rj_arg; 1962 uint_t rj_token; 1963 short rj_onq; 1964 timeout_id_t rj_id; 1965 } idn_retry_job_t; 1966 1967 #define IDNRETRY_ALLOCJOB() \ 1968 ((idn_retry_job_t *)kmem_cache_alloc(idn.retryqueue.rq_cache, KM_SLEEP)) 1969 #define IDNRETRY_FREEJOB(j) \ 1970 (kmem_cache_free(idn.retryqueue.rq_cache, (void *)(j))) 1971 1972 typedef enum { 1973 /* 0 */ IDNRETRY_NIL = 0, 1974 /* 1 */ IDNRETRY_NEGO, 1975 /* 2 */ IDNRETRY_CON, 1976 /* 3 */ IDNRETRY_CONQ, /* for CON queries */ 1977 /* 4 */ IDNRETRY_FIN, 1978 /* 5 */ IDNRETRY_FINQ, /* for FIN queries */ 1979 /* 6 */ IDN_NUM_RETRYTYPES 1980 } idn_retry_t; 1981 1982 /* 1983 * --------------------------------------------------------------------- 1984 */ 1985 typedef struct { 1986 int m_domid; 1987 int m_cpuid; 1988 ushort_t m_msgtype; 1989 ushort_t m_acktype; 1990 ushort_t m_cookie; 1991 idn_xdcargs_t m_xargs; 1992 } idn_protomsg_t; 1993 1994 typedef struct idn_protojob { 1995 struct idn_protojob *j_next; 1996 int j_cache; 1997 idn_protomsg_t j_msg; 1998 } idn_protojob_t; 1999 2000 typedef struct idn_protoqueue { 2001 struct idn_protoqueue *q_next; 2002 idn_protojob_t *q_joblist; 2003 idn_protojob_t *q_joblist_tail; 2004 int q_die; 2005 int q_id; 2006 ksema_t *q_morgue; 2007 kthread_id_t q_threadp; 2008 kcondvar_t q_cv; 2009 kmutex_t q_mutex; 2010 } idn_protoqueue_t; 2011 2012 #define IDN_PROTOCOL_NSERVERS 4 2013 #define IDN_PROTOCOL_SERVER_HASH(d) ((d) % idn.nservers) 2014 #define IDN_PROTOJOB_CHUNKS (idn.nservers) 2015 2016 /* 2017 * --------------------------------------------------------------------- 2018 * Data Server definitions. 2019 * 2020 * idn_datasvr_t - Describes data server thread. 2021 * . ds_id - Per-domain identifier for data server. 2022 * . ds_domid - Domain which data server is handling. 2023 * . ds_state - Flag to enable/disable/terminate 2024 * data server. 2025 * . ds_mboxp - Pointer to data server's (local) 2026 * mailbox to be serviced. 2027 * . ds_waittime - cv_timedwait sleep time before 2028 * checking respective mailbox. 2029 * . ds_threadp - Pointer to data server thread. 2030 * . ds_cv - Condvar for sleeping. 2031 * . ds_morguep - Semaphore for terminating thread. 2032 * 2033 * idn_mboxhdr_t - Resides in SMR space (MUST be cache_linesize). 2034 * . mh_svr_active - Non-zero indicates data server is 2035 * actively reading mailbox for messages. 2036 * . mh_svr_ready - Non-zero indicates data server has 2037 * allocated and is ready to accept data. 2038 * . mh_cookie - Identifier primarily for debug purposes. 2039 * 2040 * idn_mboxmsg_t - Entry in the SMR space circular queue use to 2041 * represent a data packet. 2042 * . mm_owner - Non-zero indicates entry is available 2043 * to be processed by receiver's data server. 2044 * . mm_flag - Indicates whether entry needs to be 2045 * reclaimed by the sender. Also holds error 2046 * indications (e.g. bad offset). 2047 * . mm_offset - SMR offset of respective data packet. 2048 * 2049 * idn_mboxtbl_t - Encapsulation of a per-domain mailbox (SMR space). 2050 * . mt_header - Header information for synchronization. 2051 * . mt_queue - Circular queue of idn_mboxmsg_t entries. 2052 * 2053 * idn_mainmbox_t - Encapsulation of main SMR recv/send mailboxes. 2054 * . mm_mutex - Protects mm_* entries, enqueuing, and 2055 * dequeuing of messages. Also protects 2056 * updates to the route table pointed to 2057 * by mm_routetbl. 2058 * . mm_count - send: Current number of messages 2059 * enqueued. 2060 * - recv: Cumulative number of messages 2061 * processed. 2062 * . mm_max_count - send: Maximum number of messages 2063 * enqueued per iteration. 2064 * recv: Maximum number of messages 2065 * dequeued per iteration. 2066 * . mm_smr_mboxp - Pointer to SMR (vaddr) space where 2067 * respective mailbox resides. 2068 * --------------------------------------------------------------------- 2069 */ 2070 #define IDN_MBOXHDR_COOKIE_TOP ((uint_t)0xc0c0) 2071 #define IDN_MAKE_MBOXHDR_COOKIE(pd, sd, ch) \ 2072 ((IDN_MBOXHDR_COOKIE_TOP << 16) \ 2073 | (((uint_t)(pd) & 0xf) << 12) \ 2074 | (((uint_t)(sd) & 0xf) << 8) \ 2075 | ((uint_t)(ch) & 0xf)) 2076 #define IDN_GET_MBOXHDR_COOKIE(mhp) \ 2077 ((mhp)->mh_cookie & ~0xff00) 2078 #define VALID_MBOXHDR(mhp, ch, cksum) \ 2079 ((IDN_GET_MBOXHDR_COOKIE(mhp) == \ 2080 IDN_MAKE_MBOXHDR_COOKIE(0, 0, (ch))) && \ 2081 ((cksum) == (*(mhp)).mh_cksum)) 2082 /* 2083 * The number of entries in a mailbox queue must be chosen so 2084 * that (IDN_MMBOX_NUMENTRIES * sizeof (idn_mboxmsg_t)) is a multiple 2085 * of a cacheline size (64). 2086 */ 2087 #define IDN_MMBOX_NUMENTRIES IDN_MBOX_PER_NET 2088 /* 2089 * We step through the mailboxes in effectively cacheline size 2090 * incremenents so that the source and receiving cpus are not competing 2091 * for the same cacheline when transmitting/receiving messages into/from 2092 * the mailboxes. The hard requirement is that the step value be even 2093 * since the mailbox size will be chosen odd. This allows us to wraparound 2094 * the mailbox uniquely touching each entry until we've exhausted them 2095 * all at which point we'll end up where we initially started and repeat 2096 * again. 2097 */ 2098 #define IDN_MMBOXINDEX_STEP (((64 / sizeof (idn_mboxmsg_t)) + 1) & 0xfffe) 2099 #define IDN_MMBOXINDEX_INC(i) \ 2100 { \ 2101 if (((i) += IDN_MMBOXINDEX_STEP) >= IDN_MMBOX_NUMENTRIES) \ 2102 (i) -= IDN_MMBOX_NUMENTRIES; \ 2103 } 2104 2105 #define IDN_MMBOXINDEX_DIFF(i, j) \ 2106 (((i) >= (j)) ? (((i) - (j)) / IDN_MMBOXINDEX_STEP) \ 2107 : ((((i) + IDN_MMBOX_NUMENTRIES) - (j)) / IDN_MMBOXINDEX_STEP)) 2108 2109 /* 2110 * Require IDN_MBOXAREA_SIZE <= IDN_SLAB_SIZE so we don't waste 2111 * slab space. 2112 * 2113 * Each domain maintains a MAX_DOMAIN(16) entry mbox_table. Each 2114 * entry represents a receive mailbox for a possible domain to which 2115 * the given domain may have a connection. The send mailbox for each 2116 * respective domain is given to the local domain at the time of 2117 * connection establishment. 2118 */ 2119 2120 /* 2121 * --------------------------------------------------------------------- 2122 */ 2123 #define IDN_MBOXTBL_SIZE \ 2124 (IDNROUNDUP(((IDN_MBOX_PER_NET * sizeof (idn_mboxmsg_t)) \ 2125 + sizeof (idn_mboxhdr_t)), IDN_ALIGNSIZE)) 2126 2127 /* 2128 * --------------------------------------------------------------------- 2129 * Each domain has idn_max_nets worth of possible mailbox tables 2130 * for each domain to which it might possibly be connected. 2131 * --------------------------------------------------------------------- 2132 */ 2133 #define IDN_MBOXAREA_SIZE \ 2134 (IDN_MBOXTBL_SIZE * IDN_MAX_NETS * MAX_DOMAINS * MAX_DOMAINS) 2135 #define IDN_MBOXAREA_OFFSET(d) \ 2136 ((d) * IDN_MBOXTBL_SIZE * IDN_MAX_NETS * MAX_DOMAINS) 2137 2138 /* 2139 * --------------------------------------------------------------------- 2140 * Return the base of the mailbox area (set of tables) assigned 2141 * to the given domain id. 2142 * --------------------------------------------------------------------- 2143 */ 2144 #define IDN_MBOXAREA_BASE(m, d) \ 2145 ((idn_mboxtbl_t *)(((ulong_t)(m)) + IDN_MBOXAREA_OFFSET(d))) 2146 2147 /* 2148 * --------------------------------------------------------------------- 2149 * Return the pointer to the respective receive mailbox (table set) 2150 * for the given domain id relative to the given base mailbox table. 2151 * --------------------------------------------------------------------- 2152 */ 2153 #define IDN_MBOXTBL_PTR(t, d) \ 2154 ((idn_mboxtbl_t *)(((ulong_t)(t)) + ((d) * IDN_MBOXTBL_SIZE \ 2155 * IDN_MAX_NETS))) 2156 /* 2157 * --------------------------------------------------------------------- 2158 * Return the pointer to the actual target mailbox based on the 2159 * given channel in the given mailbox table. 2160 * --------------------------------------------------------------------- 2161 */ 2162 #define IDN_MBOXTBL_PTR_CHAN(t, c) \ 2163 ((idn_mboxtbl_t *)(((ulong_t)(t)) + ((c) * IDN_MBOXTBL_SIZE))) 2164 2165 #define IDN_MBOXTBL_PTR_INC(t) \ 2166 ((t) = (idn_mboxtbl_t *)(((ulong_t)(t)) + IDN_MBOXTBL_SIZE)) 2167 2168 #define IDN_MBOXCHAN_INC(i) \ 2169 { \ 2170 if (++(i) == IDN_MAX_NETS) \ 2171 (i) = 0; \ 2172 } 2173 2174 /* 2175 * --------------------------------------------------------------------- 2176 * Return the absolute location within the entire mailbox area 2177 * of the mboxtbl for the given primary and secondary domain and 2178 * channel. Only relevant when done by the master. 2179 * --------------------------------------------------------------------- 2180 */ 2181 #define IDN_MBOXTBL_ABS_PTR(mt, pd, sd, ch) \ 2182 (IDN_MBOXTBL_PTR_CHAN( \ 2183 IDN_MBOXTBL_PTR( \ 2184 IDN_MBOXAREA_BASE((mt), (pd)), \ 2185 (sd)), \ 2186 (ch))) 2187 2188 #define IDN_BFRAME_SHIFT idn.bframe_shift 2189 #define IDN_BFRAME2OFFSET(bf) ((bf) << IDN_BFRAME_SHIFT) 2190 #define IDN_BFRAME2ADDR(bf) IDN_OFFSET2ADDR(IDN_BFRAME2OFFSET(bf)) 2191 #define IDN_OFFSET2BFRAME(off) (((off) >> IDN_BFRAME_SHIFT) & 0xffffff) 2192 #define IDN_ADDR2BFRAME(addr) IDN_OFFSET2BFRAME(IDN_ADDR2OFFSET(addr)) 2193 2194 typedef struct idn_mboxmsg { 2195 uint_t ms_owner : 1, 2196 ms_flag : 7, 2197 ms_bframe : 24; 2198 } idn_mboxmsg_t; 2199 2200 typedef idn_mboxmsg_t idn_mboxq_t[1]; 2201 2202 #define IDN_CKSUM_MBOX_COUNT (offsetof(idn_mboxhdr_t, mh_svr_ready) / 2) 2203 2204 #define IDN_CKSUM_MBOX(h) \ 2205 (IDN_CHECKSUM ? \ 2206 idn_cksum((ushort_t *)(h), IDN_CKSUM_MBOX_COUNT) : 0) 2207 2208 typedef struct idn_mboxhdr { 2209 uint_t mh_cookie; 2210 uint_t mh_svr_ready_ptr; 2211 uint_t mh_svr_active_ptr; 2212 ushort_t mh_svr_ready; 2213 ushort_t mh_svr_active; 2214 2215 uint_t _padding[(64 - 2216 (4*sizeof (uint_t)) - 2217 (2*sizeof (ushort_t))) / sizeof (uint_t)]; 2218 2219 uint_t mh_cksum; 2220 } idn_mboxhdr_t; 2221 2222 typedef struct idn_mboxtbl { 2223 idn_mboxhdr_t mt_header; 2224 idn_mboxq_t mt_queue; 2225 } idn_mboxtbl_t; 2226 2227 #define IDN_CHAN_DOMAIN_REGISTER(csp, dom) \ 2228 (DOMAINSET_ADD((csp)->ch_reg_domset, (dom))) 2229 2230 #define IDN_CHAN_DOMAIN_UNREGISTER(csp, dom) \ 2231 (DOMAINSET_DEL((csp)->ch_reg_domset, (dom))) 2232 2233 #define IDN_CHAN_DOMAIN_IS_REGISTERED(csp, dom) \ 2234 (DOMAIN_IN_SET((csp)->ch_reg_domset, (dom))) 2235 2236 #define IDN_CHANSVR_SCANSET_ADD_PENDING(csp, dom) \ 2237 { \ 2238 register int _d; \ 2239 register uint64_t _domset; \ 2240 (dom) &= MAX_DOMAINS - 1; /* Assumes power of 2 */ \ 2241 _domset = 0ull; \ 2242 for (_d = 0; _d < (csp)->ch_recv_domcount; _d++) { \ 2243 if ((int)(((csp)->ch_recv_scanset_pending >> \ 2244 (_d * 4)) & 0xf) == (dom)) \ 2245 break; \ 2246 else \ 2247 _domset = (_domset << 4) | 0xfull; \ 2248 } \ 2249 if (_d == (csp)->ch_recv_domcount) { \ 2250 _domset &= (csp)->ch_recv_scanset_pending; \ 2251 _domset |= (uint64_t)(dom) << \ 2252 ((csp)->ch_recv_domcount * 4); \ 2253 (csp)->ch_recv_domcount++; \ 2254 (csp)->ch_recv_scanset_pending = 0ull; \ 2255 for (_d = 0; _d < 16; \ 2256 _d += (csp)->ch_recv_domcount) { \ 2257 (csp)->ch_recv_scanset_pending |= _domset; \ 2258 _domset <<= (csp)->ch_recv_domcount * 4; \ 2259 } \ 2260 } \ 2261 } 2262 #define IDN_CHANSVR_SCANSET_DEL_PENDING(csp, dom) \ 2263 { \ 2264 register int _d; \ 2265 register uint64_t _domset; \ 2266 (dom) &= MAX_DOMAINS - 1; /* Assumes power of 2 */ \ 2267 _domset = 0ull; \ 2268 for (_d = 0; _d < (csp)->ch_recv_domcount; _d++) { \ 2269 if ((int)(((csp)->ch_recv_scanset_pending >> \ 2270 (_d * 4)) & 0xf) == (dom)) \ 2271 break; \ 2272 else \ 2273 _domset = (_domset << 4) | 0xfull; \ 2274 } \ 2275 if (_d < (csp)->ch_recv_domcount) { \ 2276 _domset &= (csp)->ch_recv_scanset_pending; \ 2277 (csp)->ch_recv_scanset_pending >>= 4; \ 2278 (csp)->ch_recv_domcount--; \ 2279 for (; _d < (csp)->ch_recv_domcount; _d++) \ 2280 _domset |= (csp)->ch_recv_scanset_pending &\ 2281 (0xfull << (_d * 4)); \ 2282 (csp)->ch_recv_scanset_pending = 0ull; \ 2283 if ((csp)->ch_recv_domcount) { \ 2284 for (_d = 0; _d < 16; \ 2285 _d += (csp)->ch_recv_domcount) { \ 2286 (csp)->ch_recv_scanset_pending |= \ 2287 _domset; \ 2288 _domset <<= \ 2289 (csp)->ch_recv_domcount * 4; \ 2290 } \ 2291 } \ 2292 } \ 2293 } 2294 2295 #define IDN_CHAN_TRYLOCK_GLOBAL(csp) \ 2296 mutex_tryenter(&(csp)->ch_mutex) 2297 #define IDN_CHAN_LOCK_GLOBAL(csp) \ 2298 mutex_enter(&(csp)->ch_mutex) 2299 #define IDN_CHAN_UNLOCK_GLOBAL(csp) \ 2300 mutex_exit(&(csp)->ch_mutex) 2301 #define IDN_CHAN_GLOBAL_IS_LOCKED(csp) \ 2302 (MUTEX_HELD(&(csp)->ch_mutex)) 2303 2304 #define IDN_CHAN_LOCAL_IS_LOCKED(csp) \ 2305 (MUTEX_HELD(&(csp)->ch_send.c_mutex) && \ 2306 MUTEX_HELD(&(csp)->ch_recv.c_mutex)) 2307 #define IDN_CHAN_LOCK_LOCAL(csp) \ 2308 (mutex_enter(&(csp)->ch_recv.c_mutex, \ 2309 mutex_enter(&(csp)->ch_send.c_mutex)) 2310 #define IDN_CHAN_UNLOCK_LOCAL(csp) \ 2311 (mutex_exit(&(csp)->ch_send.c_mutex), \ 2312 mutex_exit(&(csp)->ch_recv.c_mutex)) 2313 2314 #define IDN_CHAN_RECV_IS_LOCKED(csp) \ 2315 (MUTEX_HELD(&(csp)->ch_recv.c_mutex)) 2316 #define IDN_CHAN_TRYLOCK_RECV(csp) \ 2317 (mutex_tryenter(&(csp)->ch_recv.c_mutex)) 2318 #define IDN_CHAN_LOCK_RECV(csp) \ 2319 (mutex_enter(&(csp)->ch_recv.c_mutex)) 2320 #define IDN_CHAN_UNLOCK_RECV(csp) \ 2321 (mutex_exit(&(csp)->ch_recv.c_mutex)) 2322 2323 #define IDN_CHAN_SEND_IS_LOCKED(csp) \ 2324 (MUTEX_HELD(&(csp)->ch_send.c_mutex)) 2325 #define IDN_CHAN_TRYLOCK_SEND(csp) \ 2326 (mutex_tryenter(&(csp)->ch_send.c_mutex)) 2327 #define IDN_CHAN_LOCK_SEND(csp) \ 2328 (mutex_enter(&(csp)->ch_send.c_mutex)) 2329 #define IDN_CHAN_UNLOCK_SEND(csp) \ 2330 (mutex_exit(&(csp)->ch_send.c_mutex)) 2331 2332 /* 2333 * A channel table is an array of pointers to mailboxes 2334 * for the respective domains for the given channel. 2335 * Used a cache for the frequently used items. Respective 2336 * fields in mainmbox are updated just prior to sleeping. 2337 */ 2338 2339 /* 2340 * Reading c_state requires either c_mutex or ch_mutex. 2341 * Writing c_state requires both c_mutex and ch_mutex in the order: 2342 * ch_mutex 2343 * c_mutex 2344 */ 2345 typedef struct idn_chaninfo { 2346 kmutex_t c_mutex; 2347 uchar_t c_state; /* protected by c_mutex */ 2348 uchar_t c_checkin; /* asynchronous flag */ 2349 kcondvar_t c_cv; 2350 ushort_t c_waiters; /* protected by c_mutex */ 2351 ushort_t c_inprogress; /* protected by c_mutex */ 2352 } idn_chaninfo_t; 2353 2354 /* 2355 * Reading/Writing ch_state requires ch_mutex. 2356 * When updating both recv and send c_state's for the locks 2357 * must be grabbed in the following order: 2358 * ch_mutex 2359 * ch_recv.c_mutex 2360 * ch_send.c_mutex 2361 * This order is necessary to prevent deadlocks. 2362 * In general ch_state is intended to represent c_state of 2363 * individual send/recv sides. During state transitions the 2364 * ch_state and c_state values may be slightly different, 2365 * but eventually should end up identical. 2366 */ 2367 typedef struct idn_chansvr { 2368 uchar_t ch_id; 2369 uchar_t ch_state; /* protected by ch_mutex */ 2370 lock_t ch_initlck; 2371 lock_t ch_actvlck; 2372 domainset_t ch_reg_domset; 2373 kmutex_t ch_mutex; 2374 2375 idn_chaninfo_t ch_send; 2376 int _padding2[(64 - 2377 (2*sizeof (uchar_t)) - (2*sizeof (lock_t)) - 2378 sizeof (uint_t) - sizeof (kmutex_t) - 2379 sizeof (idn_chaninfo_t)) / sizeof (int)]; 2380 2381 idn_chaninfo_t ch_recv; 2382 2383 uint64_t ch_recv_scanset; 2384 uint64_t ch_recv_scanset_pending; 2385 2386 domainset_t ch_recv_domset; 2387 domainset_t ch_recv_domset_pending; 2388 short ch_recv_domcount; 2389 kcondvar_t ch_recv_cv; 2390 int ch_recv_waittime; 2391 int ch_recv_changed; 2392 2393 kthread_id_t ch_recv_threadp; 2394 ksema_t *ch_recv_morguep; 2395 int ch_bound_cpuid; 2396 int ch_bound_cpuid_pending; 2397 } idn_chansvr_t; 2398 2399 typedef struct idn_mainmbox { 2400 kmutex_t mm_mutex; 2401 short mm_channel; 2402 short mm_domid; 2403 ushort_t mm_flags; 2404 short mm_type; 2405 2406 idn_chansvr_t *mm_csp; /* non-NULL indicates reg'd */ 2407 int mm_count; 2408 int mm_dropped; 2409 idn_mboxtbl_t *mm_smr_mboxp; /* SMR vaddr */ 2410 2411 ushort_t *mm_smr_activep; /* SMR pointer */ 2412 ushort_t *mm_smr_readyp; /* SMR pointer */ 2413 int mm_qiget; /* next msg to get */ 2414 int mm_qiput; /* next slot to put msg */ 2415 } idn_mainmbox_t; 2416 2417 /* 2418 * mm_flags 2419 */ 2420 #define IDNMMBOX_FLAG_CORRUPTED 0x01 2421 /* 2422 * mm_type 2423 */ 2424 #define IDNMMBOX_TYPE_RECV 0x1 2425 #define IDNMMBOX_TYPE_SEND 0x2 2426 2427 #define IDNMBOX_IS_RECV(m) ((m) == IDNMMBOX_TYPE_RECV) 2428 #define IDNMBOX_IS_SEND(m) ((m) == IDNMMBOX_TYPE_SEND) 2429 2430 /* 2431 * Period between sending wakeup xdc's to remote domain. 2432 */ 2433 #define IDN_CHANNEL_WAKEUP_PERIOD (hz >> 1) 2434 /* 2435 * ms_flag bit values. 2436 */ 2437 #define IDN_MBOXMSG_FLAG_RECLAIM 0x1 /* needs to be reclaimed */ 2438 #define IDN_MBOXMSG_FLAG_INPROCESS 0x2 2439 #define IDN_MBOXMSG_FLAG_ERR_BADOFFSET 0x4 2440 #define IDN_MBOXMSG_FLAG_ERR_NOMBOX 0x8 2441 #define IDN_MBOXMSG_FLAG_ERRMASK 0xc 2442 /* 2443 * ch_state/c_state bit values. 2444 */ 2445 #define IDN_CHANSVC_STATE_ATTACHED 0x01 2446 #define IDN_CHANSVC_STATE_ENABLED 0x02 2447 #define IDN_CHANSVC_STATE_ACTIVE 0x04 2448 #define IDN_CHANSVC_STATE_FLUSH 0x10 2449 #define IDN_CHANSVC_STATE_CORRUPTED 0x20 2450 #define IDN_CHANSVC_STATE_MASK 0x07 /* ATTACHED/ENABLED/ACTIVE */ 2451 2452 #define IDN_CHANSVC_PENDING_BITS (IDN_CHANSVC_STATE_ATTACHED | \ 2453 IDN_CHANSVC_STATE_ENABLED) 2454 2455 /* 2456 * GLOBAL 2457 */ 2458 #define IDN_CHANNEL_IS_ATTACHED(csp) \ 2459 ((csp)->ch_state & IDN_CHANSVC_STATE_ATTACHED) 2460 #define IDN_CHANNEL_IS_DETACHED(csp) \ 2461 (!IDN_CHANNEL_IS_ATTACHED(csp)) 2462 #define IDN_CHANNEL_IS_PENDING(csp) \ 2463 (((csp)->ch_state & IDN_CHANSVC_STATE_MASK) == \ 2464 IDN_CHANSVC_PENDING_BITS) 2465 #define IDN_CHANNEL_IS_ACTIVE(csp) \ 2466 ((csp)->ch_state & IDN_CHANSVC_STATE_ACTIVE) 2467 #define IDN_CHANNEL_IS_ENABLED(csp) \ 2468 ((csp)->ch_state & IDN_CHANSVC_STATE_ENABLED) 2469 /* 2470 * SEND 2471 */ 2472 #define IDN_CHANNEL_IS_SEND_ACTIVE(csp) \ 2473 ((csp)->ch_send.c_state & IDN_CHANSVC_STATE_ACTIVE) 2474 /* 2475 * RECV 2476 */ 2477 #define IDN_CHANNEL_IS_RECV_ACTIVE(csp) \ 2478 ((csp)->ch_recv.c_state & IDN_CHANSVC_STATE_ACTIVE) 2479 #define IDN_CHANNEL_IS_RECV_CORRUPTED(csp) \ 2480 ((csp)->ch_recv.c_state & IDN_CHANSVC_STATE_CORRUPTED) 2481 2482 2483 #define IDN_CHAN_SEND_INPROGRESS(csp) ((csp)->ch_send.c_inprogress++) 2484 #define IDN_CHAN_SEND_DONE(csp) \ 2485 { \ 2486 ASSERT((csp)->ch_send.c_inprogress > 0); \ 2487 if ((--((csp)->ch_send.c_inprogress) == 0) && \ 2488 ((csp)->ch_send.c_waiters != 0)) \ 2489 cv_broadcast(&(csp)->ch_send.c_cv); \ 2490 } 2491 #define IDN_CHAN_RECV_INPROGRESS(csp) ((csp)->ch_recv.c_inprogress++) 2492 #define IDN_CHAN_RECV_DONE(csp) \ 2493 { \ 2494 ASSERT((csp)->ch_recv.c_inprogress > 0); \ 2495 if ((--((csp)->ch_recv.c_inprogress) == 0) && \ 2496 ((csp)->ch_recv.c_waiters != 0)) \ 2497 cv_broadcast(&(csp)->ch_recv.c_cv); \ 2498 } 2499 2500 #define IDN_CHANSVC_MARK_ATTACHED(csp) \ 2501 ((csp)->ch_state = IDN_CHANSVC_STATE_ATTACHED) 2502 #define IDN_CHANSVC_MARK_DETACHED(csp) \ 2503 ((csp)->ch_state = 0) 2504 #define IDN_CHANSVC_MARK_PENDING(csp) \ 2505 ((csp)->ch_state |= IDN_CHANSVC_STATE_ENABLED) 2506 #define IDN_CHANSVC_MARK_DISABLED(csp) \ 2507 ((csp)->ch_state &= ~IDN_CHANSVC_STATE_ENABLED) 2508 #define IDN_CHANSVC_MARK_ACTIVE(csp) \ 2509 ((csp)->ch_state |= IDN_CHANSVC_STATE_ACTIVE) 2510 #define IDN_CHANSVC_MARK_IDLE(csp) \ 2511 ((csp)->ch_state &= ~IDN_CHANSVC_STATE_ACTIVE) 2512 2513 #define IDN_CHANSVC_MARK_RECV_ACTIVE(csp) \ 2514 ((csp)->ch_recv.c_state |= IDN_CHANSVC_STATE_ACTIVE) 2515 #define IDN_CHANSVC_MARK_RECV_CORRUPTED(csp) \ 2516 ((csp)->ch_recv.c_state |= IDN_CHANSVC_STATE_CORRUPTED) 2517 #define IDN_CHANSVC_MARK_SEND_ACTIVE(csp) \ 2518 ((csp)->ch_send.c_state |= IDN_CHANSVC_STATE_ACTIVE) 2519 2520 typedef enum { 2521 IDNCHAN_ACTION_DETACH, /* DETACH (ATTACHED = 0) */ 2522 IDNCHAN_ACTION_STOP, /* DISABLE (ENABLED = 0) */ 2523 IDNCHAN_ACTION_SUSPEND, /* IDLE (ACTIVE = 0) */ 2524 IDNCHAN_ACTION_RESUME, 2525 IDNCHAN_ACTION_RESTART, 2526 IDNCHAN_ACTION_ATTACH 2527 } idn_chanaction_t; 2528 2529 #define IDN_CHANNEL_SUSPEND(c, w) \ 2530 (idn_chan_action((c), IDNCHAN_ACTION_SUSPEND, (w))) 2531 #define IDN_CHANNEL_RESUME(c) \ 2532 (idn_chan_action((c), IDNCHAN_ACTION_RESUME, 0)) 2533 #define IDN_CHANNEL_STOP(c, w) \ 2534 (idn_chan_action((c), IDNCHAN_ACTION_STOP, (w))) 2535 #define IDN_CHANNEL_RESTART(c) \ 2536 (idn_chan_action((c), IDNCHAN_ACTION_RESTART, 0)) 2537 #define IDN_CHANNEL_DETACH(c, w) \ 2538 (idn_chan_action((c), IDNCHAN_ACTION_DETACH, (w))) 2539 #define IDN_CHANNEL_ATTACH(c) \ 2540 (idn_chan_action((c), IDNCHAN_ACTION_ATTACH, 0)) 2541 2542 /* 2543 * ds_waittime range values. 2544 * When a packet arrives the waittime starts at MIN and gradually 2545 * shifts up to MAX until another packet arrives. If still no 2546 * packet arrives then we go to a hard sleep 2547 */ 2548 #define IDN_NETSVR_SPIN_COUNT idn_netsvr_spin_count 2549 #define IDN_NETSVR_WAIT_MIN idn_netsvr_wait_min 2550 #define IDN_NETSVR_WAIT_MAX idn_netsvr_wait_max 2551 #define IDN_NETSVR_WAIT_SHIFT idn_netsvr_wait_shift 2552 2553 /* 2554 * --------------------------------------------------------------------- 2555 * IDN Global Data 2556 * 2557 * The comment to the right of the respective field represents 2558 * what lock protects that field. If there is no comment then 2559 * no lock is required to access the field. 2560 * --------------------------------------------------------------------- 2561 */ 2562 typedef struct idn_global { /* protected by... */ 2563 krwlock_t grwlock; 2564 /* 2565 * Global state of IDN w.r.t. 2566 * the local domain. 2567 */ 2568 idn_gstate_t state; /* grwlock */ 2569 /* 2570 * Version of the IDN driver. 2571 * Is passed in DMV header so that 2572 * other domains can validate they 2573 * support protocol used by local 2574 * domain. 2575 */ 2576 int version; 2577 /* 2578 * Set to 1 if SMR region properly 2579 * allocated and available. 2580 */ 2581 int enabled; 2582 /* 2583 * Local domains "domain id". 2584 */ 2585 int localid; 2586 /* 2587 * Domain id of the Master domain. 2588 * Set to IDN_NIL_DOMID if none 2589 * currently exists. 2590 */ 2591 int masterid; /* grwlock */ 2592 /* 2593 * Primarily used during Reconfiguration 2594 * to track the expected new Master. 2595 * Once the current IDN is dismantled 2596 * the local domain will attempt to 2597 * connect to this new domain. 2598 */ 2599 int new_masterid; /* grwlock */ 2600 /* 2601 * Number of protocol servers configured. 2602 */ 2603 int nservers; 2604 2605 dev_info_t *dip; 2606 2607 struct { 2608 /* 2609 * dmv_inum 2610 * Interrupt number assigned by 2611 * DMV subsystem to IDN's DMV 2612 * handler. 2613 * soft_inum 2614 * Soft interrupt number assigned 2615 * by OS (add_softintr) for Soft 2616 * interrupt dispatched by DMV 2617 * handler. 2618 */ 2619 uint_t dmv_inum; 2620 uint64_t soft_inum; 2621 caddr_t dmv_data; 2622 size_t dmv_data_len; 2623 } intr; 2624 /* 2625 * first_swlink 2626 * Used as synchronization to 2627 * know whether channels need 2628 * to be activated or not. 2629 * first_hwlink 2630 * Used as mechanism to determine 2631 * whether local domain needs 2632 * to publicize its SMR, assuming 2633 * it is the Master. 2634 * first_hwmaster 2635 * Domainid of the domain that 2636 * was the master at the time 2637 * the hardware was programmed. 2638 * We need to keep this so that 2639 * we deprogram with respect to 2640 * the correct domain that the 2641 * hardware was originally 2642 * programmed to. 2643 */ 2644 lock_t first_swlink; 2645 lock_t first_hwlink; 2646 short first_hwmasterid; 2647 /* 2648 * The xmit* fields are used to set-up a background 2649 * thread to monitor when a channel is ready to be 2650 * enabled again. This is necessary since IDN 2651 * can't rely on hardware to interrupt it when 2652 * things are ready to go. We need this ability 2653 * to wakeup our STREAMS queues. 2654 * Criteria for reenabling queues. 2655 * gstate == IDNGS_ONLINE 2656 * channel = !check-in 2657 * buffers are available 2658 * 2659 * xmit_chanset_wanted 2660 * Indicates which channels wish to have 2661 * their queues reenabled when ready. 2662 * xmit_tid 2663 * Timeout-id of monitor. 2664 */ 2665 kmutex_t xmit_lock; 2666 idn_chanset_t xmit_chanset_wanted; /* xmit_lock */ 2667 timeout_id_t xmit_tid; /* xmit_lock */ 2668 2669 struct { 2670 /* 2671 * ready 2672 * Indicates SMR region allocated 2673 * and available from OBP. 2674 * vaddr 2675 * Virtual address assigned to SMR. 2676 * locpfn 2677 * Page Frame Number associated 2678 * with local domain's SMR. 2679 * rempfn 2680 * Page Frame Number associated 2681 * with remote (Master) domain's SMR. 2682 * rempfnlim 2683 * PFN past end of remote domain's 2684 * SMR. 2685 * prom_paddr/prom_size 2686 * Physical address and size of 2687 * SMR that were assigned by OBP. 2688 */ 2689 int ready; 2690 caddr_t vaddr; 2691 pfn_t locpfn; 2692 pfn_t rempfn; /* grwlock */ 2693 2694 pfn_t rempfnlim; /* grwlock */ 2695 uint64_t prom_paddr; 2696 2697 uint64_t prom_size; 2698 } smr; 2699 2700 /* 2701 * idnsb_mutex 2702 * Protects access to IDN's 2703 * sigblock area. 2704 * idnsb_eventp 2705 * IDN's private area in sigblock 2706 * used for signaling events 2707 * regarding IDN state to SSP. 2708 * idnsb 2709 * Area within IDN's private 2710 * sigblock area used for tracking 2711 * certain IDN state which might 2712 * be useful during arbstop 2713 * conditions (if caused by IDN!). 2714 */ 2715 kmutex_t idnsb_mutex; 2716 idnsb_event_t *idnsb_eventp; 2717 idnsb_t *idnsb; 2718 2719 struct sigbintr { 2720 /* 2721 * sb_mutex 2722 * Protects sigbintr elements 2723 * to synchronize execution of 2724 * sigblock (IDN) mailbox handling. 2725 * sb_cpuid 2726 * Cpu whose sigblock mailbox 2727 * originally received IDN request 2728 * from SSP. Necessary to know 2729 * where to put response. 2730 * sb_busy 2731 * Flag indicating state of 2732 * sigblock handler thread. 2733 * Synchronize activity between 2734 * SSP and current IDN requests that 2735 * are in progress. 2736 * sb_cv 2737 * Condition variable for sigblock 2738 * handler thread to wait on. 2739 * sb_inum 2740 * Soft interrupt number assigned 2741 * by OS to handle soft interrupt 2742 * request make by low-level (IDN) 2743 * sigblock handler to dispatch actual 2744 * processing of sigblock (mailbox) 2745 * request. 2746 */ 2747 kmutex_t sb_mutex; 2748 uchar_t sb_cpuid; /* sigbintr.sb_mutex */ 2749 uchar_t sb_busy; /* sigbintr.sb_mutex */ 2750 kcondvar_t sb_cv; /* sigbintr.sb_mutex */ 2751 uint64_t sb_inum; /* sigbintr.sb_mutex */ 2752 } sigbintr; 2753 2754 /* 2755 * struprwlock, strup, sip, siplock 2756 * Standard network streams 2757 * handling structures to manage 2758 * instances of IDN driver. 2759 */ 2760 krwlock_t struprwlock; 2761 struct idnstr *strup; /* struprwlock */ 2762 2763 struct idn *sip; /* siplock */ 2764 kmutex_t sipwenlock; 2765 kmutex_t siplock; 2766 2767 /* 2768 * Area where IDN maintains its kstats. 2769 */ 2770 kstat_t *ksp; 2771 /* 2772 * Number of domains that local domain 2773 * has "open". 2774 */ 2775 int ndomains; /* grwlock */ 2776 /* 2777 * Number of domains that local domain 2778 * has registered as non-responsive. 2779 */ 2780 int nawols; /* grwlock */ 2781 /* 2782 * Number of network channels (interfaces) 2783 * which are currently active. 2784 */ 2785 int nchannels; /* grwlock */ 2786 /* 2787 * Bitmask representing channels 2788 * that are currently active. 2789 */ 2790 idn_chanset_t chanset; /* grwlock */ 2791 /* 2792 * Array of channel (network/data) servers 2793 * that have been created. Not necessarily 2794 * all active. 2795 */ 2796 idn_chansvr_t *chan_servers; /* elmts = ch_mutex */ 2797 /* 2798 * Pointer to sigblock handler thread 2799 * which ultimately processes SSP 2800 * IDN requests. 2801 */ 2802 kthread_id_t sigb_threadp; 2803 /* 2804 * Pointer to area used by Master 2805 * to hold mailbox structures. 2806 * Actual memory is in SMR. 2807 */ 2808 idn_mboxtbl_t *mboxarea; /* grwlock */ 2809 2810 struct { 2811 /* 2812 * IDN_SYNC_LOCK - Provides serialization 2813 * mechanism when performing synchronous 2814 * operations across domains. 2815 */ 2816 kmutex_t sz_mutex; 2817 /* 2818 * Actual synchronization zones for 2819 * CONNECT/DISCONNECT phases. 2820 */ 2821 idn_synczone_t sz_zone[IDN_SYNC_NUMZONE]; 2822 } sync; /* sz_mutex */ 2823 2824 struct { 2825 /* 2826 * ds_trans_on 2827 * Set of domains which are trying 2828 * to establish a link w/local. 2829 * ds_ready_on 2830 * Set of domains which local knows 2831 * are ready for linking, but has 2832 * not yet confirmed w/peers. 2833 * ds_connected 2834 * Set of domains that local has 2835 * confirmed as being ready. 2836 * ds_trans_off 2837 * Set of domains which are trying 2838 * to unlink from local. 2839 * ds_ready_off 2840 * Set of domains which local knows 2841 * are ready for unlink, but has 2842 * not yet confirmed w/peers. 2843 * ds_relink 2844 * Set of domains we're expecting 2845 * to relink with subsequent to 2846 * a RECONFIG (new master selection). 2847 * ds_hwlinked 2848 * Set of domains for which local 2849 * has programmed its hardware. 2850 * ds_flush 2851 * Set of domains requiring that 2852 * local flush its ecache prior 2853 * to unlinking. 2854 * ds_awol 2855 * Set of domains believed to be 2856 * AWOL - haven't responded to 2857 * any queries. 2858 * ds_hitlist 2859 * Set of domains which local domain 2860 * is unlinking from and wishes to ignore 2861 * any extraneous indirect link requests 2862 * from other domains, e.g. during a 2863 * Reconfig. 2864 */ 2865 domainset_t ds_trans_on; /* sz_mutex */ 2866 domainset_t ds_ready_on; /* sz_mutex */ 2867 2868 domainset_t ds_connected; /* sz_mutex */ 2869 domainset_t ds_trans_off; /* sz_mutex */ 2870 2871 domainset_t ds_ready_off; /* sz_mutex */ 2872 domainset_t ds_relink; /* sz_mutex */ 2873 2874 domainset_t ds_hwlinked; /* sz_mutex */ 2875 domainset_t ds_flush; /* sz_mutex */ 2876 2877 domainset_t ds_awol; /* sz_mutex */ 2878 domainset_t ds_hitlist; /* sz_mutex */ 2879 } domset; 2880 /* 2881 * Bitmask identifying all cpus in 2882 * the local IDN. 2883 */ 2884 cpuset_t dc_cpuset; 2885 /* 2886 * Bitmask identifying all boards in 2887 * the local IDN. 2888 */ 2889 boardset_t dc_boardset; 2890 2891 struct dopers { 2892 /* 2893 * Waiting area for IDN requests, 2894 * i.e. link & unlinks. IDN requests 2895 * are performed asynchronously so 2896 * we need a place to wait until the 2897 * operation has completed. 2898 * 2899 * dop_domset 2900 * Identifies which domains the 2901 * current waiter is interested in. 2902 * dop_waitcount 2903 * Number of waiters in the room. 2904 * dop_waitlist 2905 * Actual waiting area. 2906 * dop_freelist 2907 * Freelist (small cache) of 2908 * structs for waiting area. 2909 */ 2910 kmutex_t dop_mutex; 2911 kcondvar_t dop_cv; /* dop_mutex */ 2912 domainset_t dop_domset; /* dop_mutex */ 2913 int dop_waitcount; /* dop_mutex */ 2914 dop_waitlist_t *dop_waitlist; /* dop_mutex */ 2915 dop_waitlist_t *dop_freelist; /* dop_mutex */ 2916 /* dop_mutex */ 2917 dop_waitlist_t _dop_wcache[IDNOP_CACHE_SIZE]; 2918 } *dopers; 2919 2920 struct { 2921 /* 2922 * Protocol Server: 2923 * 2924 * p_server 2925 * Linked list of queues 2926 * describing protocol 2927 * servers in use. 2928 * p_jobpool 2929 * Kmem cache of structs 2930 * used to enqueue protocol 2931 * jobs for protocol servers. 2932 * p_morgue 2933 * Synchronization (check-in) 2934 * area used when terminating 2935 * protocol servers (threads). 2936 */ 2937 struct idn_protoqueue *p_serverq; 2938 kmem_cache_t *p_jobpool; 2939 ksema_t p_morgue; 2940 } protocol; 2941 2942 struct idn_retry_queue { 2943 /* 2944 * rq_jobs 2945 * Queue of Retry jobs 2946 * that are outstanding. 2947 * rq_count 2948 * Number of jobs on retry 2949 * queue. 2950 * rq_cache 2951 * Kmem cache for structs 2952 * used to describe retry 2953 * jobs. 2954 */ 2955 idn_retry_job_t *rq_jobs; /* rq_mutex */ 2956 int rq_count; /* rq_mutex */ 2957 kmutex_t rq_mutex; /* rq_mutex */ 2958 2959 kcondvar_t rq_cv; /* rq_mutex */ 2960 kmem_cache_t *rq_cache; 2961 } retryqueue; 2962 2963 struct slabpool { 2964 /* 2965 * Slabpool: 2966 * 2967 * ntotslabs 2968 * Total number of slabs 2969 * in SMR (free & in-use). 2970 * npools 2971 * Number of pools available 2972 * in list. One smr_slabtbl 2973 * exists for each pool. 2974 */ 2975 int ntotslabs; 2976 int npools; 2977 struct smr_slabtbl { 2978 /* 2979 * sarray 2980 * Array of slab structs 2981 * representing slabs in SMR. 2982 * nfree 2983 * Number of slabs actually 2984 * available in sarray. 2985 * nslabs 2986 * Number of slabs represented 2987 * in sarray (free & in-use). 2988 */ 2989 smr_slab_t *sarray; 2990 int nfree; 2991 int nslabs; 2992 } *pool; 2993 /* 2994 * Holds array of smr_slab_t structs kmem_alloc'd 2995 * for slabpool. 2996 */ 2997 smr_slab_t *savep; 2998 } *slabpool; 2999 3000 struct slabwaiter { 3001 /* 3002 * Waiting area for threads 3003 * requesting slab allocations. 3004 * Used by Slaves for all requests, 3005 * but used by Master only for 3006 * redundant requests, i.e. multiple 3007 * requests on behalf of the same 3008 * domain. One slabwaiter area 3009 * exist for each possible domain. 3010 * 3011 * w_nwaiters 3012 * Number of threads waiting 3013 * in waiting area. 3014 * w_done 3015 * Flag to indicate that 3016 * allocation request has 3017 * completed. 3018 * w_serrno 3019 * Non-zero indicates an 3020 * errno value to represent 3021 * error that occurred during 3022 * attempt to allocate slab. 3023 * w_closed 3024 * Indicates that waiting area is 3025 * closed and won't allow any new 3026 * waiters. This occurs during 3027 * the small window where we're 3028 * trying to suspend a channel. 3029 * w_cv 3030 * Condvar for waiting on. 3031 * w_sp 3032 * Holds slab structure of 3033 * successfully allocated slab. 3034 */ 3035 kmutex_t w_mutex; 3036 short w_nwaiters; /* w_mutex */ 3037 short w_done; /* w_mutex */ 3038 short w_serrno; /* w_mutex */ 3039 short w_closed; /* w_mutex */ 3040 kcondvar_t w_cv; /* w_mutex */ 3041 smr_slab_t *w_sp; /* w_mutex */ 3042 } *slabwaiter; 3043 /* 3044 * Kmem cache used for allocating 3045 * timer structures for outstanding 3046 * IDN requests. 3047 */ 3048 kmem_cache_t *timer_cache; 3049 /* 3050 * Effectively constant used in 3051 * translating buffer frames in 3052 * mailbox message frames to 3053 * offsets within SMR. 3054 */ 3055 int bframe_shift; 3056 } idn_global_t; 3057 3058 typedef struct idn_retry_queue idn_retry_queue_t; 3059 3060 #define IDN_GET_MASTERID() (idn.masterid) 3061 #define IDN_SET_MASTERID(mid) \ 3062 { \ 3063 int _mid = (mid); \ 3064 mutex_enter(&idn.idnsb_mutex); \ 3065 if (idn.idnsb) { \ 3066 idn.idnsb->id_pmaster_board = \ 3067 idn.idnsb->id_master_board; \ 3068 if (_mid == IDN_NIL_DOMID) \ 3069 idn.idnsb->id_master_board = (uchar_t)0xff; \ 3070 else \ 3071 idn.idnsb->id_master_board = \ 3072 (uchar_t)idn_domain[_mid].dvote.v.board; \ 3073 } \ 3074 mutex_exit(&idn.idnsb_mutex); \ 3075 IDN_HISTORY_LOG(IDNH_MASTERID, _mid, idn.masterid, 0); \ 3076 PR_STATE("%d: MASTERID %d -> %d\n", __LINE__, \ 3077 idn.masterid, _mid); \ 3078 idn.masterid = _mid; \ 3079 } 3080 #define IDN_GET_NEW_MASTERID() (idn.new_masterid) 3081 #define IDN_SET_NEW_MASTERID(mid) \ 3082 { \ 3083 PR_STATE("%d: NEW MASTERID %d -> %d\n", __LINE__, \ 3084 idn.new_masterid, (mid)); \ 3085 idn.new_masterid = (mid); \ 3086 } 3087 3088 #define IDN_GLOCK_EXCL() (rw_enter(&idn.grwlock, RW_WRITER)) 3089 #define IDN_GLOCK_SHARED() (rw_enter(&idn.grwlock, RW_READER)) 3090 #define IDN_GLOCK_TRY_SHARED() (rw_tryenter(&idn.grwlock, RW_READER)) 3091 #define IDN_GLOCK_DOWNGRADE() (rw_downgrade(&idn.grwlock)) 3092 #define IDN_GUNLOCK() (rw_exit(&idn.grwlock)) 3093 #define IDN_GLOCK_IS_EXCL() (RW_WRITE_HELD(&idn.grwlock)) 3094 #define IDN_GLOCK_IS_SHARED() (RW_READ_HELD(&idn.grwlock)) 3095 #define IDN_GLOCK_IS_HELD() (RW_LOCK_HELD(&idn.grwlock)) 3096 3097 #define IDN_SYNC_LOCK() (mutex_enter(&idn.sync.sz_mutex)) 3098 #define IDN_SYNC_TRYLOCK() (mutex_tryenter(&idn.sync.sz_mutex)) 3099 #define IDN_SYNC_UNLOCK() (mutex_exit(&idn.sync.sz_mutex)) 3100 #define IDN_SYNC_IS_LOCKED() (MUTEX_HELD(&idn.sync.sz_mutex)) 3101 3102 /* 3103 * Macro to reset some globals necessary in preparing 3104 * for initialization of HW for IDN. 3105 */ 3106 #define IDN_PREP_HWINIT() \ 3107 { \ 3108 ASSERT(IDN_GLOCK_IS_EXCL()); \ 3109 lock_clear(&idn.first_swlink); \ 3110 lock_clear(&idn.first_hwlink); \ 3111 idn.first_hwmasterid = (short)IDN_NIL_DOMID; \ 3112 } 3113 3114 /* 3115 * Return values of idn_send_data. 3116 */ 3117 #define IDNXMIT_OKAY 0 /* xmit successful */ 3118 #define IDNXMIT_LOOP 1 /* loopback */ 3119 #define IDNXMIT_DROP 2 /* drop packet */ 3120 #define IDNXMIT_RETRY 3 /* retry packet (requeue and qenable) */ 3121 #define IDNXMIT_REQUEUE 4 /* requeue packet, but don't qenable */ 3122 3123 /* 3124 * --------------------------------------------------------------------- 3125 * ss_rwlock must be acquired _before_ any idn_domain locks are 3126 * acquired if both structs need to be accessed. 3127 * idn.struprwlock is acquired when traversing IDN's strup list 3128 * and when adding or deleting entries. 3129 * 3130 * ss_nextp Linked list of streams. 3131 * ss_rq Respective read queue. 3132 * ss_sip Attached device. 3133 * ss_state Current DL state. 3134 * ss_sap Bound SAP. 3135 * ss_flags Misc. flags. 3136 * ss_mccount # enabled multicast addrs. 3137 * ss_mctab Table of multicast addrs. 3138 * ss_minor Minor device number. 3139 * ss_rwlock Protects ss_linkup fields and DLPI state machine. 3140 * ss_linkup Boolean flag indicating whether particular (domain) link 3141 * is up. 3142 * --------------------------------------------------------------------- 3143 */ 3144 struct idnstr { /* gets shoved into q_ptr */ 3145 struct idnstr *ss_nextp; 3146 queue_t *ss_rq; 3147 struct idn *ss_sip; 3148 t_uscalar_t ss_state; 3149 t_uscalar_t ss_sap; 3150 uint_t ss_flags; 3151 uint_t ss_mccount; 3152 struct ether_addr *ss_mctab; 3153 minor_t ss_minor; 3154 krwlock_t ss_rwlock; 3155 }; 3156 3157 /* 3158 * idnstr.ss_flags - Per-stream flags 3159 */ 3160 #define IDNSFAST 0x01 /* "M_DATA fastpath" mode */ 3161 #define IDNSRAW 0x02 /* M_DATA plain raw mode */ 3162 #define IDNSALLPHYS 0x04 /* "promiscuous mode" */ 3163 #define IDNSALLMULTI 0x08 /* enable all multicast addresses */ 3164 #define IDNSALLSAP 0x10 /* enable all ether type values */ 3165 3166 /* 3167 * Maximum number of multicast address per stream. 3168 */ 3169 #define IDNMAXMC 64 3170 #define IDNMCALLOC (IDNMAXMC * sizeof (struct ether_addr)) 3171 3172 /* 3173 * Full DLSAP address length (in struct dladdr format). 3174 */ 3175 #define IDNADDRL (ETHERADDRL + sizeof (ushort_t)) 3176 3177 struct idndladdr { 3178 struct ether_addr dl_phys; 3179 ushort_t dl_sap; 3180 }; 3181 3182 #define IDNHEADROOM 64 3183 #define IDNROUNDUP(a, n) (((a) + ((n) - 1)) & ~((n) - 1)) 3184 3185 /* 3186 * Respective interpretation of bytes in 6 byte ethernet address. 3187 */ 3188 #define IDNETHER_ZERO 0 3189 #define IDNETHER_COOKIE1 1 3190 #define IDNETHER_COOKIE1_VAL 0xe5 3191 #define IDNETHER_COOKIE2 2 3192 #define IDNETHER_COOKIE2_VAL 0x82 3193 #define IDNETHER_NETID 3 3194 #define IDNETHER_CHANNEL 4 3195 #define IDNETHER_RESERVED 5 3196 #define IDNETHER_RESERVED_VAL 0x64 3197 3198 /* 3199 * IDN driver supports multliple instances, however they 3200 * still all refer to the same "physical" device. Multiple 3201 * instances are supported primarily to allow increased 3202 * STREAMs bandwidth since each instance has it's own IP queue. 3203 * This structure is primarily defined to be consistent with 3204 * other network drivers and also to hold the kernel stats. 3205 */ 3206 struct idn_kstat { 3207 ulong_t si_ipackets; /* # packets received */ 3208 ulong_t si_ierrors; /* # total input errors */ 3209 ulong_t si_opackets; /* # packets sent */ 3210 ulong_t si_oerrors; /* # total output errors */ 3211 3212 ulong_t si_txcoll; /* # xmit collisions */ 3213 ulong_t si_rxcoll; /* # recv collisions */ 3214 ulong_t si_crc; /* # recv crc errors */ 3215 ulong_t si_buff; /* # recv pkt sz > buf sz */ 3216 3217 ulong_t si_nolink; /* # loss of connection */ 3218 ulong_t si_linkdown; /* # link is down */ 3219 ulong_t si_inits; /* # driver inits */ 3220 ulong_t si_nocanput; /* # canput() failures */ 3221 3222 ulong_t si_allocbfail; /* # allocb() failures */ 3223 ulong_t si_notbufs; /* # out of xmit buffers */ 3224 ulong_t si_reclaim; /* # reclaim failures */ 3225 ulong_t si_smraddr; /* # bad SMR addrs */ 3226 3227 ulong_t si_txmax; /* # xmit over limit */ 3228 ulong_t si_txfull; /* # xmit mbox full */ 3229 ulong_t si_xdcall; /* # xdcalls sent */ 3230 ulong_t si_sigsvr; /* # data server wakeups */ 3231 3232 ulong_t si_mboxcrc; /* # send mbox crc errors */ 3233 /* 3234 * MIB II kstat variables 3235 */ 3236 ulong_t si_rcvbytes; /* # bytes received */ 3237 ulong_t si_xmtbytes; /* # bytes transmitted */ 3238 ulong_t si_multircv; /* # multicast packets received */ 3239 3240 ulong_t si_multixmt; /* # multicast packets for xmit */ 3241 ulong_t si_brdcstrcv; /* # broadcast packets received */ 3242 ulong_t si_brdcstxmt; /* # broadcast packets for xmit */ 3243 ulong_t si_norcvbuf; /* # rcv packets discarded */ 3244 3245 ulong_t si_noxmtbuf; /* # xmit packets discarded */ 3246 /* 3247 * PSARC 1997/198 : 64 bit kstats 3248 */ 3249 uint64_t si_ipackets64; /* # packets received */ 3250 uint64_t si_opackets64; /* # packets transmitted */ 3251 uint64_t si_rbytes64; /* # bytes received */ 3252 uint64_t si_obytes64; /* # bytes transmitted */ 3253 /* 3254 * PSARC 1997/247 : RFC 1643 dot3Stats... 3255 */ 3256 ulong_t si_fcs_errors; /* FCSErrors */ 3257 ulong_t si_macxmt_errors; /* InternalMacTransmitErrors */ 3258 ulong_t si_toolong_errors; /* FrameTooLongs */ 3259 ulong_t si_macrcv_errors; /* InternalMacReceiveErrors */ 3260 }; 3261 3262 /* 3263 * Per logical interface private data structure. 3264 */ 3265 struct idn { 3266 struct idn *si_nextp; /* linked instances */ 3267 dev_info_t *si_dip; /* assoc. dev_info */ 3268 struct ether_addr si_ouraddr; /* enet address */ 3269 3270 uint_t si_flags; /* misc. flags */ 3271 uint_t si_wantw; /* xmit: out of res. */ 3272 queue_t *si_ip4q; /* ip (v4) read queue */ 3273 queue_t *si_ip6q; /* ip (v6) read queue */ 3274 3275 kstat_t *si_ksp; /* kstat pointer */ 3276 struct idn_kstat si_kstat; /* per-inst kstat */ 3277 }; 3278 3279 struct idn_gkstat { 3280 ulong_t gk_reconfigs; /* # reconfigs */ 3281 ulong_t gk_reconfig_last; /* timestamep */ 3282 ulong_t gk_reaps; /* # of reap request */ 3283 ulong_t gk_reap_last; /* timestamep */ 3284 3285 ulong_t gk_links; /* # of IDN links */ 3286 ulong_t gk_link_last; /* timestamep */ 3287 ulong_t gk_unlinks; /* # of IDN unlinks */ 3288 ulong_t gk_unlink_last; /* timestamep */ 3289 3290 ulong_t gk_buffail; /* # bad bufalloc */ 3291 ulong_t gk_buffail_last; /* timestamp */ 3292 ulong_t gk_slabfail; /* # bad slaballoc */ 3293 ulong_t gk_slabfail_last; /* timestamp */ 3294 3295 ulong_t gk_reap_count; /* # of slabs reaped */ 3296 ulong_t gk_dropped_intrs; /* dropped intrs */ 3297 }; 3298 3299 extern struct idn_gkstat sg_kstat; 3300 3301 #ifdef IDN_NO_KSTAT 3302 3303 #define IDN_KSTAT_INC(s, i) 3304 #define IDN_KSTAT_ADD(s, i, n) 3305 #define IDN_GKSTAT_INC(i) 3306 #define IDN_GKSTAT_ADD(vvv, iii) 3307 #define IDN_GKSTAT_GLOBAL_EVENT(vvv, nnn) 3308 3309 #else /* IDN_NO_KSTAT */ 3310 3311 #define IDN_KSTAT_INC(sss, vvv) \ 3312 ((((struct idn *)(sss))->si_kstat.vvv)++) 3313 #define IDN_KSTAT_ADD(sss, vvv, nnn) \ 3314 ((((struct idn *)(sss))->si_kstat.vvv) += (nnn)) 3315 #define IDN_GKSTAT_INC(vvv) ((sg_kstat.vvv)++) 3316 #define IDN_GKSTAT_ADD(vvv, iii) ((sg_kstat.vvv) += (iii)) 3317 #define IDN_GKSTAT_GLOBAL_EVENT(vvv, ttt) \ 3318 ((sg_kstat.vvv)++, ((sg_kstat.ttt) = ddi_get_lbolt())) 3319 3320 #endif /* IDN_NO_KSTAT */ 3321 3322 /* 3323 * idn.si_flags 3324 */ 3325 #define IDNRUNNING 0x01 /* IDNnet is UP */ 3326 #define IDNPROMISC 0x02 /* promiscuous mode enabled */ 3327 #define IDNSUSPENDED 0x04 /* suspended (DR) */ 3328 3329 typedef struct kstat_named kstate_named_t; 3330 3331 struct idn_kstat_named { 3332 kstat_named_t sk_ipackets; /* # packets received */ 3333 kstat_named_t sk_ierrors; /* # total input errors */ 3334 kstat_named_t sk_opackets; /* # packets sent */ 3335 kstat_named_t sk_oerrors; /* # total output errors */ 3336 3337 kstat_named_t sk_txcoll; /* # xmit collisions */ 3338 kstat_named_t sk_rxcoll; /* # recv collisions */ 3339 kstat_named_t sk_crc; /* # recv crc errors */ 3340 kstat_named_t sk_buff; /* # recv pkt sz > buf sz */ 3341 3342 kstat_named_t sk_nolink; /* # loss of connection */ 3343 kstat_named_t sk_linkdown; /* # link is down */ 3344 kstat_named_t sk_inits; /* # driver inits */ 3345 kstat_named_t sk_nocanput; /* # canput() failures */ 3346 3347 kstat_named_t sk_allocbfail; /* # allocb() failures */ 3348 kstat_named_t sk_notbufs; /* # out of xmit buffers */ 3349 kstat_named_t sk_reclaim; /* # reclaim failures */ 3350 kstat_named_t sk_smraddr; /* # bad SMR addrs */ 3351 3352 kstat_named_t sk_txmax; /* # xmit over limit */ 3353 kstat_named_t sk_txfull; /* # xmit mbox full */ 3354 kstat_named_t sk_xdcall; /* # xdcalls sent */ 3355 kstat_named_t sk_sigsvr; /* # data server wakeups */ 3356 3357 kstat_named_t sk_mboxcrc; /* # send mbox crc errors */ 3358 /* 3359 * MIB II kstat variables 3360 */ 3361 kstat_named_t sk_rcvbytes; /* # bytes received */ 3362 kstat_named_t sk_xmtbytes; /* # bytes transmitted */ 3363 kstat_named_t sk_multircv; /* # multicast packets received */ 3364 3365 kstat_named_t sk_multixmt; /* # multicast packets for xmit */ 3366 kstat_named_t sk_brdcstrcv; /* # broadcast packets received */ 3367 kstat_named_t sk_brdcstxmt; /* # broadcast packets for xmit */ 3368 kstat_named_t sk_norcvbuf; /* # rcv packets discarded */ 3369 3370 kstat_named_t sk_noxmtbuf; /* # xmit packets discarded */ 3371 /* 3372 * PSARC 1997/198 : 64bit kstats 3373 */ 3374 kstat_named_t sk_ipackets64; /* # packets received */ 3375 kstat_named_t sk_opackets64; /* # packets transmitted */ 3376 kstat_named_t sk_rbytes64; /* # bytes received */ 3377 kstat_named_t sk_obytes64; /* # bytes transmitted */ 3378 /* 3379 * PSARC 1997/247 : RFC 1643 dot3Stats... 3380 */ 3381 kstat_named_t sk_fcs_errors; /* FCSErr */ 3382 kstat_named_t sk_macxmt_errors; /* InternalMacXmtErr */ 3383 kstat_named_t sk_toolong_errors; /* FrameTooLongs */ 3384 kstat_named_t sk_macrcv_errors; /* InternalMacRcvErr */ 3385 }; 3386 3387 /* 3388 * Stats for global events of interest (non-counters). 3389 */ 3390 struct idn_gkstat_named { 3391 kstat_named_t sk_curtime; /* current time */ 3392 kstat_named_t sk_reconfigs; /* # master recfgs */ 3393 kstat_named_t sk_reconfig_last; /* timestamp */ 3394 kstat_named_t sk_reaps; /* # of reap req */ 3395 kstat_named_t sk_reap_last; /* timestamp */ 3396 kstat_named_t sk_links; /* # of links */ 3397 kstat_named_t sk_link_last; /* timestamp */ 3398 kstat_named_t sk_unlinks; /* # of unlinks */ 3399 kstat_named_t sk_unlink_last; /* timestamp */ 3400 kstat_named_t sk_buffail; /* # bad buf alloc */ 3401 kstat_named_t sk_buffail_last; /* timestamp */ 3402 kstat_named_t sk_slabfail; /* # bad buf alloc */ 3403 kstat_named_t sk_slabfail_last; /* timestamp */ 3404 kstat_named_t sk_reap_count; /* # slabs reaped */ 3405 kstat_named_t sk_dropped_intrs; /* intrs dropped */ 3406 }; 3407 3408 /* 3409 * --------------------------------------------------------------------- 3410 */ 3411 #ifdef DEBUG 3412 #define IDNXDC(d, mt, a1, a2, a3, a4) \ 3413 ((void) debug_idnxdc("idnxdc", (int)(d), (mt), \ 3414 (uint_t)(a1), (uint_t)(a2), (uint_t)(a3), (uint_t)(a4))) 3415 #else /* DEBUG */ 3416 #define IDNXDC(d, mt, a1, a2, a3, a4) \ 3417 (idnxdc((int)(d), (mt), \ 3418 (uint_t)(a1), (uint_t)(a2), (uint_t)(a3), (uint_t)(a4))) 3419 #endif /* DEBUG */ 3420 #define IDNXDC_BROADCAST(ds, mt, a1, a2, a3, a4) \ 3421 (idnxdc_broadcast((domainset_t)(ds), (mt), \ 3422 (uint_t)(a1), (uint_t)(a2), (uint_t)(a3), (uint_t)(a4))) 3423 3424 /* 3425 * --------------------------------------------------------------------- 3426 */ 3427 #define SET_XARGS(x, a0, a1, a2, a3) \ 3428 ((x)[0] = (uint_t)(a0), (x)[1] = (uint_t)(a1), \ 3429 (x)[2] = (uint_t)(a2), (x)[3] = (uint_t)(a3)) 3430 3431 #define GET_XARGS(x, a0, a1, a2, a3) \ 3432 ((*(uint_t *)(a0) = (x)[0]), \ 3433 (*(uint_t *)(a1) = (x)[1]), \ 3434 (*(uint_t *)(a2) = (x)[2]), \ 3435 (*(uint_t *)(a3) = (x)[3])) 3436 3437 #define CLR_XARGS(x) \ 3438 ((x)[0] = (x)[1] = (x)[2] = (x)[3] = 0) 3439 3440 #define GET_XARGS_NEGO_TICKET(x) ((uint_t)(x)[0]) 3441 #define GET_XARGS_NEGO_DSET(x, d) \ 3442 ((d)[0] = (x)[1], (d)[1] = (x)[2], (d)[2] = (x)[3]) 3443 #define SET_XARGS_NEGO_TICKET(x, t) ((x)[0] = (uint_t)(t)) 3444 #define SET_XARGS_NEGO_DSET(x, d) \ 3445 ((x)[1] = (uint_t)(d)[0], \ 3446 (x)[2] = (uint_t)(d)[1], \ 3447 (x)[3] = (uint_t)(d)[2]) 3448 3449 #define GET_XARGS_CON_TYPE(x) ((idn_con_t)(x)[0]) 3450 #define GET_XARGS_CON_DOMSET(x) ((domainset_t)(x)[1]) 3451 #define SET_XARGS_CON_TYPE(x, t) ((x)[0] = (uint_t)(t)) 3452 #define SET_XARGS_CON_DOMSET(x, s) ((x)[1] = (uint_t)(s)) 3453 3454 #define GET_XARGS_FIN_TYPE(x) GET_FIN_TYPE((x)[0]) 3455 #define GET_XARGS_FIN_ARG(x) GET_FIN_ARG((x)[0]) 3456 #define GET_XARGS_FIN_DOMSET(x) ((domainset_t)(x)[1]) 3457 #define GET_XARGS_FIN_OPT(x) ((idn_finopt_t)(x)[2]) 3458 #define GET_XARGS_FIN_MASTER(x) ((uint_t)(x)[3]) 3459 #define SET_XARGS_FIN_TYPE(x, t) SET_FIN_TYPE((x)[0], (t)) 3460 #define SET_XARGS_FIN_ARG(x, a) SET_FIN_ARG((x)[0], (a)) 3461 #define SET_XARGS_FIN_DOMSET(x, s) ((x)[1] = (uint_t)(s)) 3462 #define SET_XARGS_FIN_OPT(x, o) ((x)[2] = (uint_t)(o)) 3463 #define SET_XARGS_FIN_MASTER(x, m) ((x)[3] = (uint_t)(m)) 3464 3465 #define GET_XARGS_NACK_TYPE(x) ((idn_nack_t)(x)[0]) 3466 #define GET_XARGS_NACK_ARG1(x) ((x)[1]) 3467 #define GET_XARGS_NACK_ARG2(x) ((x)[2]) 3468 #define SET_XARGS_NACK_TYPE(x, t) ((x)[0] = (uint_t)(t)) 3469 #define SET_XARGS_NACK_ARG1(x, a1) ((x)[1] = (uint_t)(a1)) 3470 #define SET_XARGS_NACK_ARG2(x, a2) ((x)[2] = (uint_t)(a2)) 3471 3472 #define GET_XARGS_CFG_PHASE(x) ((int)(x)[0]) 3473 #define SET_XARGS_CFG_PHASE(x, p) ((x)[0] = (uint_t)(p)) 3474 3475 /* 3476 * --------------------------------------------------------------------- 3477 */ 3478 /* 3479 * Device instance to SIP (IDN instance pointer). 3480 */ 3481 #ifdef DEBUG 3482 #define IDN_INST2SIP(i) \ 3483 (ASSERT(((i) >= 0) && ((i) < (IDN_MAXMAX_NETS << 1))), \ 3484 idn_i2s_table[i]) 3485 #else /* DEBUG */ 3486 #define IDN_INST2SIP(i) (idn_i2s_table[i]) 3487 #endif /* DEBUG */ 3488 3489 #define IDN_SET_INST2SIP(i, s) \ 3490 { \ 3491 ASSERT(((i) >= 0) && ((i) < (IDN_MAXMAX_NETS << 1))); \ 3492 idn_i2s_table[i] = (s); \ 3493 } 3494 3495 #define IDN_NETID2DOMID(n) (VALID_UDOMAINID(n) ? \ 3496 ((int)(n)) : IDN_NIL_DOMID) 3497 #define IDN_DOMID2NETID(d) ((ushort_t)(d)) 3498 3499 #ifdef DEBUG 3500 #define IDNDL_ETHER2DOMAIN(eap) \ 3501 (_idndl_ether2domain(eap)) 3502 #define IDNDL_ETHER2SIP(eap) \ 3503 (_idndl_ether2sip(eap)) 3504 #else 3505 /* 3506 * The following values can be returned from IDNDL_ETHER2DOMAIN: 3507 * IDN_NIL_DOMID 3508 * Ether address is broadcast (0xff) or domain doesn't exist. 3509 * domid Domain id with drwlock(reader) held. 3510 */ 3511 #define IDNDL_ETHER2DOMAIN(eap) \ 3512 (IDN_NETID2DOMID((eap)->ether_addr_octet[IDNETHER_NETID])) 3513 #define IDNDL_ETHER2SIP(eap) \ 3514 (((eap)->ether_addr_octet[IDNETHER_CHANNEL] == 0xff) ? NULL : \ 3515 IDN_INST2SIP((int)(eap)->ether_addr_octet[IDNETHER_CHANNEL])) 3516 #endif /* DEBUG */ 3517 3518 #define UPPER32_CPUMASK(s) _upper32cpumask(s) 3519 #define LOWER32_CPUMASK(s) _lower32cpumask(s) 3520 #define MAKE64_CPUMASK(s, u, l) _make64cpumask(&(s), (u), (l)) 3521 3522 #ifdef DEBUG 3523 extern caddr_t _idn_getstruct(char *structname, int size); 3524 extern void _idn_freestruct(caddr_t ptr, char *structname, int size); 3525 3526 #define GETSTRUCT(structure, num) \ 3527 ((structure *)_idn_getstruct("structure", sizeof (structure)*(num))) 3528 #define FREESTRUCT(ptr, structure, num) \ 3529 (_idn_freestruct((caddr_t)ptr, "structure", sizeof (structure)*(num))) 3530 #else /* DEBUG */ 3531 #define GETSTRUCT(structure, num) \ 3532 ((structure *)kmem_zalloc((uint_t)(sizeof (structure) * (num)), \ 3533 KM_SLEEP)) 3534 #define FREESTRUCT(ptr, structure, num) \ 3535 (kmem_free((caddr_t)(ptr), sizeof (structure) * (num))) 3536 #endif /* DEBUG */ 3537 3538 extern int idn_debug; 3539 extern idn_global_t idn; 3540 extern idn_domain_t idn_domain[]; 3541 extern struct idn *idn_i2s_table[]; 3542 extern int idn_history; 3543 extern struct idn_history idnhlog; 3544 3545 extern int idn_smr_size; 3546 extern int idn_nwr_size; 3547 extern int idn_protocol_nservers; 3548 extern int idn_awolmsg_interval; 3549 extern int idn_smr_bufsize; 3550 extern int idn_slab_bufcount; 3551 extern int idn_slab_prealloc; 3552 extern int idn_slab_mintotal; 3553 extern int idn_window_max; 3554 extern int idn_window_incr; 3555 extern int idn_reclaim_min; 3556 extern int idn_reclaim_max; 3557 extern int idn_mbox_per_net; 3558 extern int idn_max_nets; 3559 3560 extern int idn_netsvr_spin_count; 3561 extern int idn_netsvr_wait_min; 3562 extern int idn_netsvr_wait_max; 3563 extern int idn_netsvr_wait_shift; 3564 3565 extern int idn_checksum; 3566 3567 extern int idn_msgwait_nego; 3568 extern int idn_msgwait_cfg; 3569 extern int idn_msgwait_con; 3570 extern int idn_msgwait_fin; 3571 extern int idn_msgwait_cmd; 3572 extern int idn_msgwait_data; 3573 3574 extern int idn_retryfreq_nego; 3575 extern int idn_retryfreq_con; 3576 extern int idn_retryfreq_fin; 3577 3578 extern int idn_window_emax; /* calculated */ 3579 extern int idn_slab_maxperdomain; /* calculated */ 3580 3581 /* 3582 * --------------------------------------------------------------------- 3583 * io/idn.c 3584 * --------------------------------------------------------------------- 3585 */ 3586 extern int board_to_ready_cpu(int board, cpuset_t cpuset); 3587 extern int idn_open_domain(int domid, int cpuid, uint_t ticket); 3588 extern void idn_close_domain(int domid); 3589 extern void inum2str(uint_t inum, char str[]); 3590 extern idn_timer_t *idn_timer_alloc(); 3591 extern void idn_timer_free(idn_timer_t *tp); 3592 extern void idn_timerq_init(idn_timerq_t *tq); 3593 extern void idn_timerq_deinit(idn_timerq_t *tq); 3594 extern void idn_timerq_free(idn_timerq_t *tq); 3595 extern ushort_t idn_timer_start(idn_timerq_t *tq, idn_timer_t *tp, 3596 clock_t tval); 3597 extern int idn_timer_stopall(idn_timer_t *tp); 3598 extern void idn_timer_dequeue(idn_timerq_t *tq, idn_timer_t *tp); 3599 extern void idn_timer_stop(idn_timerq_t *tq, int subtype, ushort_t tcookie); 3600 extern idn_timer_t *idn_timer_get(idn_timerq_t *tq, int subtype, 3601 ushort_t tcookie); 3602 extern void idn_domain_resetentry(idn_domain_t *dp); 3603 extern void idn_strlinks_enable(uint_t netaddr, int domid); 3604 extern void idn_strlinks_disable(uint_t domset, uint_t netaddr, 3605 int disconnect); 3606 extern void idn_dopcache_init(); 3607 extern void idn_dopcache_deinit(); 3608 extern void *idn_init_op(idn_opflag_t opflag, boardset_t boardset, 3609 idnsb_error_t *sep); 3610 extern void idn_add_op(idn_opflag_t opflag, domainset_t domset); 3611 extern void idn_update_op(idn_opflag_t opflag, domainset_t domset, 3612 idnsb_error_t *sep); 3613 extern void idn_deinit_op(void *cookie); 3614 extern int idn_wait_op(void *cookie, boardset_t *domsetp, 3615 int wait_timeout); 3616 extern int idn_wakeup_op(boardset_t boardset, uint_t domset, 3617 idn_opflag_t opflag, int error); 3618 extern void idn_error_op(uint_t domset, boardset_t boardset, int error); 3619 extern void cpuset2str(cpuset_t cset, char buffer[]); 3620 extern void domainset2str(domainset_t dset, char buffer[]); 3621 extern void boardset2str(boardset_t bset, char buffer[]); 3622 extern void mask2str(uint_t mask, char buffer[], int maxnum); 3623 extern int idnxdc(int domid, idn_msgtype_t *mtp, 3624 uint_t arg1, uint_t arg2, 3625 uint_t arg3, uint_t arg4); 3626 extern void idnxdc_broadcast(domainset_t domset, idn_msgtype_t *mtp, 3627 uint_t arg1, uint_t arg2, 3628 uint_t arg3, uint_t arg4); 3629 extern void idn_awol_event_set(boardset_t boardset); 3630 extern void idn_awol_event_clear(boardset_t boardset); 3631 #ifdef DEBUG 3632 extern int debug_idnxdc(char *f, int domid, idn_msgtype_t *mtp, 3633 uint_t arg1, uint_t arg2, 3634 uint_t arg3, uint_t arg4); 3635 #endif /* DEBUG */ 3636 extern boardset_t cpuset2boardset(cpuset_t portset); 3637 extern uint_t _upper32cpumask(cpuset_t cset); 3638 extern uint_t _lower32cpumask(cpuset_t cset); 3639 extern void _make64cpumask(cpuset_t *csetp, uint_t upper, uint_t lower); 3640 3641 /* 3642 * --------------------------------------------------------------------- 3643 * io/idn_proto.c 3644 * --------------------------------------------------------------------- 3645 */ 3646 extern void idn_assign_cookie(int domid); 3647 extern int idn_rput_data(queue_t *q, mblk_t *mp, int isput); 3648 extern int idn_wput_data(queue_t *q, mblk_t *mp, int isput); 3649 extern int idn_send_data(int dst_domid, idn_netaddr_t dst_netaddr, 3650 queue_t *wq, mblk_t *mp); 3651 extern void idn_recv_signal(mblk_t *mp); 3652 extern int idn_link(int domid, int cpuid, int pri, int waittime, 3653 idnsb_error_t *sep); 3654 extern int idn_unlink(int domid, boardset_t idnset, idn_fin_t fintype, 3655 idn_finopt_t finopt, int waittime, 3656 idnsb_error_t *sep); 3657 extern int idnh_recv_dataack(int domid, int src_proc, 3658 uint_t acknack, idn_xdcargs_t xargs); 3659 extern int idnh_recv_other(int sourceid, int src_proc, int dst_proc, 3660 uint_t inum, uint_t acknack, 3661 idn_xdcargs_t xargs); 3662 extern void idn_send_cmd(int domid, idn_cmd_t cmdtype, 3663 uint_t arg1, uint_t arg2, uint_t arg3); 3664 extern void idn_send_cmdresp(int domid, idn_msgtype_t *mtp, 3665 idn_cmd_t cmdtype, uint_t arg1, 3666 uint_t arg2, uint_t cerrno); 3667 extern void idn_broadcast_cmd(idn_cmd_t cmdtype, 3668 uint_t arg1, uint_t arg2, uint_t arg3); 3669 extern int idn_reclaim_mboxdata(int domid, int channel, int nbufs); 3670 extern void idn_clear_awol(int domid); 3671 extern int idn_protocol_init(int nservers); 3672 extern void idn_protocol_deinit(); 3673 extern void idn_timer_expired(void *arg); 3674 extern int idn_open_channel(int channel); 3675 extern void idn_close_channel(int channel, idn_chanop_t chanop); 3676 extern idn_mainmbox_t *idn_mainmbox_init(int domid, int mbx); 3677 extern void idn_mainmbox_deinit(int domid, idn_mainmbox_t *mmp); 3678 extern void idn_signal_data_server(int domid, ushort_t channel); 3679 extern int idn_chanservers_init(); 3680 extern void idn_chanservers_deinit(); 3681 extern void idn_chanserver_bind(int net, int cpuid); 3682 extern int idn_retry_terminate(uint_t token); 3683 extern idn_protojob_t *idn_protojob_alloc(int kmflag); 3684 extern void idn_protojob_submit(int cookie, idn_protojob_t *jp); 3685 extern int idn_domain_is_registered(int domid, int channel, 3686 idn_chanset_t *chansetp); 3687 extern void idn_xmit_monitor_kickoff(int chan_wanted); 3688 extern void idn_sync_exit(int domid, idn_synccmd_t cmd); 3689 /* 3690 * --------------------------------------------------------------------- 3691 * io/idn_xf.c 3692 * --------------------------------------------------------------------- 3693 */ 3694 extern void idnxf_flushall_ecache(); 3695 extern int idnxf_shmem_add(int is_master, boardset_t boardset, 3696 pfn_t pfnbase, pfn_t pfnlimit, 3697 uint_t *mcadr); 3698 extern int idnxf_shmem_sub(int is_master, boardset_t boardset); 3699 extern int idn_cpu_per_board(void *p2o, cpuset_t cset, 3700 struct hwconfig *hwp); 3701 /* 3702 * --------------------------------------------------------------------- 3703 * io/idn_dlpi.c 3704 * --------------------------------------------------------------------- 3705 */ 3706 extern int idndl_init(struct idn *sip); 3707 extern void idndl_uninit(struct idn *sip); 3708 extern void idndl_statinit(struct idn *sip); 3709 extern void idndl_dodetach(struct idnstr *); 3710 extern int idnioc_dlpi(queue_t *wq, mblk_t *mp, int *argsize); 3711 extern void idndl_localetheraddr(struct idn *sip, struct ether_addr *eap); 3712 extern int idndl_domain_etheraddr(int domid, int instance, 3713 struct ether_addr *eap); 3714 extern void idndl_dlpi_init(); 3715 extern int idndl_start(queue_t *wq, mblk_t *mp, struct idn *sip); 3716 extern void idndl_read(struct idn *sip, mblk_t *mp); 3717 extern void idndl_proto(queue_t *wq, mblk_t *mp); 3718 extern void idndl_sendup(struct idn *, mblk_t *, struct idnstr *(*)()); 3719 extern struct idnstr *idndl_accept(struct idnstr *, struct idn *, int, 3720 struct ether_addr *); 3721 extern struct idnstr *idndl_paccept(struct idnstr *, struct idn *, int, 3722 struct ether_addr *); 3723 extern void idndl_wenable(struct idn *); 3724 /* 3725 * --------------------------------------------------------------------- 3726 * io/idn_smr.c 3727 * --------------------------------------------------------------------- 3728 */ 3729 extern void smr_slabwaiter_open(domainset_t domset); 3730 extern void smr_slabwaiter_close(domainset_t domset); 3731 /* 3732 * --------------------------------------------------------------------- 3733 */ 3734 extern void idn_smrsize_init(); 3735 extern void idn_init_autolink(); 3736 extern void idn_deinit_autolink(); 3737 3738 extern void idn_dmv_handler(void *arg); 3739 extern void idnxf_init_mondo(uint64_t dmv_word0, 3740 uint64_t dmv_word1, uint64_t dmv_word2); 3741 extern int idnxf_send_mondo(int upaid); 3742 3743 extern clock_t idn_msg_waittime[]; 3744 extern clock_t idn_msg_retrytime[]; 3745 3746 #endif /* !_ASM */ 3747 #endif /* _KERNEL */ 3748 3749 #ifndef _ASM 3750 /* 3751 * --------------------------------------------------------------------- 3752 */ 3753 #define IDN_NIL_DOMID -1 3754 #define IDN_NIL_DCPU -1 3755 3756 /* 3757 * --------------------------------------------------------------------- 3758 */ 3759 3760 /* 3761 * IOCTL Interface 3762 * 3763 * Commands must stay in the range (1 - 4096) since only 12 bits 3764 * are allotted. 3765 */ 3766 #define _IDN(n) (('I' << 20) | ('D' << 12) | (n)) 3767 #define IDNIOC_LINK _IDN(1) /* domain_link */ 3768 #define IDNIOC_UNLINK _IDN(2) /* domain_unlink */ 3769 #define IDNIOC_unused0 _IDN(3) 3770 #define IDNIOC_unused1 _IDN(4) 3771 #define IDNIOC_unused2 _IDN(5) 3772 #define IDNIOC_unused3 _IDN(6) 3773 #define IDNIOC_unused4 _IDN(7) 3774 #define IDNIOC_DLPI_ON _IDN(8) /* Turn ON DLPI on str */ 3775 #define IDNIOC_DLPI_OFF _IDN(9) /* Turn OFF DLPI on str */ 3776 #define IDNIOC_PING _IDN(10) /* For latency testing */ 3777 #define IDNIOC_PING_INIT _IDN(11) 3778 #define IDNIOC_PING_DEINIT _IDN(12) 3779 #define IDNIOC_MEM_RW _IDN(13) /* Random R/W of SMR */ 3780 3781 3782 #define VALID_NDOP(op) (((op) == ND_SET) || ((op) == ND_GET)) 3783 3784 #define VALID_DLPIOP(op) (((op) == DLIOCRAW) || \ 3785 ((op) == DL_IOC_HDR_INFO)) 3786 3787 #define VALID_IDNOP(op) (((op) >= _IDN(1)) && ((op) <= _IDN(13))) 3788 3789 #define VALID_IDNIOCTL(op) (VALID_IDNOP(op) || \ 3790 VALID_NDOP(op) || \ 3791 VALID_DLPIOP(op)) 3792 3793 typedef union idnop { 3794 struct { 3795 int domid; /* input */ 3796 int cpuid; /* input */ 3797 int master; /* input */ 3798 int wait; /* input */ 3799 } link; 3800 struct { 3801 int domid; /* input */ 3802 int cpuid; /* input */ 3803 int force; /* input */ 3804 int wait; /* input */ 3805 } unlink; 3806 struct { 3807 int domid; /* input */ 3808 int cpuid; /* input */ 3809 } ping; 3810 struct { 3811 uint_t lo_off; /* input */ 3812 uint_t hi_off; /* input */ 3813 int blksize; /* input */ 3814 int num; /* input */ 3815 int rw; /* input */ 3816 int goawol; /* input */ 3817 } rwmem; 3818 } idnop_t; 3819 3820 #ifdef _KERNEL 3821 /* 3822 * ndd support for IDN tunables. 3823 */ 3824 typedef struct idnparam { 3825 ulong_t sp_min; 3826 ulong_t sp_max; 3827 ulong_t sp_val; 3828 char *sp_name; 3829 } idnparam_t; 3830 3831 extern idnparam_t idn_param_arr[]; 3832 3833 #define idn_modunloadable idn_param_arr[0].sp_val 3834 #ifdef IDN_PERF 3835 #define _LP 0 3836 #define _xxx_tbd idn_param_arr[_LP+1].sp_val 3837 #endif /* IDN_PERF */ 3838 3839 /* 3840 * ===================================================================== 3841 */ 3842 3843 /* 3844 * Some junk to pretty print board lists and cpu lists in 3845 * log/console messages. Length is big enough to display 64 double 3846 * digit cpus separated by a command and single space. (Board list 3847 * is similar, but only 16 entries possible. 3848 */ 3849 #define _DSTRLEN 400 3850 #define ALLOC_DISPSTRING() ((char *)kmem_alloc(_DSTRLEN, KM_NOSLEEP)) 3851 #define FREE_DISPSTRING(b) (kmem_free((void *)(b), _DSTRLEN)) 3852 3853 /* 3854 * These are declared in idn.c. 3855 */ 3856 extern const char *idnds_str[]; 3857 extern const char *idnxs_str[]; 3858 extern const char *idngs_str[]; 3859 extern const char *idncmd_str[]; 3860 extern const char *idncon_str[]; 3861 extern const char *idnfin_str[]; 3862 extern const char *idnfinarg_str[]; 3863 extern const char *idnfinopt_str[]; 3864 extern const char *idnreg_str[]; 3865 extern const char *idnnack_str[]; 3866 extern const char *idnop_str[]; 3867 extern const char *idnsync_str[]; 3868 extern const char *chanop_str[]; 3869 extern const char *chanaction_str[]; 3870 extern const char *inum_str[]; 3871 extern const int inum_bump; 3872 extern const int inum_max; 3873 extern const int acknack_shift; 3874 3875 extern const char *timer_str[]; 3876 extern const char *res_str[]; 3877 3878 #endif /* _KERNEL */ 3879 #endif /* !_ASM */ 3880 3881 #ifdef __cplusplus 3882 } 3883 #endif 3884 3885 #endif /* _SYS_IDN_H */ 3886