1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_DRMACH_H_ 27 #define _SYS_DRMACH_H_ 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 #ifndef _ASM 36 #include <sys/types.h> 37 #include <sys/memlist.h> 38 #include <sys/processor.h> 39 #include <sys/cpuvar.h> 40 #include <sys/sbd_ioctl.h> 41 #include <sys/sysevent.h> 42 #include <sys/ddi.h> 43 #include <sys/sunddi.h> 44 #include <sys/sunndi.h> 45 #include <sys/ddi_impldefs.h> 46 #include <sys/pte.h> 47 #include <sys/opl.h> 48 #endif 49 50 51 #define MAX_BOARDS plat_max_boards() 52 #define MAX_CPU_UNITS_PER_BOARD plat_max_cpu_units_per_board() 53 #define MAX_MEM_UNITS_PER_BOARD plat_max_mem_units_per_board() 54 #define MAX_IO_UNITS_PER_BOARD plat_max_io_units_per_board() 55 #define MAX_CMP_UNITS_PER_BOARD plat_max_cmp_units_per_board() 56 /* 57 * DR uses MAX_CORES_PER_CMP as number of virtual CPU within a CMP 58 */ 59 #define MAX_CORES_PER_CMP OPL_MAX_CPU_PER_CMP 60 61 62 /* returned with drmach_board_find_devices callback */ 63 #define DRMACH_DEVTYPE_CPU "cpu" 64 #define DRMACH_DEVTYPE_MEM "memory" 65 #define DRMACH_DEVTYPE_PCI "pci" 66 67 #define FMEM_LOOP_START 1 68 #define FMEM_LOOP_COPY_READY 2 69 #define FMEM_LOOP_COPY_DONE 3 70 #define FMEM_LOOP_FMEM_READY 4 71 #define FMEM_LOOP_RENAME_DONE 5 72 #define FMEM_LOOP_DONE 6 73 #define FMEM_LOOP_EXIT 7 74 75 #define SCF_CMD_BUSY 0x8000 76 #define SCF_STATUS_READY 0x8000 77 #define SCF_STATUS_SHUTDOWN 0x4000 78 #define SCF_STATUS_POFF 0x2000 79 #define SCF_STATUS_EVENT 0x1000 80 #define SCF_STATUS_TIMER_ADJUST 0x0800 81 #define SCF_STATUS_ALIVE 0x0400 82 #define SCF_STATUS_MODE_CHANGED 0x0200 83 #define SCF_STATUS_CMD_U_PARITY 0x0100 84 #define SCF_STATUS_CMD_RTN_CODE 0x00f0 85 #define SCF_STATUS_MODE_SWITCH 0x000c 86 #define SCF_STATUS_CMD_COMPLETE 0x0002 87 #define SCF_STATUS_CMD_L_PARITY 0x0001 88 89 #define SCF_RETRY_CNT 15 90 91 /* 92 * dynamic memory blocks cannot be added back to phys_install 93 * safely if the alignment is smaller than the largest 94 * physical page size the OS supports. The VM subsystem 95 * will try to coalesce smaller pages together and 96 * it assumes that the page structures are contiguous. 97 * That assumption does not hold so we have to work around it. 98 * On OPL, the largest page size is 256MB so we can just 99 * add such memory block back. For everything else, 100 * we round them up to 4MB boundaries and make sure 101 * they are disjoint from phys_install. 102 */ 103 104 #define MH_MPSS_ALIGNMENT (256 * 1024 * 1024) 105 #define MH_MIN_ALIGNMENT (4 * 1024 * 1024) 106 #define rounddown(x, y) ((x) & ~(y - 1)) 107 108 #define SCF_SB_INFO_OFFSET 0x80020 109 #define SCF_SB_INFO_BUSY 0x40 110 111 #ifndef _ASM 112 113 /* 114 * OPL platform specific routines currently only defined 115 * in opl.c and referenced by DR. 116 */ 117 118 typedef void *drmachid_t; 119 120 /* 121 * There are several requirements to do copy rename: 122 * 1 There should be no subroutine calls/TLBmiss 123 * once the copying has begun. 124 * 2 There should be no external memory access by the CPU 125 * during the memory rename programming. 126 * 127 * All data and instruction pages used in the copy rename 128 * procedure are kept in locked pages to satisfy 1 and 2. 129 * However that is not enough. To satisfy 2, we must keep 130 * all the data and instructions in the 2 assembly routines 131 * drmach_fmem_loop_script and drmach_fmem_exec_script 132 * in the same contiguous page. They are packed into 133 * the 2nd 8K page of the buffer as shown in the diagram 134 * below. 135 * 136 * Note that it is important to keep the "critical" 137 * data in one 8K page to avoid any cache line 138 * contention. The assembly routines read all the 139 * critical data into the cache so that there is no 140 * external memory access during FMEM operation. 141 * 142 * layout of the FMEM buffers: 143 * They are all locked in TLB and the critical data 144 * used in drmach_fmem_xxx assembly code are all 145 * packed in the second page. 146 * 147 * 1st 8k page 148 * +--------------------------------+ 149 * |drmach_copy_rename_program_t | 150 * +--------------------------------+ 151 * |drmach_copy_rename_data_t | 152 * | | 153 * +--------------------------------+ 154 * 155 * 2nd 8k page 156 * +--------------------------------+ 157 * |drmach_copy_rename_critical_t | 158 * | | 159 * +--------------------------------+ 160 * |run (drmach_copy_rename_prog__relocatable) 161 * |(roundup boundary to 1K) | 162 * +--------------------------------+ 163 * | fmem_script | 164 * |(roundup boundary to 1K) | 165 * +--------------------------------+ 166 * |loop_script | 167 * | | 168 * +--------------------------------+ 169 * |at least 1K NOP/0's | 170 * | | 171 * +--------------------------------+ 172 * 173 * 3rd 8k page 174 * +--------------------------------+ 175 * |memlist_buffer (free_mlist) | 176 * | | 177 * +--------------------------------+ 178 * 179 * 4th 8k page - drmach_cr_stat_t. 180 * 181 */ 182 183 typedef struct { 184 int16_t scf_command; 185 int8_t scf_rsv1[2]; 186 int16_t scf_status; 187 int8_t scf_rsv2[2]; 188 int8_t scf_version; 189 int8_t scf_rsv3[3]; 190 int8_t scf_rsv4[4]; 191 uint8_t scf_tdata[16]; 192 uint8_t scf_rdata[16]; 193 } drmach_scf_regs_t; 194 195 196 typedef struct { 197 volatile uint_t stat; 198 volatile uint_t error; 199 int op; 200 #define OPL_FMEM_SCF_START 0x1 201 #define OPL_FMEM_MC_SUSPEND 0x2 202 } drmach_fmem_mbox_t; 203 204 typedef struct { 205 uint64_t scf_reg_base; 206 uint8_t scf_td[16]; 207 uint64_t save_log[8]; 208 uint64_t save_local[8]; 209 uint64_t pstate; 210 uint64_t delay; 211 int (*run)(void *arg, int cpuid); 212 int (*fmem)(void *arg, size_t sz); 213 int (*loop)(void *arg1, size_t sz, void *arg2); 214 void (*loop_rtn)(void *arg); 215 uint64_t inst_loop_ret; 216 int fmem_issued; 217 volatile uchar_t stat[NCPU]; 218 } drmach_copy_rename_critical_t; 219 220 typedef struct { 221 uint64_t s_copybasepa; 222 uint64_t t_copybasepa; 223 drmachid_t s_mem; 224 drmachid_t t_mem; 225 cpuset_t cpu_ready_set; 226 cpuset_t cpu_slave_set; 227 cpuset_t cpu_copy_set; 228 processorid_t cpuid; 229 drmach_fmem_mbox_t fmem_status; 230 volatile ushort_t error[NCPU]; 231 struct memlist *c_ml; 232 struct memlist *cpu_ml[NCPU]; 233 void (*mc_resume)(void); 234 int (*scf_fmem_end)(void); 235 int (*scf_fmem_cancel)(void); 236 uint64_t (*scf_get_base_addr)(void); 237 uint64_t copy_delay; 238 uint64_t stick_freq; 239 uint64_t copy_wait_time; 240 processorid_t slowest_cpuid; 241 int copy_rename_count; 242 } drmach_copy_rename_data_t; 243 244 typedef struct { 245 uint64_t nbytes[NCPU]; 246 } drmach_cr_stat_t; 247 248 typedef struct drmach_copy_rename_program { 249 drmach_copy_rename_critical_t *critical; 250 struct drmach_copy_rename_program *locked_prog; 251 struct drmach_copy_rename_program *prog; 252 drmach_copy_rename_data_t *data; 253 caddr_t memlist_buffer; 254 struct memlist *free_mlist; 255 drmach_cr_stat_t *stat; 256 } drmach_copy_rename_program_t; 257 258 #define DRMACH_FMEM_LOCKED_PAGES 4 259 #define DRMACH_FMEM_DATA_PAGE 0 260 #define DRMACH_FMEM_CRITICAL_PAGE 1 261 #define DRMACH_FMEM_MLIST_PAGE 2 262 #define DRMACH_FMEM_STAT_PAGE 3 263 264 typedef struct { 265 boolean_t assigned; 266 boolean_t powered; 267 boolean_t configured; 268 boolean_t busy; 269 boolean_t empty; 270 sbd_cond_t cond; 271 char type[MAXNAMELEN]; 272 char info[MAXPATHLEN]; /* TODO: what size? */ 273 } drmach_status_t; 274 275 typedef struct { 276 int size; 277 char *copts; 278 } drmach_opts_t; 279 280 typedef struct { 281 uint64_t mi_basepa; 282 uint64_t mi_size; 283 uint64_t mi_slice_size; 284 uint64_t mi_alignment_mask; 285 } drmach_mem_info_t; 286 287 extern sbd_error_t *drmach_mem_get_info(drmachid_t, drmach_mem_info_t *); 288 extern int drmach_board_is_floating(drmachid_t); 289 290 extern sbd_error_t *drmach_copy_rename_init( 291 drmachid_t dst_id, 292 drmachid_t src_id, struct memlist *src_copy_ml, 293 drmachid_t *pgm_id); 294 extern sbd_error_t *drmach_copy_rename_fini(drmachid_t id); 295 extern void drmach_copy_rename(drmachid_t id); 296 297 extern sbd_error_t *drmach_pre_op(int cmd, drmachid_t id, 298 drmach_opts_t *opts); 299 extern sbd_error_t *drmach_post_op(int cmd, drmachid_t id, 300 drmach_opts_t *opts); 301 302 extern sbd_error_t *drmach_board_assign(int bnum, drmachid_t *id); 303 extern sbd_error_t *drmach_board_connect(drmachid_t id, 304 drmach_opts_t *opts); 305 extern sbd_error_t *drmach_board_deprobe(drmachid_t id); 306 extern sbd_error_t *drmach_board_disconnect(drmachid_t id, 307 drmach_opts_t *opts); 308 extern sbd_error_t *drmach_board_find_devices(drmachid_t id, void *a, 309 sbd_error_t *(*found)(void *a, const char *, int, drmachid_t)); 310 extern int drmach_board_lookup(int bnum, drmachid_t *id); 311 extern sbd_error_t *drmach_passthru(drmachid_t id, 312 drmach_opts_t *opts); 313 314 extern sbd_error_t *drmach_board_name(int bnum, char *buf, int buflen); 315 316 extern sbd_error_t *drmach_board_poweroff(drmachid_t id); 317 extern sbd_error_t *drmach_board_poweron(drmachid_t id); 318 extern sbd_error_t *drmach_board_test(drmachid_t id, drmach_opts_t *opts, 319 int force); 320 321 extern sbd_error_t *drmach_board_unassign(drmachid_t id); 322 323 extern sbd_error_t *drmach_configure(drmachid_t id, int flags); 324 325 extern sbd_error_t *drmach_cpu_disconnect(drmachid_t id); 326 extern sbd_error_t *drmach_cpu_get_id(drmachid_t id, processorid_t *cpuid); 327 extern sbd_error_t *drmach_cpu_get_impl(drmachid_t id, int *ip); 328 extern void drmach_cpu_flush_ecache_sync(void); 329 330 extern sbd_error_t *drmach_get_dip(drmachid_t id, dev_info_t **dip); 331 332 extern sbd_error_t *drmach_io_is_attached(drmachid_t id, int *yes); 333 extern sbd_error_t *drmach_io_post_attach(drmachid_t id); 334 extern sbd_error_t *drmach_io_post_release(drmachid_t id); 335 extern sbd_error_t *drmach_io_pre_release(drmachid_t id); 336 extern sbd_error_t *drmach_io_unrelease(drmachid_t id); 337 338 extern sbd_error_t *drmach_mem_add_span(drmachid_t id, 339 uint64_t basepa, uint64_t size); 340 extern sbd_error_t *drmach_mem_del_span(drmachid_t id, 341 uint64_t basepa, uint64_t size); 342 extern sbd_error_t *drmach_mem_disable(drmachid_t id); 343 extern sbd_error_t *drmach_mem_enable(drmachid_t id); 344 extern sbd_error_t *drmach_mem_get_base_physaddr(drmachid_t id, 345 uint64_t *pa); 346 extern sbd_error_t *drmach_mem_get_memlist(drmachid_t id, 347 struct memlist **ml); 348 extern sbd_error_t *drmach_mem_get_slice_size(drmachid_t, uint64_t *); 349 350 extern sbd_error_t *drmach_release(drmachid_t id); 351 extern sbd_error_t *drmach_status(drmachid_t id, drmach_status_t *stat); 352 extern sbd_error_t *drmach_unconfigure(drmachid_t id, int flags); 353 extern int drmach_log_sysevent(int board, char *hint, int flag, 354 int verbose); 355 356 extern int drmach_verify_sr(dev_info_t *dip, int sflag); 357 extern void drmach_suspend_last(); 358 extern void drmach_resume_first(); 359 360 #endif 361 362 #ifdef __cplusplus 363 } 364 #endif 365 366 #endif /* _SYS_DRMACH_H_ */ 367