125cf1a30Sjl139090 /* 225cf1a30Sjl139090 * CDDL HEADER START 325cf1a30Sjl139090 * 425cf1a30Sjl139090 * The contents of this file are subject to the terms of the 525cf1a30Sjl139090 * Common Development and Distribution License (the "License"). 625cf1a30Sjl139090 * You may not use this file except in compliance with the License. 725cf1a30Sjl139090 * 825cf1a30Sjl139090 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 925cf1a30Sjl139090 * or http://www.opensolaris.org/os/licensing. 1025cf1a30Sjl139090 * See the License for the specific language governing permissions 1125cf1a30Sjl139090 * and limitations under the License. 1225cf1a30Sjl139090 * 1325cf1a30Sjl139090 * When distributing Covered Code, include this CDDL HEADER in each 1425cf1a30Sjl139090 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 1525cf1a30Sjl139090 * If applicable, add the following below this CDDL HEADER, with the 1625cf1a30Sjl139090 * fields enclosed by brackets "[]" replaced with your own identifying 1725cf1a30Sjl139090 * information: Portions Copyright [yyyy] [name of copyright owner] 1825cf1a30Sjl139090 * 1925cf1a30Sjl139090 * CDDL HEADER END 2025cf1a30Sjl139090 */ 2125cf1a30Sjl139090 /* 2268ac2337Sjl139090 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 2325cf1a30Sjl139090 * Use is subject to license terms. 2425cf1a30Sjl139090 */ 2525cf1a30Sjl139090 2625cf1a30Sjl139090 #pragma ident "%Z%%M% %I% %E% SMI" 2725cf1a30Sjl139090 2825cf1a30Sjl139090 2925cf1a30Sjl139090 /* 3025cf1a30Sjl139090 * This file is through cpp before being used as 3125cf1a30Sjl139090 * an inline. It contains support routines used 3225cf1a30Sjl139090 * only by DR for the copy-rename sequence. 3325cf1a30Sjl139090 */ 3425cf1a30Sjl139090 3525cf1a30Sjl139090 #if defined(lint) 3625cf1a30Sjl139090 #include <sys/types.h> 3725cf1a30Sjl139090 #endif /* lint */ 3825cf1a30Sjl139090 3925cf1a30Sjl139090 #ifndef INLINE 4025cf1a30Sjl139090 4125cf1a30Sjl139090 #include <sys/asm_linkage.h> 4225cf1a30Sjl139090 4325cf1a30Sjl139090 #else /* INLINE */ 4425cf1a30Sjl139090 4525cf1a30Sjl139090 #define ENTRY_NP(x) .inline x,0 4625cf1a30Sjl139090 #define retl /* nop */ 4725cf1a30Sjl139090 #define SET_SIZE(x) .end 4825cf1a30Sjl139090 4925cf1a30Sjl139090 #endif /* INLINE */ 5025cf1a30Sjl139090 5125cf1a30Sjl139090 #include <sys/privregs.h> 5225cf1a30Sjl139090 #include <sys/sun4asi.h> 5325cf1a30Sjl139090 #include <sys/machparam.h> 5425cf1a30Sjl139090 5525cf1a30Sjl139090 #include <sys/intreg.h> 5625cf1a30Sjl139090 #include <sys/opl_olympus_regs.h> 5725cf1a30Sjl139090 5825cf1a30Sjl139090 /* 5925cf1a30Sjl139090 * Bcopy routine used by DR to copy 6025cf1a30Sjl139090 * between physical addresses. 6125cf1a30Sjl139090 * Borrowed from Starfire DR 2.6. 6225cf1a30Sjl139090 */ 6325cf1a30Sjl139090 #if defined(lint) 6425cf1a30Sjl139090 6525cf1a30Sjl139090 /*ARGSUSED*/ 6625cf1a30Sjl139090 void 6725cf1a30Sjl139090 bcopy32_il(uint64_t paddr1, uint64_t paddr2) 6825cf1a30Sjl139090 {} 6925cf1a30Sjl139090 7025cf1a30Sjl139090 #else /* lint */ 7125cf1a30Sjl139090 7225cf1a30Sjl139090 ENTRY_NP(bcopy32_il) 7325cf1a30Sjl139090 .register %g2, #scratch 7425cf1a30Sjl139090 .register %g3, #scratch 7525cf1a30Sjl139090 rdpr %pstate, %g0 7625cf1a30Sjl139090 ldxa [%o0]ASI_MEM, %o2 7725cf1a30Sjl139090 add %o0, 8, %o0 7825cf1a30Sjl139090 ldxa [%o0]ASI_MEM, %o3 7925cf1a30Sjl139090 add %o0, 8, %o0 8025cf1a30Sjl139090 ldxa [%o0]ASI_MEM, %g1 8125cf1a30Sjl139090 add %o0, 8, %o0 8225cf1a30Sjl139090 ldxa [%o0]ASI_MEM, %g2 8325cf1a30Sjl139090 8425cf1a30Sjl139090 stxa %o2, [%o1]ASI_MEM 8525cf1a30Sjl139090 add %o1, 8, %o1 8625cf1a30Sjl139090 stxa %o3, [%o1]ASI_MEM 8725cf1a30Sjl139090 add %o1, 8, %o1 8825cf1a30Sjl139090 stxa %g1, [%o1]ASI_MEM 8925cf1a30Sjl139090 add %o1, 8, %o1 9025cf1a30Sjl139090 stxa %g2, [%o1]ASI_MEM 9125cf1a30Sjl139090 9225cf1a30Sjl139090 retl 9325cf1a30Sjl139090 nop 9425cf1a30Sjl139090 SET_SIZE(bcopy32_il) 9525cf1a30Sjl139090 9625cf1a30Sjl139090 #endif /* lint */ 9725cf1a30Sjl139090 9825cf1a30Sjl139090 #if defined(lint) 9925cf1a30Sjl139090 10025cf1a30Sjl139090 /*ARGSUSED*/ 10125cf1a30Sjl139090 void 10225cf1a30Sjl139090 flush_cache_il(void) 10325cf1a30Sjl139090 {} 10425cf1a30Sjl139090 10525cf1a30Sjl139090 #else /* lint */ 10625cf1a30Sjl139090 10725cf1a30Sjl139090 ENTRY_NP(flush_cache_il) 10825cf1a30Sjl139090 rdpr %pstate, %o3 10925cf1a30Sjl139090 andn %o3, PSTATE_IE, %o4 11025cf1a30Sjl139090 wrpr %g0, %o4, %pstate 11125cf1a30Sjl139090 mov ASI_L2_CTRL_U2_FLUSH, %o4 11225cf1a30Sjl139090 mov ASI_L2_CTRL_RW_ADDR, %o5 11325cf1a30Sjl139090 stxa %o4, [%o5]ASI_L2_CTRL 11425cf1a30Sjl139090 ! retl 11525cf1a30Sjl139090 wrpr %g0, %o3, %pstate ! restore earlier pstate 11625cf1a30Sjl139090 SET_SIZE(flush_cache_il) 11725cf1a30Sjl139090 11825cf1a30Sjl139090 #endif /* lint */ 11925cf1a30Sjl139090 12025cf1a30Sjl139090 #if defined(lint) 12125cf1a30Sjl139090 /* ARGUSED */ 12225cf1a30Sjl139090 uint64_t 12325cf1a30Sjl139090 drmach_get_stick_il(void) 12425cf1a30Sjl139090 {} 12525cf1a30Sjl139090 12625cf1a30Sjl139090 #else /* lint */ 12725cf1a30Sjl139090 ENTRY_NP(drmach_get_stick_il) 12825cf1a30Sjl139090 retl 12925cf1a30Sjl139090 rd STICK, %o0 13025cf1a30Sjl139090 SET_SIZE(drmach_get_stick_il) 13125cf1a30Sjl139090 #endif /* lint */ 13225cf1a30Sjl139090 13325cf1a30Sjl139090 #if defined(lint) 13425cf1a30Sjl139090 /* ARGUSED */ 13525cf1a30Sjl139090 void 13625cf1a30Sjl139090 membar_sync_il(void) 13725cf1a30Sjl139090 {} 13825cf1a30Sjl139090 13925cf1a30Sjl139090 #else /* lint */ 14025cf1a30Sjl139090 ENTRY_NP(membar_sync_il) 14125cf1a30Sjl139090 retl 14225cf1a30Sjl139090 membar #Sync 14325cf1a30Sjl139090 SET_SIZE(membar_sync_il) 14425cf1a30Sjl139090 #endif /* lint */ 14525cf1a30Sjl139090 14625cf1a30Sjl139090 14725cf1a30Sjl139090 #if defined(lint) 14825cf1a30Sjl139090 14925cf1a30Sjl139090 /* ARGSUSED */ 15025cf1a30Sjl139090 void 15125cf1a30Sjl139090 flush_instr_mem_il(caddr_t vaddr) 15225cf1a30Sjl139090 {} 15325cf1a30Sjl139090 15425cf1a30Sjl139090 #else /* lint */ 15525cf1a30Sjl139090 15625cf1a30Sjl139090 /* 15725cf1a30Sjl139090 * flush_instr_mem: 15825cf1a30Sjl139090 * Flush 1 page of the I-$ starting at vaddr 15925cf1a30Sjl139090 * %o0 vaddr 16025cf1a30Sjl139090 * 16125cf1a30Sjl139090 * SPARC64-VI maintains consistency of the on-chip Instruction Cache with 16225cf1a30Sjl139090 * the stores from all processors so that a FLUSH instruction is only needed 16325cf1a30Sjl139090 * to ensure pipeline is consistent. This means a single flush is sufficient at 16425cf1a30Sjl139090 * the end of a sequence of stores that updates the instruction stream to 16525cf1a30Sjl139090 * ensure correct operation. 16625cf1a30Sjl139090 */ 16725cf1a30Sjl139090 16825cf1a30Sjl139090 ENTRY_NP(flush_instr_mem_il) 169*63360950Smp204432 flush %o0 ! address irrelevant 17025cf1a30Sjl139090 retl 17125cf1a30Sjl139090 nop 17225cf1a30Sjl139090 SET_SIZE(flush_instr_mem_il) 17325cf1a30Sjl139090 17425cf1a30Sjl139090 #endif /* lint */ 17525cf1a30Sjl139090 17625cf1a30Sjl139090 #if defined(lint) 17725cf1a30Sjl139090 17825cf1a30Sjl139090 /* ARGSUSED */ 17925cf1a30Sjl139090 void 18025cf1a30Sjl139090 drmach_sleep_il(void) 18125cf1a30Sjl139090 {} 18225cf1a30Sjl139090 18325cf1a30Sjl139090 #else /* lint */ 18425cf1a30Sjl139090 18525cf1a30Sjl139090 /* 18625cf1a30Sjl139090 * drmach-sleep_il: 18725cf1a30Sjl139090 * 18825cf1a30Sjl139090 * busy loop wait can affect performance of the sibling strand 18925cf1a30Sjl139090 * the sleep instruction can be used to avoid that. 19025cf1a30Sjl139090 */ 19125cf1a30Sjl139090 19225cf1a30Sjl139090 ENTRY_NP(drmach_sleep_il) 19325cf1a30Sjl139090 .word 0x81b01060 19425cf1a30Sjl139090 retl 19525cf1a30Sjl139090 nop 19668ac2337Sjl139090 SET_SIZE(drmach_sleep_il) 19768ac2337Sjl139090 19868ac2337Sjl139090 #endif /* lint */ 19968ac2337Sjl139090 20068ac2337Sjl139090 #if defined(lint) 20168ac2337Sjl139090 20268ac2337Sjl139090 /* ARGSUSED */ 20368ac2337Sjl139090 void 20468ac2337Sjl139090 flush_windows_il(void) 20568ac2337Sjl139090 {} 20668ac2337Sjl139090 20768ac2337Sjl139090 #else /* lint */ 20868ac2337Sjl139090 20968ac2337Sjl139090 /* 21068ac2337Sjl139090 * flush_windows_il: 21168ac2337Sjl139090 * 21268ac2337Sjl139090 */ 21368ac2337Sjl139090 21468ac2337Sjl139090 ENTRY_NP(flush_windows_il) 21568ac2337Sjl139090 retl 21668ac2337Sjl139090 flushw 21768ac2337Sjl139090 SET_SIZE(flush_windows_il) 21825cf1a30Sjl139090 21925cf1a30Sjl139090 #endif /* lint */ 220