1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/sysmacros.h> 32 #include <sys/sunddi.h> 33 #include <sys/esunddi.h> 34 #include <sys/platform_module.h> 35 #include <sys/errno.h> 36 #include <sys/lgrp.h> 37 #include <sys/memnode.h> 38 #include <sys/promif.h> 39 40 #define EBUS_NAME "ebus" 41 #define RTC_NAME "rtc" 42 #define SHARED_MI2CV_PATH "/i2c@1f,520000" 43 static dev_info_t *shared_mi2cv_dip; 44 static kmutex_t chicago_mi2cv_mutex; 45 46 /* 47 * External variables 48 */ 49 extern volatile uint8_t *v_rtc_addr_reg; 50 51 int (*p2get_mem_unum)(int, uint64_t, char *, int, int *); 52 static void get_ebus_rtc_vaddr(void); 53 54 void 55 startup_platform(void) 56 { 57 mutex_init(&chicago_mi2cv_mutex, NULL, NULL, NULL); 58 } 59 60 int 61 set_platform_tsb_spares() 62 { 63 return (0); 64 } 65 66 void 67 set_platform_defaults(void) 68 { 69 extern char *tod_module_name; 70 71 /* 72 * We need to set tod_module_name explicitly because there is a 73 * well known South bridge RTC node on chicago and tod_module_name 74 * gets set to that. 75 */ 76 tod_module_name = "todbq4802"; 77 78 /* Work-around for Chicago platform */ 79 get_ebus_rtc_vaddr(); 80 81 } 82 83 /* 84 * Definitions for accessing the pci config space of the isa node 85 * of Southbridge. 86 */ 87 static ddi_acc_handle_t isa_handle = NULL; /* handle for isa pci space */ 88 89 90 void 91 load_platform_drivers(void) 92 { 93 /* 94 * Install power driver which handles the power button. 95 */ 96 if (i_ddi_attach_hw_nodes("power") != DDI_SUCCESS) 97 cmn_err(CE_WARN, "Failed to install \"power\" driver."); 98 (void) ddi_hold_driver(ddi_name_to_major("power")); 99 100 /* 101 * It is OK to return error because 'us' driver is not available 102 * in all clusters (e.g. missing in Core cluster). 103 */ 104 (void) i_ddi_attach_hw_nodes("us"); 105 106 if (i_ddi_attach_hw_nodes("grbeep") != DDI_SUCCESS) 107 cmn_err(CE_WARN, "Failed to install \"beep\" driver."); 108 109 110 /* 111 * mc-us3i must stay loaded for plat_get_mem_unum() 112 */ 113 if (i_ddi_attach_hw_nodes("mc-us3i") != DDI_SUCCESS) 114 cmn_err(CE_WARN, "mc-us3i driver failed to install"); 115 (void) ddi_hold_driver(ddi_name_to_major("mc-us3i")); 116 117 /* 118 * Figure out which mi2cv dip is shared with OBP for the nvram 119 * device, so the lock can be acquired. 120 */ 121 shared_mi2cv_dip = e_ddi_hold_devi_by_path(SHARED_MI2CV_PATH, 0); 122 } 123 124 /*ARGSUSED*/ 125 int 126 plat_cpu_poweron(struct cpu *cp) 127 { 128 return (ENOTSUP); /* not supported on this platform */ 129 } 130 131 /*ARGSUSED*/ 132 int 133 plat_cpu_poweroff(struct cpu *cp) 134 { 135 return (ENOTSUP); /* not supported on this platform */ 136 } 137 138 /*ARGSUSED*/ 139 void 140 plat_freelist_process(int mnode) 141 { 142 } 143 144 char *platform_module_list[] = { 145 "mi2cv", 146 "jbusppm", 147 "pca9556", 148 "ppm", 149 (char *)0 150 }; 151 152 /*ARGSUSED*/ 153 void 154 plat_tod_fault(enum tod_fault_type tod_bad) 155 { 156 } 157 158 /*ARGSUSED*/ 159 int 160 plat_get_mem_unum(int synd_code, uint64_t flt_addr, int flt_bus_id, 161 int flt_in_memory, ushort_t flt_status, char *buf, int buflen, int *lenp) 162 { 163 if (flt_in_memory && (p2get_mem_unum != NULL)) 164 return (p2get_mem_unum(synd_code, P2ALIGN(flt_addr, 8), 165 buf, buflen, lenp)); 166 else 167 return (ENOTSUP); 168 } 169 170 /*ARGSUSED*/ 171 int 172 plat_get_cpu_unum(int cpuid, char *buf, int buflen, int *lenp) 173 { 174 if (snprintf(buf, buflen, "MB") >= buflen) { 175 return (ENOSPC); 176 } else { 177 *lenp = strlen(buf); 178 return (0); 179 } 180 } 181 182 /* 183 * Fiesta support for lgroups. 184 * 185 * On fiesta platform, an lgroup platform handle == CPU id 186 */ 187 188 /* 189 * Macro for extracting the CPU number from the CPU id 190 */ 191 #define CPUID_TO_LGRP(id) ((id) & 0x7) 192 #define CHICAGO_MC_SHIFT 36 193 194 /* 195 * Return the platform handle for the lgroup containing the given CPU 196 */ 197 void * 198 plat_lgrp_cpu_to_hand(processorid_t id) 199 { 200 return ((void *)(uintptr_t)CPUID_TO_LGRP(id)); 201 } 202 203 /* 204 * Platform specific lgroup initialization 205 */ 206 void 207 plat_lgrp_init(void) 208 { 209 dnode_t curnode; 210 char tmp_name[MAXSYSNAME]; 211 int portid; 212 int cpucnt = 0; 213 int max_portid = -1; 214 extern uint32_t lgrp_expand_proc_thresh; 215 extern uint32_t lgrp_expand_proc_diff; 216 extern pgcnt_t lgrp_mem_free_thresh; 217 extern uint32_t lgrp_loadavg_tolerance; 218 extern uint32_t lgrp_loadavg_max_effect; 219 extern uint32_t lgrp_load_thresh; 220 extern lgrp_mem_policy_t lgrp_mem_policy_root; 221 222 /* 223 * Count the number of CPUs installed to determine if 224 * NUMA optimization should be enabled or not. 225 * 226 * All CPU nodes reside in the root node and have a 227 * device type "cpu". 228 */ 229 curnode = prom_rootnode(); 230 for (curnode = prom_childnode(curnode); curnode; 231 curnode = prom_nextnode(curnode)) { 232 bzero(tmp_name, MAXSYSNAME); 233 if (prom_getproplen(curnode, OBP_NAME) < MAXSYSNAME) { 234 if (prom_getprop(curnode, OBP_NAME, 235 (caddr_t)tmp_name) == -1 || prom_getprop(curnode, 236 OBP_DEVICETYPE, tmp_name) == -1 || strcmp(tmp_name, 237 "cpu") != 0) 238 continue; 239 240 cpucnt++; 241 if (prom_getprop(curnode, "portid", (caddr_t)&portid) != 242 -1 && portid > max_portid) 243 max_portid = portid; 244 } 245 } 246 if (cpucnt <= 1) 247 max_mem_nodes = 1; 248 else if (max_portid >= 0 && max_portid < MAX_MEM_NODES) 249 max_mem_nodes = max_portid + 1; 250 251 /* 252 * Set tuneables for fiesta architecture 253 * 254 * lgrp_expand_proc_thresh is the minimum load on the lgroups 255 * this process is currently running on before considering 256 * expanding threads to another lgroup. 257 * 258 * lgrp_expand_proc_diff determines how much less the remote lgroup 259 * must be loaded before expanding to it. 260 * 261 * Optimize for memory bandwidth by spreading multi-threaded 262 * program to different lgroups. 263 */ 264 lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1; 265 lgrp_expand_proc_diff = lgrp_loadavg_max_effect / 2; 266 lgrp_loadavg_tolerance = lgrp_loadavg_max_effect / 2; 267 lgrp_mem_free_thresh = 1; /* home lgrp must have some memory */ 268 lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1; 269 lgrp_mem_policy_root = LGRP_MEM_POLICY_NEXT; 270 lgrp_load_thresh = 0; 271 272 mem_node_pfn_shift = CHICAGO_MC_SHIFT - MMU_PAGESHIFT; 273 } 274 275 /* 276 * Return latency between "from" and "to" lgroups 277 * 278 * This latency number can only be used for relative comparison 279 * between lgroups on the running system, cannot be used across platforms, 280 * and may not reflect the actual latency. It is platform and implementation 281 * specific, so platform gets to decide its value. It would be nice if the 282 * number was at least proportional to make comparisons more meaningful though. 283 * NOTE: The numbers below are supposed to be load latencies for uncached 284 * memory divided by 10. 285 */ 286 int 287 plat_lgrp_latency(lgrp_handle_t from, lgrp_handle_t to) 288 { 289 /* 290 * Return remote latency when there are more than two lgroups 291 * (root and child) and getting latency between two different 292 * lgroups or root is involved 293 */ 294 if (lgrp_optimizations() && (from != to || 295 from == LGRP_DEFAULT_HANDLE || to == LGRP_DEFAULT_HANDLE)) 296 return (17); 297 else 298 return (12); 299 } 300 301 int 302 plat_pfn_to_mem_node(pfn_t pfn) 303 { 304 ASSERT(max_mem_nodes > 1); 305 return (pfn >> mem_node_pfn_shift); 306 } 307 308 /* 309 * Assign memnode to lgroups 310 */ 311 void 312 plat_fill_mc(dnode_t nodeid) 313 { 314 int portid; 315 316 /* 317 * Chicago memory controller portid == global CPU id 318 */ 319 if ((prom_getprop(nodeid, "portid", (caddr_t)&portid) == -1) || 320 (portid < 0)) 321 return; 322 323 if (portid < max_mem_nodes) 324 plat_assign_lgrphand_to_mem_node((lgrp_handle_t)portid, portid); 325 } 326 327 /* ARGSUSED */ 328 void 329 plat_build_mem_nodes(u_longlong_t *list, size_t nelems) 330 { 331 size_t elem; 332 pfn_t basepfn; 333 pgcnt_t npgs; 334 335 /* 336 * Boot install lists are arranged <addr, len>, <addr, len>, ... 337 */ 338 for (elem = 0; elem < nelems; elem += 2) { 339 basepfn = btop(list[elem]); 340 npgs = btop(list[elem+1]); 341 mem_node_add_slice(basepfn, basepfn + npgs - 1); 342 } 343 } 344 345 /* 346 * Common locking enter code 347 */ 348 void 349 plat_setprop_enter(void) 350 { 351 mutex_enter(&chicago_mi2cv_mutex); 352 } 353 354 /* 355 * Common locking exit code 356 */ 357 void 358 plat_setprop_exit(void) 359 { 360 mutex_exit(&chicago_mi2cv_mutex); 361 } 362 363 /* 364 * Called by mi2cv driver 365 */ 366 void 367 plat_shared_i2c_enter(dev_info_t *i2cnexus_dip) 368 { 369 if (i2cnexus_dip == shared_mi2cv_dip) { 370 plat_setprop_enter(); 371 } 372 } 373 374 /* 375 * Called by mi2cv driver 376 */ 377 void 378 plat_shared_i2c_exit(dev_info_t *i2cnexus_dip) 379 { 380 if (i2cnexus_dip == shared_mi2cv_dip) { 381 plat_setprop_exit(); 382 } 383 } 384 385 /* 386 * Work-around for the Chicago platform. 387 * There are two RTCs in the Chicago platform, one on the Southbridge 388 * and one on the EBUS. 389 * In the current Solaris implementation, have_rtc in sun4u/os/fillsysinfo.c 390 * returns address of the first rtc it sees. In this case, it's the SB RTC. 391 * 392 * get_ebus_rtc_vaddr() looks for the EBUS RTC and setup the right address. 393 * If there is no EBUS RTC node or the RTC node does not have the valid 394 * address property, get_ebus_rtc_vaddr() will fail. 395 */ 396 static void 397 get_ebus_rtc_vaddr() 398 { 399 dnode_t node; 400 int size; 401 uint32_t eaddr; 402 403 /* Find ebus RTC node */ 404 if ((node = prom_findnode_byname(prom_rootnode(), 405 EBUS_NAME)) == OBP_NONODE) 406 cmn_err(CE_PANIC, "ebus node not present\n"); 407 if ((node = prom_findnode_byname(node, RTC_NAME)) == OBP_NONODE) 408 cmn_err(CE_PANIC, "ebus RTC node not found\n"); 409 410 /* Make sure the ebus RTC address property is valid */ 411 if ((size = prom_getproplen(node, "address")) == -1) 412 cmn_err(CE_PANIC, "ebus RTC addr prop. length not found\n"); 413 if (size != sizeof (eaddr)) 414 cmn_err(CE_PANIC, "ebus RTC addr length not OK." 415 " expected = %lu found =%d\n", sizeof (eaddr), size); 416 if (prom_getprop(node, "address", (caddr_t)&eaddr) == -1) 417 cmn_err(CE_PANIC, "ebus RTC addr propery not found\n"); 418 v_rtc_addr_reg = (volatile unsigned char *)(uintptr_t)eaddr; 419 420 /* 421 * Does this rtc have watchdog support? 422 */ 423 if (prom_getproplen(node, "watchdog-enable") != -1) 424 watchdog_available = 1; 425 } 426