xref: /titanic_51/usr/src/uts/sun4/io/px/px_fm.h (revision 3a634bfc9a31448c742688c603d3e76b83b041a0)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _SYS_PX_FM_H
27 #define	_SYS_PX_FM_H
28 
29 #ifdef	__cplusplus
30 extern "C" {
31 #endif
32 
33 #define	PX_ERR_PIL	14
34 #define	PX_ERR_LOW_PIL  9
35 
36 /*
37  * Error handlers maybe called due to trap or interrupts
38  * occured.
39  */
40 #define	PX_TRAP_CALL	0
41 #define	PX_INTR_CALL	1
42 #define	PX_LIB_CALL	2
43 
44 /*
45  * Definition of Fire internal error severity -
46  * HW Reset     Errors that cause hardware to automatically reset. Software is
47  *              being reset along, sticky status bits need to be cleaned up upon
48  *              system initialization.
49  * Panic        Errors that definitely result in panic'ing the system.
50  * Expected     Expected error, do not panic, plus do not send ereport.
51  * Protected    Errors SW to determine panic or not, forgivable for safe access.
52  *              Set when SW determines this error is forgivable during safe acc.
53  * No-panic     Errors that don't directly result in panic'ing the system.
54  * No-Error     When an interrupt occured and no errors were seen
55  */
56 #define	PX_HW_RESET		(0x1 << 5)
57 #define	PX_PANIC		(0x1 << 4)
58 #define	PX_EXPECTED		(0x1 << 3)
59 #define	PX_PROTECTED		(0x1 << 2)
60 #define	PX_NO_PANIC		(0x1 << 1)
61 #define	PX_NO_ERROR		(0x1 << 0)
62 
63 #define	PX_HB		(0x1 << 2)
64 #define	PX_RP		(0x1 << 1)
65 #define	PX_RC		(0x1 << 0)
66 
67 /*
68  * Generic PCIe Root Port Error Handling
69  * This struct must align with px_pec_err_t in sun4v/io/px/px_err.h
70  */
71 typedef struct px_err_pcie {
72 	uint32_t tx_hdr1;	/* sysino */
73 	uint32_t tx_hdr2;	/* sysino */
74 	uint32_t tx_hdr3;	/* ehdl */
75 	uint32_t tx_hdr4;	/* ehdl */
76 	uint32_t primary_ue;	/* stick */
77 	uint32_t rsvd0;		/* stick */
78 	uint32_t rsvd1;		/* pec_desc */
79 	uint16_t pci_err_status;
80 	uint16_t pcie_err_status;
81 	uint32_t ce_reg;
82 	uint32_t ue_reg;
83 	uint32_t rx_hdr1;	/* hdr[0] */
84 	uint32_t rx_hdr2;	/* hdr[0] */
85 	uint32_t rx_hdr3;	/* hdr[1] */
86 	uint32_t rx_hdr4;	/* hdr[1] */
87 	uint32_t rsvd3;		/* err_src_reg */
88 	uint32_t rsvd4;		/* root err status */
89 } px_err_pcie_t;
90 
91 #define	PX_FM_BLOCK_HOST	(0x1 << 0)
92 #define	PX_FM_BLOCK_PCIE	(0x1 << 1)
93 #define	PX_FM_BLOCK_ALL		(PX_FM_BLOCK_HOST | PX_FM_BLOCK_PCIE)
94 
95 /*
96  * Error handling FMA hook
97  */
98 extern void px_bus_enter(dev_info_t *dip, ddi_acc_handle_t handle);
99 extern void px_bus_exit(dev_info_t *dip, ddi_acc_handle_t handle);
100 extern int px_fm_attach(px_t *px_p);
101 extern void px_fm_detach(px_t *px_p);
102 extern int px_fm_init_child(dev_info_t *, dev_info_t *, int,
103     ddi_iblock_cookie_t *);
104 extern void px_fm_acc_setup(ddi_map_req_t *, dev_info_t *, pci_regspec_t *rp);
105 extern int px_fm_callback(dev_info_t *, ddi_fm_error_t *, const void *);
106 extern int px_err_cmn_intr(px_t *, ddi_fm_error_t *, int, int);
107 
108 /*
109  * Fire interrupt handlers
110  */
111 extern uint_t px_err_cb_intr(caddr_t arg);
112 extern uint_t px_err_dmc_pec_intr(caddr_t arg);
113 extern uint_t px_err_fabric_intr(px_t *px_p, msgcode_t msg_code,
114     pcie_req_id_t rid);
115 
116 /*
117  * Common error handling functions
118  */
119 extern int px_scan_fabric(px_t *px_p, dev_info_t *rdip, ddi_fm_error_t *derr);
120 extern void px_err_safeacc_check(px_t *px_p, ddi_fm_error_t *derr);
121 extern int px_err_check_eq(dev_info_t *dip);
122 extern int px_err_check_pcie(dev_info_t *dip, ddi_fm_error_t *derr,
123     px_err_pcie_t *regs);
124 extern int px_fm_enter(px_t *px_p);
125 extern void px_fm_exit(px_t *px_p);
126 extern void px_err_panic(int err, int msg, int fab_err, boolean_t isTest);
127 extern pf_data_t *px_rp_en_q(px_t *px_p, pcie_req_id_t fault_bdf,
128     uint32_t fault_addr, uint16_t s_status);
129 extern pf_data_t *px_get_pfd(px_t *px_p);
130 
131 /*
132  * Sparc specific cfg, pio and dma handle lookup/check functions
133  */
134 extern int px_err_cfg_hdl_check(dev_info_t *dip, const void *handle,
135     const void *addr, const void *not_used);
136 extern int px_err_pio_hdl_check(dev_info_t *dip, const void *handle,
137     const void *addr, const void *not_used);
138 extern int px_err_dma_hdl_check(dev_info_t *dip, const void *handle,
139     const void *addr, const void *not_used);
140 
141 #ifdef	__cplusplus
142 }
143 #endif
144 
145 #endif	/* _SYS_PX_FM_H */
146