xref: /titanic_51/usr/src/uts/sun4/io/px/px_dma.h (revision 35551380472894a564e057962b701af78f719377)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_SYS_PX_DMA_H
28 #define	_SYS_PX_DMA_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 typedef	pfn_t px_iopfn_t;
37 
38 #define	MAKE_DMA_COOKIE(cp, address, size)	\
39 	{					\
40 		(cp)->dmac_notused = 0;		\
41 		(cp)->dmac_type = 0;		\
42 		(cp)->dmac_laddress = (address);	\
43 		(cp)->dmac_size = (size);	\
44 	}
45 
46 #define	HAS_REDZONE(mp)	(((mp)->dmai_rflags & DDI_DMA_REDZONE) ? 1 : 0)
47 
48 typedef struct px_dma_hdl {
49 	ddi_dma_impl_t	pdh_ddi_hdl;
50 	ddi_dma_attr_t	pdh_attr_dev;
51 } px_dma_hdl_t;
52 
53 struct px_dma_impl { /* forthdebug only, keep in sync with ddi_dma_impl_t */
54 	ulong_t		dmai_mapping;
55 	uint_t		dmai_size;
56 	off_t		dmai_offset;
57 	uint_t		dmai_minxfer;
58 	uint_t		dmai_burstsizes;
59 	uint_t		dmai_ndvmapages;
60 	uint_t		dmai_roffset;
61 	uint_t		dmai_rflags;
62 	uint_t		dmai_flags;
63 	uint_t		dmai_nwin;
64 	uint_t		dmai_winsize;
65 	caddr_t		dmai_tte;
66 	void		*dmai_pfnlst;
67 	uint_t		*dmai_pfn0;
68 	void		*dmai_winlst;
69 	dev_info_t	*dmai_rdip;
70 	ddi_dma_obj_t	dmai_object;
71 	ddi_dma_attr_t	dmai_attr_aug;
72 	ddi_dma_cookie_t *dmai_cookie;
73 
74 	int		(*dmai_fault_check)(struct ddi_dma_impl *handle);
75 	void		(*dmai_fault_notify)(struct ddi_dma_impl *handle);
76 	int		dmai_fault;
77 
78 	ddi_dma_attr_t	dmai_attr_dev;
79 };
80 
81 /* Included in case other px-specific flags are added later. */
82 #define	PX_DMA_SYNC_DDI_FLAGS	((1 << 16) - 1)	/* Look for only DDI flags */
83 
84 /*
85  * flags for overloading dmai_inuse field of the dma request
86  * structure:
87  */
88 #define	dmai_flags		dmai_inuse
89 #define	dmai_tte		dmai_nexus_private
90 #define	dmai_fdvma		dmai_nexus_private
91 #define	dmai_pfnlst		dmai_iopte
92 #define	dmai_winlst		dmai_minfo
93 #define	dmai_pfn0		dmai_sbi
94 #define	dmai_roffset		dmai_pool
95 #define	PX_MP_PFN0(mp)		((px_iopfn_t)(mp)->dmai_pfn0)
96 #define	PX_WINLST(mp)		((px_dma_win_t *)(mp)->dmai_winlst)
97 #define	PX_DEV_ATTR(mp)		((ddi_dma_attr_t *)(mp + 1))
98 #define	SET_DMAATTR(p, lo, hi, nocross, cntmax)	\
99 	(p)->dma_attr_addr_lo	= (lo); \
100 	(p)->dma_attr_addr_hi	= (hi); \
101 	(p)->dma_attr_seg	= (nocross); \
102 	(p)->dma_attr_count_max	= (cntmax);
103 
104 #define	SET_DMAALIGN(p, align)	\
105 	(p)->dma_attr_align = (align);
106 
107 #define	PX_DMAI_FLAGS_INUSE		0x1
108 #define	PX_DMAI_FLAGS_BYPASSREQ		0x2
109 #define	PX_DMAI_FLAGS_PEER_ONLY		0x4
110 #define	PX_DMAI_FLAGS_NOCTX		0x8
111 #define	PX_DMAI_FLAGS_DVMA		0x10
112 #define	PX_DMAI_FLAGS_BYPASS		0x20
113 #define	PX_DMAI_FLAGS_PTP		0x40
114 #define	PX_DMAI_FLAGS_DMA	(PX_DMAI_FLAGS_BYPASS | PX_DMAI_FLAGS_PTP)
115 #define	PX_DMAI_FLAGS_DMA_TYPE	(PX_DMAI_FLAGS_DMA | PX_DMAI_FLAGS_DVMA)
116 #define	PX_DMAI_FLAGS_CONTEXT		0x100
117 #define	PX_DMAI_FLAGS_FASTTRACK		0x200
118 #define	PX_DMAI_FLAGS_VMEMCACHE		0x400
119 #define	PX_DMAI_FLAGS_PGPFN		0x800
120 #define	PX_DMAI_FLAGS_NOSYSLIMIT	0x1000
121 #define	PX_DMAI_FLAGS_NOFASTLIMIT	0x2000
122 #define	PX_DMAI_FLAGS_NOSYNC		0x4000
123 #define	PX_DMAI_FLAGS_PTP32		0x10000
124 #define	PX_DMAI_FLAGS_PTP64		0x20000
125 #define	PX_DMAI_FLAGS_PRESERVE	(PX_DMAI_FLAGS_PEER_ONLY | \
126 	PX_DMAI_FLAGS_BYPASSREQ | PX_DMAI_FLAGS_NOSYSLIMIT | \
127 	PX_DMAI_FLAGS_NOFASTLIMIT | PX_DMAI_FLAGS_NOCTX)
128 
129 #define	PX_HAS_NOFASTLIMIT(mp)	((mp)->dmai_flags & PX_DMAI_FLAGS_NOFASTLIMIT)
130 #define	PX_HAS_NOSYSLIMIT(mp)	((mp)->dmai_flags & PX_DMAI_FLAGS_NOSYSLIMIT)
131 #define	PX_DMA_ISPEERONLY(mp)	((mp)->dmai_flags & PX_DMAI_FLAGS_PEER_ONLY)
132 #define	PX_DMA_ISPGPFN(mp)	((mp)->dmai_flags & PX_DMAI_FLAGS_PGPFN)
133 #define	PX_DMA_TYPE(mp)	((mp)->dmai_flags & PX_DMAI_FLAGS_DMA_TYPE)
134 #define	PX_DMA_ISDVMA(mp)	(PX_DMA_TYPE(mp) == PX_DMAI_FLAGS_DVMA)
135 #define	PX_DMA_ISBYPASS(mp)	(PX_DMA_TYPE(mp) == PX_DMAI_FLAGS_BYPASS)
136 #define	PX_DMA_ISPTP(mp)	(PX_DMA_TYPE(mp) == PX_DMAI_FLAGS_PTP)
137 #define	PX_DMA_ISPTP32(mp)	((mp)->dmai_flags & PX_DMAI_FLAGS_PTP32)
138 #define	PX_DMA_ISPTP64(mp)	((mp)->dmai_flags & PX_DMAI_FLAGS_PTP64)
139 #define	PX_DMA_CANFAST(mp)	(((mp)->dmai_ndvmapages + HAS_REDZONE(mp) \
140 		<= px_dvma_page_cache_clustsz) && PX_HAS_NOFASTLIMIT(mp))
141 #define	PX_DMA_WINNPGS(mp)	MMU_BTOP((mp)->dmai_winsize)
142 #define	PX_DMA_CANCACHE(mp)	(!HAS_REDZONE(mp) && \
143 		(PX_DMA_WINNPGS(mp) == 1) && PX_HAS_NOSYSLIMIT(mp))
144 
145 #define	PX_DEV_NOFASTLIMIT(lo, hi, fastlo, fasthi, align_pg) \
146 	(((lo) <= (fastlo)) && ((hi) >= (fasthi)) && \
147 	((align_pg) <= px_dvma_page_cache_clustsz))
148 
149 #define	PX_DEV_NOSYSLIMIT(lo, hi, syslo, syshi, align_pg) \
150 	(((lo) <= (syslo)) && ((hi) >= (syshi)) && (align_pg == 1))
151 
152 #define	PX_DMA_NOCTX(rdip) (!px_use_contexts || (px_ctx_no_active_flush && \
153 	ddi_prop_exists(DDI_DEV_T_ANY, rdip, \
154 		DDI_PROP_DONTPASS | DDI_PROP_NOTPROM, "active-dma-flush")))
155 #define	PX_DMA_USECTX(mp)	(!(mp->dmai_flags & DMAI_FLAGS_NOCTX))
156 
157 #define	PX_DMA_BADPTP(pfn, attrp) \
158 	((IOMMU_PTOB(pfn) < attrp->dma_attr_addr_lo) || \
159 	(IOMMU_PTOB(pfn) > attrp->dma_attr_addr_hi))
160 #define	PX_DMA_CURWIN(mp) \
161 	(((mp)->dmai_offset + (mp)->dmai_roffset) / (mp)->dmai_winsize)
162 
163 #ifdef PX_DMA_PROF
164 
165 /* collect fast track failure statistics */
166 #define	PX_DVMA_FASTTRAK_PROF(mp) { \
167 if ((mp->dmai_ndvmapages + HAS_REDZONE(mp)) > px_dvma_page_cache_clustsz) \
168 	px_dvmaft_npages++; \
169 else if (!HAS_NOFASTLIMIT(mp)) \
170 	px_dvmaft_limit++; \
171 }
172 
173 #else /* !PX_DMA_PROF */
174 
175 #define	PX_DVMA_FASTTRAK_PROF(mp)
176 
177 #endif	/* PX_DMA_PROF */
178 
179 typedef struct px_dma_win {
180 	struct px_dma_win *win_next;
181 	uint32_t win_ncookies;
182 	uint32_t win_curseg;
183 	uint64_t win_size;
184 	uint64_t win_offset;
185 	/* cookie table: sizeof (ddi_dma_cookie_t) * win_ncookies */
186 } px_dma_win_t;
187 
188 /* dvma debug records */
189 struct px_dvma_rec {
190 	char *dvma_addr;
191 	uint_t len;
192 	ddi_dma_impl_t *mp;
193 	struct px_dvma_rec *next;
194 };
195 
196 extern int px_dma_attach(px_t *px_p);
197 extern int px_dma_win(dev_info_t *dip, dev_info_t *rdip,
198 	ddi_dma_handle_t handle, uint_t win, off_t *offp,
199 	size_t *lenp, ddi_dma_cookie_t *cookiep, uint_t *ccountp);
200 
201 extern ddi_dma_impl_t *px_dma_allocmp(dev_info_t *dip, dev_info_t *rdip,
202 	int (*waitfp)(caddr_t), caddr_t arg);
203 extern void px_dma_freemp(ddi_dma_impl_t *mp);
204 extern void px_dma_freepfn(ddi_dma_impl_t *mp);
205 extern ddi_dma_impl_t *px_dma_lmts2hdl(dev_info_t *dip, dev_info_t *rdip,
206 	px_mmu_t *mmu_p, ddi_dma_req_t *dmareq);
207 extern int px_dma_attr2hdl(px_t *px_p, ddi_dma_impl_t *mp);
208 extern int px_dma_type(px_t *px_p, ddi_dma_req_t *req, ddi_dma_impl_t *mp);
209 extern int px_dma_pfn(px_t *px_p, ddi_dma_req_t *req, ddi_dma_impl_t *mp);
210 extern int px_dvma_win(px_t *px_p, ddi_dma_req_t *r, ddi_dma_impl_t *mp);
211 extern void px_dma_freewin(ddi_dma_impl_t *mp);
212 extern int px_dvma_map_fast(px_mmu_t *mmu_p, ddi_dma_impl_t *mp);
213 extern int px_dvma_map(ddi_dma_impl_t *mp, ddi_dma_req_t *dmareq,
214 	px_mmu_t *mmu_p);
215 extern void px_dvma_unmap(px_mmu_t *mmu_p, ddi_dma_impl_t *mp);
216 extern int px_dma_physwin(px_t *px_p, ddi_dma_req_t *dmareq,
217 	ddi_dma_impl_t *mp);
218 extern int px_dvma_ctl(dev_info_t *dip, dev_info_t *rdip,
219 	ddi_dma_impl_t *mp, enum ddi_dma_ctlops cmd, off_t *offp,
220 	size_t *lenp, caddr_t *objp, uint_t cache_flags);
221 extern int px_dma_ctl(dev_info_t *dip, dev_info_t *rdip,
222 	ddi_dma_impl_t *mp, enum ddi_dma_ctlops cmd, off_t *offp,
223 	size_t *lenp, caddr_t *objp, uint_t cache_flags);
224 
225 #define	PX_GET_MP_NCOOKIES(mp)		((mp)->dmai_ncookies)
226 #define	PX_SET_MP_NCOOKIES(mp, nc)	((mp)->dmai_ncookies = (nc))
227 #define	PX_GET_MP_PFN1_ADDR(mp)	(((px_iopfn_t *)(mp)->dmai_pfnlst) + 1)
228 
229 #define	PX_GET_MP_TTE(tte) \
230 	(((uint64_t)(uintptr_t)(tte) >> 5) << (32 + 5) | \
231 			((uint32_t)(uintptr_t)(tte)) & 0x12)
232 #define	PX_SAVE_MP_TTE(mp, tte)	\
233 	(mp)->dmai_tte = (caddr_t)((uintptr_t)HI32(tte) | ((tte) & 0x12))
234 
235 #define	PX_GET_MP_PFN1(mp, page_no) \
236 	(((px_iopfn_t *)(mp)->dmai_pfnlst)[page_no])
237 #define	PX_GET_MP_PFN(mp, page_no)	((mp)->dmai_ndvmapages == 1 ? \
238 	(px_iopfn_t)(mp)->dmai_pfnlst : PX_GET_MP_PFN1(mp, page_no))
239 
240 #define	PX_SET_MP_PFN(mp, page_no, pfn) { \
241 	if ((mp)->dmai_ndvmapages == 1) { \
242 		ASSERT(!((page_no) || (mp)->dmai_pfnlst)); \
243 		(mp)->dmai_pfnlst = (void *)(pfn); \
244 	} else \
245 		((px_iopfn_t *)(mp)->dmai_pfnlst)[page_no] = \
246 		    (px_iopfn_t)(pfn);			     \
247 }
248 #define	PX_SET_MP_PFN1(mp, page_no, pfn) { \
249 	((px_iopfn_t *)(mp)->dmai_pfnlst)[page_no] = (pfn); \
250 }
251 
252 extern int px_dma_freehdl(dev_info_t *dip, dev_info_t *rdip,
253 	ddi_dma_handle_t handle);
254 
255 #if defined(DEBUG)
256 extern void px_dump_dma_handle(uint64_t flag, dev_info_t *dip,
257 	ddi_dma_impl_t *hp);
258 #else
259 #define	px_dump_dma_handle(flag, dip, hp)
260 #endif
261 
262 #ifdef	__cplusplus
263 }
264 #endif
265 
266 #endif	/* _SYS_PX_DMA_H */
267