1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_FM_CPU_GMCA_H 28 #define _SYS_FM_CPU_GMCA_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* 37 * Generic x86 cpu ereports. 38 * 39 * On a machine-check exception, or on a periodic poll for error status 40 * of a cpu, we read through all the MCA banks of the processor and 41 * log an ereport for each MCA bank that contains valid error telemetry. 42 * These ereports will all share the same detector FMRI and ENA. 43 * 44 * Since we have no model-specific knowledge of the cpu we cannot 45 * decode all details of the error, so we'll stick to the "architectural" 46 * bits. Similarly since we have no associated memory-controller driver 47 * or detailed topology information we cannot produce "resource" ereport 48 * FMRIs. 49 */ 50 51 /* Ereport class subcategory for generic x86 processors */ 52 #define FM_EREPORT_CPU_GENERIC "generic-x86" 53 54 /* 55 * Simple error code ereport leaf classes 56 */ 57 #define FM_EREPORT_CPU_GENERIC_UNCLASSIFIED "unclassified" 58 #define FM_EREPORT_CPU_GENERIC_MC_CODE_PARITY "microcode_rom_parity" 59 #define FM_EREPORT_CPU_GENERIC_EXTERNAL "external" 60 #define FM_EREPORT_CPU_GENERIC_FRC "frc" 61 #define FM_EREPORT_CPU_GENERIC_INTERNAL_TIMER "internal_timer" 62 #define FM_EREPORT_CPU_GENERIC_INTERNAL_UNCLASS "internal_unclassified" 63 64 /* 65 * Leaf class to be used when we can match no simple or compound class 66 */ 67 #define FM_EREPORT_CPU_GENERIC_UNKNOWN "unknown" 68 69 /* 70 * Compound error code ereport leaf classes. The arguments for snprintf 71 * will appear in the following order: 72 * 73 * 1 - TT interpretation 74 * 2 - LL interpretation 75 * 3 - RRRR interpretation 76 * 4 - PP interpretation 77 * 5 - II interpretation 78 * 6 - T interpretation 79 * 7 - "_uc" if this is a compound error with MCi_STATUS.UC set, else "" 80 * 81 * They can be selected in the format string using the %n$s specifier form. 82 * 83 * The set of interpretations that we expand to will not be exactly the 84 * same as the set of mnemonics described in Vol 3A (see the 85 * FM_EREPORT_PAYLOAD_NAME_COMPOUND_ERR ereport payload member for that). 86 * Instead we wish to compress the possible ereport classes that can 87 * be generated by pushing things such as "LG" for generic cache level 88 * down to "". 89 * 90 * 91 * "Memory Hierarchy" in compound errors actually refers to CPU cache 92 * memory. 93 */ 94 #define FM_EREPORT_CPU_GENERIC_GENMEMHIER "%2$s" "cache" "%7$s" 95 #define FM_EREPORT_CPU_GENERIC_TLB "%2$s" "%1$s" "tlb" "%7$s" 96 #define FM_EREPORT_CPU_GENERIC_MEMHIER "%2$s" "%1$s" "cache" "%7$s" 97 #define FM_EREPORT_CPU_GENERIC_BUS_INTERCONNECT "bus_interconnect" "%5$s" "%7$s" 98 99 /* 100 * The "interpretation" expansions for the above ereport leaf subclasses. 101 */ 102 #define FM_EREPORT_CPU_GENERIC_TT_INSTR "i" 103 #define FM_EREPORT_CPU_GENERIC_TT_DATA "d" 104 #define FM_EREPORT_CPU_GENERIC_TT_GEN "" 105 106 #define FM_EREPORT_CPU_GENERIC_LL_L0 "l0" 107 #define FM_EREPORT_CPU_GENERIC_LL_L1 "l1" 108 #define FM_EREPORT_CPU_GENERIC_LL_L2 "l2" 109 #define FM_EREPORT_CPU_GENERIC_LL_LG "" 110 111 #define FM_EREPORT_CPU_GENERIC_RRRR_ERR "" 112 #define FM_EREPORT_CPU_GENERIC_RRRR_RD "" 113 #define FM_EREPORT_CPU_GENERIC_RRRR_WR "" 114 #define FM_EREPORT_CPU_GENERIC_RRRR_DRD "" 115 #define FM_EREPORT_CPU_GENERIC_RRRR_DWR "" 116 #define FM_EREPORT_CPU_GENERIC_RRRR_IRD "" 117 #define FM_EREPORT_CPU_GENERIC_RRRR_PREFETCH "" 118 #define FM_EREPORT_CPU_GENERIC_RRRR_EVICT "" 119 #define FM_EREPORT_CPU_GENERIC_RRRR_SNOOP "" 120 121 #define FM_EREPORT_CPU_GENERIC_PP_SRC "" 122 #define FM_EREPORT_CPU_GENERIC_PP_RES "" 123 #define FM_EREPORT_CPU_GENERIC_PP_OBS "" 124 #define FM_EREPORT_CPU_GENERIC_PP_GEN "" 125 126 #define FM_EREPORT_CPU_GENERIC_II_MEM "_memory" 127 #define FM_EREPORT_CPU_GENERIC_II_IO "_io" 128 #define FM_EREPORT_CPU_GENERIC_II_GEN "" 129 130 #define FM_EREPORT_CPU_GENERIC_T_NOTIMEOUT "" 131 #define FM_EREPORT_CPU_GENERIC_T_TIMEOUT "" 132 133 /* 134 * Ereport payload member names together with bitmask values to select 135 * their inclusion in ereports. 136 */ 137 138 #define _FM_EREPORT_FLAG(n) (1ULL << (n)) 139 140 #define FM_EREPORT_PAYLOAD_FLAG_COMPOUND_ERR _FM_EREPORT_FLAG(1) 141 #define FM_EREPORT_PAYLOAD_NAME_COMPOUND_ERR "compound_errorname" 142 143 #define FM_EREPORT_PAYLOAD_FLAG_MCG_STATUS _FM_EREPORT_FLAG(2) 144 #define FM_EREPORT_PAYLOAD_NAME_MCG_STATUS "IA32_MCG_STATUS" 145 #define FM_EREPORT_PAYLOAD_NAME_MCG_STATUS_MCIP "machine_check_in_progress" 146 147 #define FM_EREPORT_PAYLOAD_FLAG_IP _FM_EREPORT_FLAG(3) 148 #define FM_EREPORT_PAYLOAD_NAME_IP "ip" 149 150 #define FM_EREPORT_PAYLOAD_FLAG_PRIV _FM_EREPORT_FLAG(4) 151 #define FM_EREPORT_PAYLOAD_NAME_PRIV "privileged" 152 153 #define FM_EREPORT_PAYLOAD_FLAG_BANK_NUM _FM_EREPORT_FLAG(5) 154 #define FM_EREPORT_PAYLOAD_NAME_BANK_NUM "bank_number" 155 #define FM_EREPORT_PAYLOAD_NAME_BANK_MSR_OFFSET "bank_msr_offset" 156 157 #define FM_EREPORT_PAYLOAD_FLAG_MC_STATUS _FM_EREPORT_FLAG(6) 158 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS "IA32_MCi_STATUS" 159 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_OVER "overflow" 160 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_UC "error_uncorrected" 161 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_EN "error_enabled" 162 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_PCC "processor_context_corrupt" 163 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_TES "threshold_based_error_status" 164 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_ERRCODE "error_code" 165 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_EXTERRCODE "model_specific_error_code" 166 167 #define FM_EREPORT_PAYLOAD_FLAG_MC_ADDR _FM_EREPORT_FLAG(7) 168 #define FM_EREPORT_PAYLOAD_NAME_MC_ADDR "IA32_MCi_ADDR" 169 170 #define FM_EREPORT_PAYLOAD_FLAG_MC_MISC _FM_EREPORT_FLAG(8) 171 #define FM_EREPORT_PAYLOAD_NAME_MC_MISC "IA32_MCi_MISC" 172 173 #define FM_EREPORT_PAYLOAD_FLAG_DISP _FM_EREPORT_FLAG(9) 174 #define FM_EREPORT_PAYLOAD_NAME_DISP "disp" 175 176 /* 177 * Common combinations of payload members 178 */ 179 #define FM_EREPORT_PAYLOAD_FLAGS_GLOBAL \ 180 (FM_EREPORT_PAYLOAD_FLAG_MCG_STATUS | \ 181 FM_EREPORT_PAYLOAD_FLAG_IP | \ 182 FM_EREPORT_PAYLOAD_FLAG_PRIV) 183 184 #define FM_EREPORT_PAYLOAD_FLAGS_BANK \ 185 (FM_EREPORT_PAYLOAD_FLAG_BANK_NUM | \ 186 FM_EREPORT_PAYLOAD_FLAG_MC_STATUS | \ 187 FM_EREPORT_PAYLOAD_FLAG_MC_ADDR | \ 188 FM_EREPORT_PAYLOAD_FLAG_MC_MISC | \ 189 FM_EREPORT_PAYLOAD_FLAG_DISP) 190 191 #define FM_EREPORT_PAYLOAD_FLAGS_COMMON \ 192 (FM_EREPORT_PAYLOAD_FLAGS_GLOBAL | FM_EREPORT_PAYLOAD_FLAGS_BANK) 193 194 #define FM_EREPORT_PAYLOAD_FLAGS_COMPOUND_ERR \ 195 (FM_EREPORT_PAYLOAD_FLAGS_COMMON | FM_EREPORT_PAYLOAD_FLAG_COMPOUND_ERR) 196 197 #ifdef __cplusplus 198 } 199 #endif 200 201 #endif /* _SYS_FM_CPU_GMCA_H */ 202