xref: /titanic_51/usr/src/uts/intel/io/pciex/pcie_nb5000.h (revision a2de976fd11ced5331ebe7c3a8ffbaf11f5427cf)
120c794b3Sgavinm /*
220c794b3Sgavinm  * CDDL HEADER START
320c794b3Sgavinm  *
420c794b3Sgavinm  * The contents of this file are subject to the terms of the
520c794b3Sgavinm  * Common Development and Distribution License (the "License").
620c794b3Sgavinm  * You may not use this file except in compliance with the License.
720c794b3Sgavinm  *
820c794b3Sgavinm  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
920c794b3Sgavinm  * or http://www.opensolaris.org/os/licensing.
1020c794b3Sgavinm  * See the License for the specific language governing permissions
1120c794b3Sgavinm  * and limitations under the License.
1220c794b3Sgavinm  *
1320c794b3Sgavinm  * When distributing Covered Code, include this CDDL HEADER in each
1420c794b3Sgavinm  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
1520c794b3Sgavinm  * If applicable, add the following below this CDDL HEADER, with the
1620c794b3Sgavinm  * fields enclosed by brackets "[]" replaced with your own identifying
1720c794b3Sgavinm  * information: Portions Copyright [yyyy] [name of copyright owner]
1820c794b3Sgavinm  *
1920c794b3Sgavinm  * CDDL HEADER END
2020c794b3Sgavinm  */
2120c794b3Sgavinm 
2220c794b3Sgavinm /*
2313bf2934SAlan Adamson, SD OSSD  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
2420c794b3Sgavinm  * Use is subject to license terms.
2520c794b3Sgavinm  */
2620c794b3Sgavinm 
2720c794b3Sgavinm #ifndef	_PCIEX_PCI_INTEL_NB5000_H
2820c794b3Sgavinm #define	_PCIEX_PCI_INTEL_NB5000_H
2920c794b3Sgavinm 
3020c794b3Sgavinm #ifdef	__cplusplus
3120c794b3Sgavinm extern "C" {
3220c794b3Sgavinm #endif
3320c794b3Sgavinm 
3420c794b3Sgavinm #define	INTEL_VENDOR_ID	0x8086
3520c794b3Sgavinm 
365fb1ded3Ssuha #define	INTEL_NB5000_PCIE_DEV_ID(did) (((did) >= 0x3600 && (did) <= 0x360a) || \
375fb1ded3Ssuha 	((did) == 0x25d8 || (did) == 0x25d4 || (did) == 0x25c0 || \
385fb1ded3Ssuha 	(did) == 0x25d0 || ((did) >= 0x25e2 && (did) <= 0x25e7)) || \
395f28a827Saf 	((did) >= 0x25f7 && (did) <= 0x25fa) || \
405f28a827Saf 	(did) == 0x4000 || (did) == 0x4001 || (did) == 0x4003 || \
415f28a827Saf 	((did) >= 0x4021 && (did) <= 0x402e))
4220c794b3Sgavinm 
43870de8c6SAlan Adamson, SD OSSD #define	INTEL_NB5100_PCIE_DEV_ID(did) (((did) >= 0x65e2 && (did) <= 0x65e7) || \
44870de8c6SAlan Adamson, SD OSSD 	((did) >= 0x65f7 && (did) <= 0x65fa))
45870de8c6SAlan Adamson, SD OSSD 
46*a2de976fSPavel Potoplyak #define	INTEL_NB5500_PCIE_DEV_ID(did) (((did) >= 0x3408 && (did) <= 0x3411) || \
47*a2de976fSPavel Potoplyak 	(did) == 0x3420 || (did) == 0x3403)
48*a2de976fSPavel Potoplyak 
49*a2de976fSPavel Potoplyak #define	INTEL_NB5520_PCIE_DEV_ID(did) (((did) >= 0x3408 && (did) <= 0x3411) || \
50*a2de976fSPavel Potoplyak 	(did) == 0x3421 || (did) == 0x3406)
51*a2de976fSPavel Potoplyak 
523221df98SKrishna Elango #define	INTEL_ESB2_SW_PCIE_DEV_ID(did) (((did) >= 0x3500 && (did) <= 0x3503) ||\
533221df98SKrishna Elango 	((did) >= 0x3510 && (did) <= 0x351B))
5420c794b3Sgavinm 
5513bf2934SAlan Adamson, SD OSSD #define	INTEL_NB5000_PEXCTRL_OFFSET		0x48
5613bf2934SAlan Adamson, SD OSSD #define	INTEL_NB5000_PEXCTRL_COALESCE_EN	0x400
5713bf2934SAlan Adamson, SD OSSD 
5820c794b3Sgavinm #ifdef	__cplusplus
5920c794b3Sgavinm }
6020c794b3Sgavinm #endif
6120c794b3Sgavinm 
6220c794b3Sgavinm #endif	/* _PCIEX_PCI_INTEL_NB5000_H */
63