1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 #include <sys/fasttrap_isa.h> 30 #include <sys/fasttrap_impl.h> 31 #include <sys/dtrace.h> 32 #include <sys/dtrace_impl.h> 33 #include <sys/cmn_err.h> 34 #include <sys/regset.h> 35 #include <sys/privregs.h> 36 #include <sys/segments.h> 37 #include <sys/sysmacros.h> 38 #include <sys/trap.h> 39 40 /* 41 * Lossless User-Land Tracing on x86 42 * --------------------------------- 43 * 44 * Most instructions' execution is not dependent on their address; for these 45 * instrutions it is sufficient to copy them into the user process's address 46 * space and execute them. To effectively single-step an instruction in 47 * user-land, we copy out the following sequence of instructions to scratch 48 * space in the user thread's ulwp_t structure. 49 * 50 * We then set the program counter (%eip or %rip) to point to this scratch 51 * space. Once execution resumes, the original instruction is executed and 52 * then control flow is redirected to what was originally the subsequent 53 * instruction. If the kernel attemps to deliver a signal while single- 54 * stepping, the signal is deferred and the program counter is moved into the 55 * second sequence of instructions. The second sequence ends in a trap into 56 * the kernel where the deferred signal is then properly handled and delivered. 57 * 58 * For instructions whose execute is position dependent, we perform simple 59 * emulation. These instructions are limited to control transfer 60 * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle 61 * of %rip-relative addressing that means that almost any instruction can be 62 * position dependent. For all the details on how we emulate generic 63 * instructions included %rip-relative instructions, see the code in 64 * fasttrap_pid_probe() below where we handle instructions of type 65 * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing). 66 */ 67 68 #define FASTTRAP_MODRM_MOD(modrm) (((modrm) >> 6) & 0x3) 69 #define FASTTRAP_MODRM_REG(modrm) (((modrm) >> 3) & 0x7) 70 #define FASTTRAP_MODRM_RM(modrm) ((modrm) & 0x7) 71 #define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm)) 72 73 #define FASTTRAP_SIB_SCALE(sib) (((sib) >> 6) & 0x3) 74 #define FASTTRAP_SIB_INDEX(sib) (((sib) >> 3) & 0x7) 75 #define FASTTRAP_SIB_BASE(sib) ((sib) & 0x7) 76 77 #define FASTTRAP_REX_W(rex) (((rex) >> 3) & 1) 78 #define FASTTRAP_REX_R(rex) (((rex) >> 2) & 1) 79 #define FASTTRAP_REX_X(rex) (((rex) >> 1) & 1) 80 #define FASTTRAP_REX_B(rex) ((rex) & 1) 81 #define FASTTRAP_REX(w, r, x, b) \ 82 (0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b)) 83 84 /* 85 * Single-byte op-codes. 86 */ 87 #define FASTTRAP_PUSHL_EBP 0x55 88 89 #define FASTTRAP_JO 0x70 90 #define FASTTRAP_JNO 0x71 91 #define FASTTRAP_JB 0x72 92 #define FASTTRAP_JAE 0x73 93 #define FASTTRAP_JE 0x74 94 #define FASTTRAP_JNE 0x75 95 #define FASTTRAP_JBE 0x76 96 #define FASTTRAP_JA 0x77 97 #define FASTTRAP_JS 0x78 98 #define FASTTRAP_JNS 0x79 99 #define FASTTRAP_JP 0x7a 100 #define FASTTRAP_JNP 0x7b 101 #define FASTTRAP_JL 0x7c 102 #define FASTTRAP_JGE 0x7d 103 #define FASTTRAP_JLE 0x7e 104 #define FASTTRAP_JG 0x7f 105 106 #define FASTTRAP_MOV_EAX 0xb8 107 #define FASTTRAP_MOV_ECX 0xb9 108 109 #define FASTTRAP_RET16 0xc2 110 #define FASTTRAP_RET 0xc3 111 112 #define FASTTRAP_LOOPNZ 0xe0 113 #define FASTTRAP_LOOPZ 0xe1 114 #define FASTTRAP_LOOP 0xe2 115 #define FASTTRAP_JCXZ 0xe3 116 117 #define FASTTRAP_CALL 0xe8 118 #define FASTTRAP_JMP32 0xe9 119 #define FASTTRAP_JMP8 0xeb 120 121 #define FASTTRAP_INT3 0xcc 122 #define FASTTRAP_INT 0xcd 123 124 #define FASTTRAP_2_BYTE_OP 0x0f 125 #define FASTTRAP_GROUP5_OP 0xff 126 127 /* 128 * Two-byte op-codes (second byte only). 129 */ 130 #define FASTTRAP_0F_JO 0x80 131 #define FASTTRAP_0F_JNO 0x81 132 #define FASTTRAP_0F_JB 0x82 133 #define FASTTRAP_0F_JAE 0x83 134 #define FASTTRAP_0F_JE 0x84 135 #define FASTTRAP_0F_JNE 0x85 136 #define FASTTRAP_0F_JBE 0x86 137 #define FASTTRAP_0F_JA 0x87 138 #define FASTTRAP_0F_JS 0x88 139 #define FASTTRAP_0F_JNS 0x89 140 #define FASTTRAP_0F_JP 0x8a 141 #define FASTTRAP_0F_JNP 0x8b 142 #define FASTTRAP_0F_JL 0x8c 143 #define FASTTRAP_0F_JGE 0x8d 144 #define FASTTRAP_0F_JLE 0x8e 145 #define FASTTRAP_0F_JG 0x8f 146 147 #define FASTTRAP_EFLAGS_OF 0x800 148 #define FASTTRAP_EFLAGS_DF 0x400 149 #define FASTTRAP_EFLAGS_SF 0x080 150 #define FASTTRAP_EFLAGS_ZF 0x040 151 #define FASTTRAP_EFLAGS_AF 0x010 152 #define FASTTRAP_EFLAGS_PF 0x004 153 #define FASTTRAP_EFLAGS_CF 0x001 154 155 /* 156 * Instruction prefixes. 157 */ 158 #define FASTTRAP_PREFIX_OPERAND 0x66 159 #define FASTTRAP_PREFIX_ADDRESS 0x67 160 #define FASTTRAP_PREFIX_CS 0x2E 161 #define FASTTRAP_PREFIX_DS 0x3E 162 #define FASTTRAP_PREFIX_ES 0x26 163 #define FASTTRAP_PREFIX_FS 0x64 164 #define FASTTRAP_PREFIX_GS 0x65 165 #define FASTTRAP_PREFIX_SS 0x36 166 #define FASTTRAP_PREFIX_LOCK 0xF0 167 #define FASTTRAP_PREFIX_REP 0xF3 168 #define FASTTRAP_PREFIX_REPNE 0xF2 169 170 #define FASTTRAP_NOREG 0xff 171 172 /* 173 * Map between instruction register encodings and the kernel constants which 174 * correspond to indicies into struct regs. 175 */ 176 #ifdef __amd64 177 static const uint8_t regmap[16] = { 178 REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI, 179 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15, 180 }; 181 #else 182 static const uint8_t regmap[8] = { 183 EAX, ECX, EDX, EBX, UESP, EBP, ESI, EDI 184 }; 185 #endif 186 187 static ulong_t fasttrap_getreg(struct regs *, uint_t); 188 189 static uint64_t 190 fasttrap_anarg(struct regs *rp, int function_entry, int argno) 191 { 192 uint64_t value; 193 int shift = function_entry ? 1 : 0; 194 195 #ifdef __amd64 196 if (curproc->p_model == DATAMODEL_LP64) { 197 uintptr_t *stack; 198 199 /* 200 * In 64-bit mode, the first six arguments are stored in 201 * registers. 202 */ 203 if (argno < 6) 204 return ((&rp->r_rdi)[argno]); 205 206 stack = (uintptr_t *)rp->r_sp; 207 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 208 value = dtrace_fulword(&stack[argno - 6 + shift]); 209 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 210 } else { 211 #endif 212 uint32_t *stack = (uint32_t *)rp->r_sp; 213 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 214 value = dtrace_fuword32(&stack[argno + shift]); 215 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 216 #ifdef __amd64 217 } 218 #endif 219 220 return (value); 221 } 222 223 /*ARGSUSED*/ 224 int 225 fasttrap_tracepoint_init(proc_t *p, fasttrap_probe_t *probe, 226 fasttrap_tracepoint_t *tp, uintptr_t pc) 227 { 228 uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10]; 229 size_t len = FASTTRAP_MAX_INSTR_SIZE; 230 size_t first = MIN(len, PAGESIZE - (pc & PAGEOFFSET)); 231 uint_t start = 0; 232 int rmindex; 233 uint8_t rex = 0; 234 235 /* 236 * Read the instruction at the given address out of the process's 237 * address space. We don't have to worry about a debugger 238 * changing this instruction before we overwrite it with our trap 239 * instruction since P_PR_LOCK is set. Since instructions can span 240 * pages, we potentially read the instruction in two parts. If the 241 * second part fails, we just zero out that part of the instruction. 242 */ 243 if (uread(p, &instr[0], first, pc) != 0) 244 return (-1); 245 if (len > first && 246 uread(p, &instr[first], len - first, pc + first) != 0) { 247 bzero(&instr[first], len - first); 248 len = first; 249 } 250 251 /* 252 * If the disassembly fails, then we have a malformed instruction. 253 */ 254 if ((tp->ftt_size = dtrace_instr_size_isa(instr, p->p_model, 255 &rmindex)) <= 0) 256 return (-1); 257 258 /* 259 * Make sure the disassembler isn't completely broken. 260 */ 261 ASSERT(-1 <= rmindex && rmindex < tp->ftt_size); 262 263 /* 264 * If the computed size is greater than the number of bytes read, 265 * then it was a malformed instruction possibly because it fell on a 266 * page boundary and the subsequent page was missing or because of 267 * some malicious user. 268 */ 269 if (tp->ftt_size > len) 270 return (-1); 271 272 /* 273 * Find the start of the instruction's opcode by processing any 274 * legacy prefixes. 275 */ 276 for (;;) { 277 switch (instr[start]) { 278 case FASTTRAP_PREFIX_OPERAND: 279 case FASTTRAP_PREFIX_ADDRESS: 280 case FASTTRAP_PREFIX_CS: 281 case FASTTRAP_PREFIX_DS: 282 case FASTTRAP_PREFIX_ES: 283 case FASTTRAP_PREFIX_FS: 284 case FASTTRAP_PREFIX_GS: 285 case FASTTRAP_PREFIX_SS: 286 case FASTTRAP_PREFIX_LOCK: 287 case FASTTRAP_PREFIX_REP: 288 case FASTTRAP_PREFIX_REPNE: 289 start++; 290 continue; 291 } 292 break; 293 } 294 295 #ifdef __amd64 296 /* 297 * Identify the REX prefix on 64-bit processes. 298 */ 299 if (p->p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40) 300 rex = instr[start++]; 301 #endif 302 303 /* 304 * Now that we're pretty sure that the instruction is okay, copy the 305 * valid part to the tracepoint. 306 */ 307 bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE); 308 309 tp->ftt_type = FASTTRAP_T_COMMON; 310 if (instr[start] == FASTTRAP_2_BYTE_OP) { 311 switch (instr[start + 1]) { 312 case FASTTRAP_0F_JO: 313 case FASTTRAP_0F_JNO: 314 case FASTTRAP_0F_JB: 315 case FASTTRAP_0F_JAE: 316 case FASTTRAP_0F_JE: 317 case FASTTRAP_0F_JNE: 318 case FASTTRAP_0F_JBE: 319 case FASTTRAP_0F_JA: 320 case FASTTRAP_0F_JS: 321 case FASTTRAP_0F_JNS: 322 case FASTTRAP_0F_JP: 323 case FASTTRAP_0F_JNP: 324 case FASTTRAP_0F_JL: 325 case FASTTRAP_0F_JGE: 326 case FASTTRAP_0F_JLE: 327 case FASTTRAP_0F_JG: 328 tp->ftt_type = FASTTRAP_T_JCC; 329 tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO; 330 tp->ftt_dest = pc + tp->ftt_size + 331 *(int32_t *)&instr[start + 2]; 332 break; 333 } 334 } else if (instr[start] == FASTTRAP_GROUP5_OP) { 335 uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]); 336 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]); 337 uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]); 338 339 if (reg == 2 || reg == 4) { 340 uint_t i, sz; 341 342 if (reg == 2) 343 tp->ftt_type = FASTTRAP_T_CALL; 344 else 345 tp->ftt_type = FASTTRAP_T_JMP; 346 347 if (mod == 3) 348 tp->ftt_code = 2; 349 else 350 tp->ftt_code = 1; 351 352 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0); 353 354 /* 355 * See AMD x86-64 Architecture Programmer's Manual 356 * Volume 3, Section 1.2.7, Table 1-12, and 357 * Appendix A.3.1, Table A-15. 358 */ 359 if (mod != 3 && rm == 4) { 360 uint8_t sib = instr[start + 2]; 361 uint_t index = FASTTRAP_SIB_INDEX(sib); 362 uint_t base = FASTTRAP_SIB_BASE(sib); 363 364 tp->ftt_scale = FASTTRAP_SIB_SCALE(sib); 365 366 tp->ftt_index = (index == 4) ? 367 FASTTRAP_NOREG : 368 regmap[index | (FASTTRAP_REX_X(rex) << 3)]; 369 tp->ftt_base = (mod == 0 && base == 5) ? 370 FASTTRAP_NOREG : 371 regmap[base | (FASTTRAP_REX_B(rex) << 3)]; 372 373 i = 3; 374 sz = mod == 1 ? 1 : 4; 375 } else { 376 /* 377 * In 64-bit mode, mod == 0 and r/m == 5 378 * denotes %rip-relative addressing; in 32-bit 379 * mode, the base register isn't used. In both 380 * modes, there is a 32-bit operand. 381 */ 382 if (mod == 0 && rm == 5) { 383 #ifdef __amd64 384 if (p->p_model == DATAMODEL_LP64) 385 tp->ftt_base = REG_RIP; 386 else 387 #endif 388 tp->ftt_base = FASTTRAP_NOREG; 389 sz = 4; 390 } else { 391 uint8_t base = rm | 392 (FASTTRAP_REX_B(rex) << 3); 393 394 tp->ftt_base = regmap[base]; 395 sz = mod == 1 ? 1 : mod == 2 ? 4 : 0; 396 } 397 tp->ftt_index = FASTTRAP_NOREG; 398 i = 2; 399 } 400 401 if (sz == 1) 402 tp->ftt_dest = *(int8_t *)&instr[start + i]; 403 else if (sz == 4) 404 tp->ftt_dest = *(int32_t *)&instr[start + i]; 405 else 406 tp->ftt_dest = 0; 407 } 408 } else { 409 switch (instr[start]) { 410 case FASTTRAP_RET: 411 tp->ftt_type = FASTTRAP_T_RET; 412 break; 413 414 case FASTTRAP_RET16: 415 tp->ftt_type = FASTTRAP_T_RET16; 416 tp->ftt_dest = *(uint16_t *)&instr[start + 1]; 417 break; 418 419 case FASTTRAP_JO: 420 case FASTTRAP_JNO: 421 case FASTTRAP_JB: 422 case FASTTRAP_JAE: 423 case FASTTRAP_JE: 424 case FASTTRAP_JNE: 425 case FASTTRAP_JBE: 426 case FASTTRAP_JA: 427 case FASTTRAP_JS: 428 case FASTTRAP_JNS: 429 case FASTTRAP_JP: 430 case FASTTRAP_JNP: 431 case FASTTRAP_JL: 432 case FASTTRAP_JGE: 433 case FASTTRAP_JLE: 434 case FASTTRAP_JG: 435 tp->ftt_type = FASTTRAP_T_JCC; 436 tp->ftt_code = instr[start]; 437 tp->ftt_dest = pc + tp->ftt_size + 438 (int8_t)instr[start + 1]; 439 break; 440 441 case FASTTRAP_LOOPNZ: 442 case FASTTRAP_LOOPZ: 443 case FASTTRAP_LOOP: 444 tp->ftt_type = FASTTRAP_T_LOOP; 445 tp->ftt_code = instr[start]; 446 tp->ftt_dest = pc + tp->ftt_size + 447 (int8_t)instr[start + 1]; 448 break; 449 450 case FASTTRAP_JCXZ: 451 tp->ftt_type = FASTTRAP_T_JCXZ; 452 tp->ftt_dest = pc + tp->ftt_size + 453 (int8_t)instr[start + 1]; 454 break; 455 456 case FASTTRAP_CALL: 457 tp->ftt_type = FASTTRAP_T_CALL; 458 tp->ftt_dest = pc + tp->ftt_size + 459 *(int32_t *)&instr[start + 1]; 460 tp->ftt_code = 0; 461 break; 462 463 case FASTTRAP_JMP32: 464 tp->ftt_type = FASTTRAP_T_JMP; 465 tp->ftt_dest = pc + tp->ftt_size + 466 *(int32_t *)&instr[start + 1]; 467 break; 468 case FASTTRAP_JMP8: 469 tp->ftt_type = FASTTRAP_T_JMP; 470 tp->ftt_dest = pc + tp->ftt_size + 471 (int8_t)instr[start + 1]; 472 break; 473 474 case FASTTRAP_PUSHL_EBP: 475 if (start == 0) 476 tp->ftt_type = FASTTRAP_T_PUSHL_EBP; 477 break; 478 479 case FASTTRAP_INT3: 480 /* 481 * The pid provider shares the int3 trap with debugger 482 * breakpoints so we can't instrument them. 483 */ 484 ASSERT(instr[start] == FASTTRAP_INSTR); 485 return (-1); 486 } 487 } 488 489 #ifdef __amd64 490 if (p->p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) { 491 /* 492 * If the process is 64-bit and the instruction type is still 493 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an 494 * execute it -- we need to watch for %rip-relative 495 * addressing mode. See the portion of fasttrap_pid_probe() 496 * below where we handle tracepoints with type 497 * FASTTRAP_T_COMMON for how we emulate instructions that 498 * employ %rip-relative addressing. 499 */ 500 if (rmindex != -1) { 501 uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]); 502 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]); 503 uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]); 504 505 ASSERT(rmindex > start); 506 507 if (mod == 0 && rm == 5) { 508 /* 509 * We need to be sure to avoid other 510 * registers used by this instruction. While 511 * the reg field may determine the op code 512 * rather than denoting a register, assuming 513 * that it denotes a register is always safe. 514 * We leave the REX field intact and use 515 * whatever value's there for simplicity. 516 */ 517 if (reg != 0) { 518 tp->ftt_ripmode = FASTTRAP_RIP_1 | 519 (FASTTRAP_RIP_X * 520 FASTTRAP_REX_B(rex)); 521 rm = 0; 522 } else { 523 tp->ftt_ripmode = FASTTRAP_RIP_2 | 524 (FASTTRAP_RIP_X * 525 FASTTRAP_REX_B(rex)); 526 rm = 1; 527 } 528 529 tp->ftt_modrm = tp->ftt_instr[rmindex]; 530 tp->ftt_instr[rmindex] = 531 FASTTRAP_MODRM(2, reg, rm); 532 } 533 } 534 } 535 #endif 536 537 return (0); 538 } 539 540 int 541 fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp) 542 { 543 fasttrap_instr_t instr = FASTTRAP_INSTR; 544 545 if (uwrite(p, &instr, 1, tp->ftt_pc) != 0) 546 return (-1); 547 548 return (0); 549 } 550 551 int 552 fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp) 553 { 554 uint8_t instr; 555 556 /* 557 * Distinguish between read or write failures and a changed 558 * instruction. 559 */ 560 if (uread(p, &instr, 1, tp->ftt_pc) != 0) 561 return (0); 562 if (instr != FASTTRAP_INSTR) 563 return (0); 564 if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0) 565 return (-1); 566 567 return (0); 568 } 569 570 static uintptr_t 571 fasttrap_fulword_noerr(const void *uaddr) 572 { 573 uintptr_t ret; 574 575 if (fasttrap_fulword(uaddr, &ret) == 0) 576 return (ret); 577 578 return (0); 579 } 580 581 static uint32_t 582 fasttrap_fuword32_noerr(const void *uaddr) 583 { 584 uint32_t ret; 585 586 if (fasttrap_fuword32(uaddr, &ret) == 0) 587 return (ret); 588 589 return (0); 590 } 591 592 /*ARGSUSED*/ 593 int 594 fasttrap_probe(struct regs *rp) 595 { 596 #ifdef __amd64 597 proc_t *p = curproc; 598 #endif 599 600 #ifdef __amd64 601 if (p->p_model == DATAMODEL_LP64) { 602 dtrace_probe(fasttrap_probe_id, rp->r_rdi, rp->r_rsi, 603 rp->r_rdx, rp->r_rcx, rp->r_r8); 604 } else { 605 #endif 606 uint32_t *stack = (uint32_t *)rp->r_sp; 607 uintptr_t s0, s1, s2, s3, s4; 608 609 s0 = fasttrap_fuword32_noerr(&stack[1]); 610 s1 = fasttrap_fuword32_noerr(&stack[2]); 611 s2 = fasttrap_fuword32_noerr(&stack[3]); 612 s3 = fasttrap_fuword32_noerr(&stack[4]); 613 s4 = fasttrap_fuword32_noerr(&stack[5]); 614 615 dtrace_probe(fasttrap_probe_id, s0, s1, s2, s3, s4); 616 #ifdef __amd64 617 } 618 #endif 619 620 return (0); 621 } 622 623 static void 624 fasttrap_return_common(struct regs *rp, uintptr_t pc, pid_t pid, 625 uintptr_t new_pc) 626 { 627 fasttrap_tracepoint_t *tp; 628 fasttrap_bucket_t *bucket; 629 fasttrap_id_t *id; 630 kmutex_t *pid_mtx; 631 632 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 633 mutex_enter(pid_mtx); 634 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 635 636 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 637 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 638 !tp->ftt_prov->ftp_defunct) 639 break; 640 } 641 642 /* 643 * Don't sweat it if we can't find the tracepoint again; unlike 644 * when we're in fasttrap_pid_probe(), finding the tracepoint here 645 * is not essential to the correct execution of the process. 646 */ 647 if (tp == NULL) { 648 mutex_exit(pid_mtx); 649 return; 650 } 651 652 for (id = tp->ftt_retids; id != NULL; id = id->fti_next) { 653 /* 654 * If there's a branch that could act as a return site, we 655 * need to trace it, and check here if the program counter is 656 * external to the function. 657 */ 658 if (tp->ftt_type != FASTTRAP_T_RET && 659 tp->ftt_type != FASTTRAP_T_RET16 && 660 new_pc - id->fti_probe->ftp_faddr < 661 id->fti_probe->ftp_fsize) 662 continue; 663 664 dtrace_probe(id->fti_probe->ftp_id, 665 pc - id->fti_probe->ftp_faddr, 666 rp->r_r0, rp->r_r1, 0, 0); 667 } 668 669 mutex_exit(pid_mtx); 670 } 671 672 static void 673 fasttrap_sigsegv(proc_t *p, kthread_t *t, uintptr_t addr) 674 { 675 sigqueue_t *sqp = kmem_zalloc(sizeof (sigqueue_t), KM_SLEEP); 676 677 sqp->sq_info.si_signo = SIGSEGV; 678 sqp->sq_info.si_code = SEGV_MAPERR; 679 sqp->sq_info.si_addr = (caddr_t)addr; 680 681 mutex_enter(&p->p_lock); 682 sigaddqa(p, t, sqp); 683 mutex_exit(&p->p_lock); 684 685 if (t != NULL) 686 aston(t); 687 } 688 689 #ifdef __amd64 690 static void 691 fasttrap_usdt_args64(fasttrap_probe_t *probe, struct regs *rp, int argc, 692 uintptr_t *argv) 693 { 694 int i, x, cap = MIN(argc, probe->ftp_nargs); 695 uintptr_t *stack = (uintptr_t *)rp->r_sp; 696 697 for (i = 0; i < cap; i++) { 698 x = probe->ftp_argmap[i]; 699 700 if (x < 6) 701 argv[i] = (&rp->r_rdi)[x]; 702 else 703 argv[i] = fasttrap_fulword_noerr(&stack[x]); 704 } 705 706 for (; i < argc; i++) { 707 argv[i] = 0; 708 } 709 } 710 #endif 711 712 static void 713 fasttrap_usdt_args32(fasttrap_probe_t *probe, struct regs *rp, int argc, 714 uint32_t *argv) 715 { 716 int i, x, cap = MIN(argc, probe->ftp_nargs); 717 uint32_t *stack = (uint32_t *)rp->r_sp; 718 719 for (i = 0; i < cap; i++) { 720 x = probe->ftp_argmap[i]; 721 722 argv[i] = fasttrap_fuword32_noerr(&stack[x]); 723 } 724 725 for (; i < argc; i++) { 726 argv[i] = 0; 727 } 728 } 729 730 int 731 fasttrap_pid_probe(struct regs *rp) 732 { 733 proc_t *p = curproc; 734 uintptr_t pc = rp->r_pc - 1, new_pc = 0; 735 fasttrap_bucket_t *bucket; 736 kmutex_t *pid_mtx; 737 fasttrap_tracepoint_t *tp, tp_local; 738 pid_t pid; 739 dtrace_icookie_t cookie; 740 741 /* 742 * It's possible that a user (in a veritable orgy of bad planning) 743 * could redirect this thread's flow of control before it reached the 744 * return probe fasttrap. In this case we need to kill the process 745 * since it's in a unrecoverable state. 746 */ 747 if (curthread->t_dtrace_step) { 748 ASSERT(curthread->t_dtrace_on); 749 fasttrap_sigtrap(p, curthread, pc); 750 return (0); 751 } 752 753 /* 754 * Clear all user tracing flags. 755 */ 756 curthread->t_dtrace_ft = 0; 757 curthread->t_dtrace_pc = 0; 758 curthread->t_dtrace_npc = 0; 759 curthread->t_dtrace_scrpc = 0; 760 curthread->t_dtrace_astpc = 0; 761 #ifdef __amd64 762 curthread->t_dtrace_regv = 0; 763 #endif 764 765 /* 766 * Treat a child created by a call to vfork(2) as if it were its 767 * parent. We know that there's only one thread of control in such a 768 * process: this one. 769 */ 770 while (p->p_flag & SVFORK) { 771 p = p->p_parent; 772 } 773 774 pid = p->p_pid; 775 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 776 mutex_enter(pid_mtx); 777 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 778 779 /* 780 * Lookup the tracepoint that the process just hit. 781 */ 782 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 783 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 784 !tp->ftt_prov->ftp_defunct) 785 break; 786 } 787 788 /* 789 * If we couldn't find a matching tracepoint, either a tracepoint has 790 * been inserted without using the pid<pid> ioctl interface (see 791 * fasttrap_ioctl), or somehow we have mislaid this tracepoint. 792 */ 793 if (tp == NULL) { 794 mutex_exit(pid_mtx); 795 return (-1); 796 } 797 798 /* 799 * Set the program counter to the address of the traced instruction 800 * so that it looks right in ustack() output. 801 */ 802 rp->r_pc = pc; 803 804 if (tp->ftt_ids != NULL) { 805 fasttrap_id_t *id; 806 807 #ifdef __amd64 808 if (p->p_model == DATAMODEL_LP64) { 809 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 810 fasttrap_probe_t *probe = id->fti_probe; 811 812 if (probe->ftp_type == DTFTP_ENTRY) { 813 /* 814 * We note that this was an entry 815 * probe to help ustack() find the 816 * first caller. 817 */ 818 cookie = dtrace_interrupt_disable(); 819 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 820 dtrace_probe(probe->ftp_id, rp->r_rdi, 821 rp->r_rsi, rp->r_rdx, rp->r_rcx, 822 rp->r_r8); 823 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 824 dtrace_interrupt_enable(cookie); 825 } else if (probe->ftp_argmap == NULL) { 826 dtrace_probe(probe->ftp_id, rp->r_rdi, 827 rp->r_rsi, rp->r_rdx, rp->r_rcx, 828 rp->r_r8); 829 } else { 830 uintptr_t t[5]; 831 832 fasttrap_usdt_args64(probe, rp, 833 sizeof (t) / sizeof (t[0]), t); 834 835 dtrace_probe(probe->ftp_id, t[0], t[1], 836 t[2], t[3], t[4]); 837 } 838 } 839 } else { 840 #endif 841 uintptr_t s0, s1, s2, s3, s4, s5; 842 uint32_t *stack = (uint32_t *)rp->r_sp; 843 844 /* 845 * In 32-bit mode, all arguments are passed on the 846 * stack. If this is a function entry probe, we need 847 * to skip the first entry on the stack as it 848 * represents the return address rather than a 849 * parameter to the function. 850 */ 851 s0 = fasttrap_fuword32_noerr(&stack[0]); 852 s1 = fasttrap_fuword32_noerr(&stack[1]); 853 s2 = fasttrap_fuword32_noerr(&stack[2]); 854 s3 = fasttrap_fuword32_noerr(&stack[3]); 855 s4 = fasttrap_fuword32_noerr(&stack[4]); 856 s5 = fasttrap_fuword32_noerr(&stack[5]); 857 858 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 859 fasttrap_probe_t *probe = id->fti_probe; 860 861 if (probe->ftp_type == DTFTP_ENTRY) { 862 /* 863 * We note that this was an entry 864 * probe to help ustack() find the 865 * first caller. 866 */ 867 cookie = dtrace_interrupt_disable(); 868 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 869 dtrace_probe(probe->ftp_id, s1, s2, 870 s3, s4, s5); 871 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 872 dtrace_interrupt_enable(cookie); 873 } else if (probe->ftp_argmap == NULL) { 874 dtrace_probe(probe->ftp_id, s0, s1, 875 s2, s3, s4); 876 } else { 877 uint32_t t[5]; 878 879 fasttrap_usdt_args32(probe, rp, 880 sizeof (t) / sizeof (t[0]), t); 881 882 dtrace_probe(probe->ftp_id, t[0], t[1], 883 t[2], t[3], t[4]); 884 } 885 } 886 #ifdef __amd64 887 } 888 #endif 889 } 890 891 /* 892 * We're about to do a bunch of work so we cache a local copy of 893 * the tracepoint to emulate the instruction, and then find the 894 * tracepoint again later if we need to light up any return probes. 895 */ 896 tp_local = *tp; 897 mutex_exit(pid_mtx); 898 tp = &tp_local; 899 900 /* 901 * Set the program counter to appear as though the traced instruction 902 * had completely executed. This ensures that fasttrap_getreg() will 903 * report the expected value for REG_RIP. 904 */ 905 rp->r_pc = pc + tp->ftt_size; 906 907 switch (tp->ftt_type) { 908 case FASTTRAP_T_RET: 909 case FASTTRAP_T_RET16: 910 { 911 uintptr_t dst; 912 uintptr_t addr; 913 int ret; 914 915 /* 916 * We have to emulate _every_ facet of the behavior of a ret 917 * instruction including what happens if the load from %esp 918 * fails; in that case, we send a SIGSEGV. 919 */ 920 #ifdef __amd64 921 if (p->p_model == DATAMODEL_NATIVE) { 922 #endif 923 ret = fasttrap_fulword((void *)rp->r_sp, &dst); 924 addr = rp->r_sp + sizeof (uintptr_t); 925 #ifdef __amd64 926 } else { 927 uint32_t dst32; 928 ret = fasttrap_fuword32((void *)rp->r_sp, &dst32); 929 dst = dst32; 930 addr = rp->r_sp + sizeof (uint32_t); 931 } 932 #endif 933 934 if (ret == -1) { 935 fasttrap_sigsegv(p, curthread, rp->r_sp); 936 new_pc = pc; 937 break; 938 } 939 940 if (tp->ftt_type == FASTTRAP_T_RET16) 941 addr += tp->ftt_dest; 942 943 rp->r_sp = addr; 944 new_pc = dst; 945 break; 946 } 947 948 case FASTTRAP_T_JCC: 949 { 950 uint_t taken; 951 952 switch (tp->ftt_code) { 953 case FASTTRAP_JO: 954 taken = (rp->r_ps & FASTTRAP_EFLAGS_OF) != 0; 955 break; 956 case FASTTRAP_JNO: 957 taken = (rp->r_ps & FASTTRAP_EFLAGS_OF) == 0; 958 break; 959 case FASTTRAP_JB: 960 taken = (rp->r_ps & FASTTRAP_EFLAGS_CF) != 0; 961 break; 962 case FASTTRAP_JAE: 963 taken = (rp->r_ps & FASTTRAP_EFLAGS_CF) == 0; 964 break; 965 case FASTTRAP_JE: 966 taken = (rp->r_ps & FASTTRAP_EFLAGS_ZF) != 0; 967 break; 968 case FASTTRAP_JNE: 969 taken = (rp->r_ps & FASTTRAP_EFLAGS_ZF) == 0; 970 break; 971 case FASTTRAP_JBE: 972 taken = (rp->r_ps & FASTTRAP_EFLAGS_CF) != 0 || 973 (rp->r_ps & FASTTRAP_EFLAGS_ZF) != 0; 974 break; 975 case FASTTRAP_JA: 976 taken = (rp->r_ps & FASTTRAP_EFLAGS_CF) == 0 && 977 (rp->r_ps & FASTTRAP_EFLAGS_ZF) == 0; 978 break; 979 case FASTTRAP_JS: 980 taken = (rp->r_ps & FASTTRAP_EFLAGS_SF) != 0; 981 break; 982 case FASTTRAP_JNS: 983 taken = (rp->r_ps & FASTTRAP_EFLAGS_SF) == 0; 984 break; 985 case FASTTRAP_JP: 986 taken = (rp->r_ps & FASTTRAP_EFLAGS_PF) != 0; 987 break; 988 case FASTTRAP_JNP: 989 taken = (rp->r_ps & FASTTRAP_EFLAGS_PF) == 0; 990 break; 991 case FASTTRAP_JL: 992 taken = ((rp->r_ps & FASTTRAP_EFLAGS_SF) == 0) != 993 ((rp->r_ps & FASTTRAP_EFLAGS_OF) == 0); 994 break; 995 case FASTTRAP_JGE: 996 taken = ((rp->r_ps & FASTTRAP_EFLAGS_SF) == 0) == 997 ((rp->r_ps & FASTTRAP_EFLAGS_OF) == 0); 998 break; 999 case FASTTRAP_JLE: 1000 taken = (rp->r_ps & FASTTRAP_EFLAGS_ZF) != 0 || 1001 ((rp->r_ps & FASTTRAP_EFLAGS_SF) == 0) != 1002 ((rp->r_ps & FASTTRAP_EFLAGS_OF) == 0); 1003 break; 1004 case FASTTRAP_JG: 1005 taken = (rp->r_ps & FASTTRAP_EFLAGS_ZF) == 0 && 1006 ((rp->r_ps & FASTTRAP_EFLAGS_SF) == 0) == 1007 ((rp->r_ps & FASTTRAP_EFLAGS_OF) == 0); 1008 break; 1009 1010 } 1011 1012 if (taken) 1013 new_pc = tp->ftt_dest; 1014 else 1015 new_pc = pc + tp->ftt_size; 1016 break; 1017 } 1018 1019 case FASTTRAP_T_LOOP: 1020 { 1021 uint_t taken; 1022 #ifdef __amd64 1023 greg_t cx = rp->r_rcx--; 1024 #else 1025 greg_t cx = rp->r_ecx--; 1026 #endif 1027 1028 switch (tp->ftt_code) { 1029 case FASTTRAP_LOOPNZ: 1030 taken = (rp->r_ps & FASTTRAP_EFLAGS_ZF) == 0 && 1031 cx != 0; 1032 break; 1033 case FASTTRAP_LOOPZ: 1034 taken = (rp->r_ps & FASTTRAP_EFLAGS_ZF) != 0 && 1035 cx != 0; 1036 break; 1037 case FASTTRAP_LOOP: 1038 taken = (cx != 0); 1039 break; 1040 } 1041 1042 if (taken) 1043 new_pc = tp->ftt_dest; 1044 else 1045 new_pc = pc + tp->ftt_size; 1046 break; 1047 } 1048 1049 case FASTTRAP_T_JCXZ: 1050 { 1051 #ifdef __amd64 1052 greg_t cx = rp->r_rcx; 1053 #else 1054 greg_t cx = rp->r_ecx; 1055 #endif 1056 1057 if (cx == 0) 1058 new_pc = tp->ftt_dest; 1059 else 1060 new_pc = pc + tp->ftt_size; 1061 break; 1062 } 1063 1064 case FASTTRAP_T_PUSHL_EBP: 1065 { 1066 int ret; 1067 uintptr_t addr; 1068 #ifdef __amd64 1069 if (p->p_model == DATAMODEL_NATIVE) { 1070 #endif 1071 addr = rp->r_sp - sizeof (uintptr_t); 1072 ret = fasttrap_sulword((void *)addr, rp->r_fp); 1073 #ifdef __amd64 1074 } else { 1075 addr = rp->r_sp - sizeof (uint32_t); 1076 ret = fasttrap_suword32((void *)addr, 1077 (uint32_t)rp->r_fp); 1078 } 1079 #endif 1080 1081 if (ret == -1) { 1082 fasttrap_sigsegv(p, curthread, addr); 1083 new_pc = pc; 1084 break; 1085 } 1086 1087 rp->r_sp = addr; 1088 new_pc = pc + tp->ftt_size; 1089 break; 1090 } 1091 1092 case FASTTRAP_T_JMP: 1093 case FASTTRAP_T_CALL: 1094 if (tp->ftt_code == 0) { 1095 new_pc = tp->ftt_dest; 1096 } else { 1097 uintptr_t addr = tp->ftt_dest; 1098 1099 if (tp->ftt_base != FASTTRAP_NOREG) 1100 addr += fasttrap_getreg(rp, tp->ftt_base); 1101 if (tp->ftt_index != FASTTRAP_NOREG) 1102 addr += fasttrap_getreg(rp, tp->ftt_index) << 1103 tp->ftt_scale; 1104 1105 if (tp->ftt_code == 1) { 1106 #ifdef __amd64 1107 if (p->p_model == DATAMODEL_NATIVE) { 1108 #endif 1109 uintptr_t value; 1110 if (fasttrap_fulword((void *)addr, 1111 &value) == -1) { 1112 fasttrap_sigsegv(p, curthread, 1113 addr); 1114 new_pc = pc; 1115 break; 1116 } 1117 new_pc = value; 1118 #ifdef __amd64 1119 } else { 1120 uint32_t value; 1121 if (fasttrap_fuword32((void *)addr, 1122 &value) == -1) { 1123 fasttrap_sigsegv(p, curthread, 1124 addr); 1125 new_pc = pc; 1126 break; 1127 } 1128 new_pc = value; 1129 } 1130 #endif 1131 } else { 1132 new_pc = addr; 1133 } 1134 } 1135 1136 /* 1137 * If this is a call instruction, we need to push the return 1138 * address onto the stack. If this fails, we send the process 1139 * a SIGSEGV and reset the pc to emulate what would happen if 1140 * this instruction weren't traced. 1141 */ 1142 if (tp->ftt_type == FASTTRAP_T_CALL) { 1143 int ret; 1144 uintptr_t addr; 1145 #ifdef __amd64 1146 if (p->p_model == DATAMODEL_NATIVE) { 1147 addr = rp->r_sp - sizeof (uintptr_t); 1148 ret = fasttrap_sulword((void *)addr, 1149 pc + tp->ftt_size); 1150 } else { 1151 #endif 1152 addr = rp->r_sp - sizeof (uint32_t); 1153 ret = fasttrap_suword32((void *)addr, 1154 (uint32_t)(pc + tp->ftt_size)); 1155 #ifdef __amd64 1156 } 1157 #endif 1158 1159 if (ret == -1) { 1160 fasttrap_sigsegv(p, curthread, addr); 1161 new_pc = pc; 1162 break; 1163 } 1164 1165 rp->r_sp = addr; 1166 } 1167 1168 break; 1169 1170 case FASTTRAP_T_COMMON: 1171 { 1172 uintptr_t addr; 1173 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 5 + 2]; 1174 uint_t i = 0; 1175 klwp_t *lwp = ttolwp(curthread); 1176 1177 /* 1178 * Compute the address of the ulwp_t and step over the 1179 * ul_self pointer. The method used to store the user-land 1180 * thread pointer is very different on 32- and 64-bit 1181 * kernels. 1182 */ 1183 #if defined(__amd64) 1184 if (p->p_model == DATAMODEL_LP64) { 1185 addr = lwp->lwp_pcb.pcb_fsbase; 1186 addr += sizeof (void *); 1187 } else { 1188 addr = lwp->lwp_pcb.pcb_gsbase; 1189 addr += sizeof (caddr32_t); 1190 } 1191 #elif defined(__i386) 1192 addr = USEGD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc); 1193 addr += sizeof (void *); 1194 #endif 1195 1196 /* 1197 * Generic Instruction Tracing 1198 * --------------------------- 1199 * 1200 * This is the layout of the scratch space in the user-land 1201 * thread structure for our generated instructions. 1202 * 1203 * 32-bit mode bytes 1204 * ------------------------ ----- 1205 * a: <original instruction> <= 15 1206 * jmp <pc + tp->ftt_size> 5 1207 * b: <original instrction> <= 15 1208 * int T_DTRACE_RET 2 1209 * ----- 1210 * <= 37 1211 * 1212 * 64-bit mode bytes 1213 * ------------------------ ----- 1214 * a: <original instruction> <= 15 1215 * jmp 0(%rip) 6 1216 * <pc + tp->ftt_size> 8 1217 * b: <original instruction> <= 15 1218 * int T_DTRACE_RET 2 1219 * ----- 1220 * <= 46 1221 * 1222 * The %pc is set to a, and curthread->t_dtrace_astpc is set 1223 * to b. If we encounter a signal on the way out of the 1224 * kernel, trap() will set %pc to curthread->t_dtrace_astpc 1225 * so that we execute the original instruction and re-enter 1226 * the kernel rather than redirecting to the next instruction. 1227 * 1228 * If there are return probes (so we know that we're going to 1229 * need to reenter the kernel after executing the original 1230 * instruction), the scratch space will just contain the 1231 * original instruction followed by an interrupt -- the same 1232 * data as at b. 1233 * 1234 * %rip-relative Addressing 1235 * ------------------------ 1236 * 1237 * There's a further complication in 64-bit mode due to %rip- 1238 * relative addressing. While this is clearly a beneficial 1239 * architectural decision for position independent code, it's 1240 * hard not to see it as a personal attack against the pid 1241 * provider since before there was a relatively small set of 1242 * instructions to emulate; with %rip-relative addressing, 1243 * almost every instruction can potentially depend on the 1244 * address at which it's executed. Rather than emulating 1245 * the broad spectrum of instructions that can now be 1246 * position dependent, we emulate jumps and others as in 1247 * 32-bit mode, and take a different tack for instructions 1248 * using %rip-relative addressing. 1249 * 1250 * For every instruction that uses the ModRM byte, the 1251 * in-kernel disassembler reports its location. We use the 1252 * ModRM byte to identify that an instruction uses 1253 * %rip-relative addressing and to see what other registers 1254 * the instruction uses. To emulate those instructions, 1255 * we modify the instruction to be %rax-relative rather than 1256 * %rip-relative (or %rcx-relative if the instruction uses 1257 * %rax; or %r8- or %r9-relative if the REX.B is present so 1258 * we don't have to rewrite the REX prefix). We then load 1259 * the value that %rip would have been into the scratch 1260 * register and generate an instruction to reset the scratch 1261 * register back to its original value. The instruction 1262 * sequence looks like this: 1263 * 1264 * 64-mode %rip-relative bytes 1265 * ------------------------ ----- 1266 * a: <modified instruction> <= 15 1267 * movq $<value>, %<scratch> 6 1268 * jmp 0(%rip) 6 1269 * <pc + tp->ftt_size> 8 1270 * b: <modified instruction> <= 15 1271 * int T_DTRACE_RET 2 1272 * ----- 1273 * 52 1274 * 1275 * We set curthread->t_dtrace_regv so that upon receiving 1276 * a signal we can reset the value of the scratch register. 1277 */ 1278 1279 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE); 1280 1281 curthread->t_dtrace_scrpc = addr; 1282 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1283 i += tp->ftt_size; 1284 1285 #ifdef __amd64 1286 if (tp->ftt_ripmode != 0) { 1287 greg_t *reg; 1288 1289 ASSERT(p->p_model == DATAMODEL_LP64); 1290 ASSERT(tp->ftt_ripmode & 1291 (FASTTRAP_RIP_1 | FASTTRAP_RIP_2)); 1292 1293 /* 1294 * If this was a %rip-relative instruction, we change 1295 * it to be either a %rax- or %rcx-relative 1296 * instruction (depending on whether those registers 1297 * are used as another operand; or %r8- or %r9- 1298 * relative depending on the value of REX.B). We then 1299 * set that register and generate a movq instruction 1300 * to reset the value. 1301 */ 1302 if (tp->ftt_ripmode & FASTTRAP_RIP_X) 1303 scratch[i++] = FASTTRAP_REX(1, 0, 0, 1); 1304 else 1305 scratch[i++] = FASTTRAP_REX(1, 0, 0, 0); 1306 1307 if (tp->ftt_ripmode & FASTTRAP_RIP_1) 1308 scratch[i++] = FASTTRAP_MOV_EAX; 1309 else 1310 scratch[i++] = FASTTRAP_MOV_ECX; 1311 1312 switch (tp->ftt_ripmode) { 1313 case FASTTRAP_RIP_1: 1314 reg = &rp->r_rax; 1315 curthread->t_dtrace_reg = REG_RAX; 1316 break; 1317 case FASTTRAP_RIP_2: 1318 reg = &rp->r_rcx; 1319 curthread->t_dtrace_reg = REG_RCX; 1320 break; 1321 case FASTTRAP_RIP_1 | FASTTRAP_RIP_X: 1322 reg = &rp->r_r8; 1323 curthread->t_dtrace_reg = REG_R8; 1324 break; 1325 case FASTTRAP_RIP_2 | FASTTRAP_RIP_X: 1326 reg = &rp->r_r9; 1327 curthread->t_dtrace_reg = REG_R9; 1328 break; 1329 } 1330 1331 *(uint64_t *)&scratch[i] = *reg; 1332 curthread->t_dtrace_regv = *reg; 1333 *reg = pc + tp->ftt_size; 1334 i += sizeof (uint64_t); 1335 } 1336 #endif 1337 1338 /* 1339 * Generate the branch instruction to what would have 1340 * normally been the subsequent instruction. In 32-bit mode, 1341 * this is just a relative branch; in 64-bit mode this is a 1342 * %rip-relative branch that loads the 64-bit pc value 1343 * immediately after the jmp instruction. 1344 */ 1345 #ifdef __amd64 1346 if (p->p_model == DATAMODEL_LP64) { 1347 scratch[i++] = FASTTRAP_GROUP5_OP; 1348 scratch[i++] = FASTTRAP_MODRM(0, 4, 5); 1349 *(uint32_t *)&scratch[i] = 0; 1350 i += sizeof (uint32_t); 1351 *(uint64_t *)&scratch[i] = pc + tp->ftt_size; 1352 i += sizeof (uint64_t); 1353 } else { 1354 #endif 1355 /* 1356 * Set up the jmp to the next instruction; note that 1357 * the size of the traced instruction cancels out. 1358 */ 1359 scratch[i++] = FASTTRAP_JMP32; 1360 *(uint32_t *)&scratch[i] = pc - addr - 5; 1361 i += sizeof (uint32_t); 1362 #ifdef __amd64 1363 } 1364 #endif 1365 1366 curthread->t_dtrace_astpc = addr + i; 1367 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1368 i += tp->ftt_size; 1369 scratch[i++] = FASTTRAP_INT; 1370 scratch[i++] = T_DTRACE_RET; 1371 1372 if (fasttrap_copyout(scratch, (char *)addr, i)) { 1373 fasttrap_sigtrap(p, curthread, pc); 1374 new_pc = pc; 1375 break; 1376 } 1377 1378 if (tp->ftt_retids != NULL) { 1379 curthread->t_dtrace_step = 1; 1380 curthread->t_dtrace_ret = 1; 1381 new_pc = curthread->t_dtrace_astpc; 1382 } else { 1383 new_pc = curthread->t_dtrace_scrpc; 1384 } 1385 1386 curthread->t_dtrace_pc = pc; 1387 curthread->t_dtrace_npc = pc + tp->ftt_size; 1388 curthread->t_dtrace_on = 1; 1389 break; 1390 } 1391 1392 default: 1393 panic("fasttrap: mishandled an instruction"); 1394 } 1395 1396 /* 1397 * If there were no return probes when we first found the tracepoint, 1398 * we should feel no obligation to honor any return probes that were 1399 * subsequently enabled -- they'll just have to wait until the next 1400 * time around. 1401 */ 1402 if (tp->ftt_retids != NULL) { 1403 /* 1404 * We need to wait until the results of the instruction are 1405 * apparent before invoking any return probes. If this 1406 * instruction was emulated we can just call 1407 * fasttrap_return_common(); if it needs to be executed, we 1408 * need to wait until the user thread returns to the kernel. 1409 */ 1410 if (tp->ftt_type != FASTTRAP_T_COMMON) { 1411 /* 1412 * Set the program counter to the address of the traced 1413 * instruction so that it looks right in ustack() 1414 * output. We had previously set it to the end of the 1415 * instruction to simplify %rip-relative addressing. 1416 */ 1417 rp->r_pc = pc; 1418 1419 fasttrap_return_common(rp, pc, pid, new_pc); 1420 } else { 1421 ASSERT(curthread->t_dtrace_ret != 0); 1422 ASSERT(curthread->t_dtrace_pc == pc); 1423 ASSERT(curthread->t_dtrace_scrpc != 0); 1424 ASSERT(new_pc == curthread->t_dtrace_astpc); 1425 } 1426 } 1427 1428 ASSERT(new_pc != 0); 1429 rp->r_pc = new_pc; 1430 1431 return (0); 1432 } 1433 1434 int 1435 fasttrap_return_probe(struct regs *rp) 1436 { 1437 proc_t *p = curproc; 1438 uintptr_t pc = curthread->t_dtrace_pc; 1439 uintptr_t npc = curthread->t_dtrace_npc; 1440 1441 curthread->t_dtrace_pc = 0; 1442 curthread->t_dtrace_npc = 0; 1443 curthread->t_dtrace_scrpc = 0; 1444 curthread->t_dtrace_astpc = 0; 1445 1446 /* 1447 * Treat a child created by a call to vfork(2) as if it were its 1448 * parent. We know that there's only one thread of control in such a 1449 * process: this one. 1450 */ 1451 while (p->p_flag & SVFORK) { 1452 p = p->p_parent; 1453 } 1454 1455 /* 1456 * We set rp->r_pc to the address of the traced instruction so 1457 * that it appears to dtrace_probe() that we're on the original 1458 * instruction, and so that the user can't easily detect our 1459 * complex web of lies. dtrace_return_probe() (our caller) 1460 * will correctly set %pc after we return. 1461 */ 1462 rp->r_pc = pc; 1463 1464 fasttrap_return_common(rp, pc, p->p_pid, npc); 1465 1466 return (0); 1467 } 1468 1469 /*ARGSUSED*/ 1470 uint64_t 1471 fasttrap_getarg(void *arg, dtrace_id_t id, void *parg, int argno, int aframes) 1472 { 1473 return (fasttrap_anarg(ttolwp(curthread)->lwp_regs, 1, argno)); 1474 } 1475 1476 /*ARGSUSED*/ 1477 uint64_t 1478 fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, 1479 int aframes) 1480 { 1481 return (fasttrap_anarg(ttolwp(curthread)->lwp_regs, 0, argno)); 1482 } 1483 1484 static ulong_t 1485 fasttrap_getreg(struct regs *rp, uint_t reg) 1486 { 1487 #ifdef __amd64 1488 switch (reg) { 1489 case REG_R15: return (rp->r_r15); 1490 case REG_R14: return (rp->r_r14); 1491 case REG_R13: return (rp->r_r13); 1492 case REG_R12: return (rp->r_r12); 1493 case REG_R11: return (rp->r_r11); 1494 case REG_R10: return (rp->r_r10); 1495 case REG_R9: return (rp->r_r9); 1496 case REG_R8: return (rp->r_r8); 1497 case REG_RDI: return (rp->r_rdi); 1498 case REG_RSI: return (rp->r_rsi); 1499 case REG_RBP: return (rp->r_rbp); 1500 case REG_RBX: return (rp->r_rbx); 1501 case REG_RDX: return (rp->r_rdx); 1502 case REG_RCX: return (rp->r_rcx); 1503 case REG_RAX: return (rp->r_rax); 1504 case REG_TRAPNO: return (rp->r_trapno); 1505 case REG_ERR: return (rp->r_err); 1506 case REG_RIP: return (rp->r_rip); 1507 case REG_CS: return (rp->r_cs); 1508 case REG_RFL: return (rp->r_rfl); 1509 case REG_RSP: return (rp->r_rsp); 1510 case REG_SS: return (rp->r_ss); 1511 case REG_FS: return (rp->r_fs); 1512 case REG_GS: return (rp->r_gs); 1513 case REG_DS: return (rp->r_ds); 1514 case REG_ES: return (rp->r_es); 1515 case REG_FSBASE: return (rp->r_fsbase); 1516 case REG_GSBASE: return (rp->r_gsbase); 1517 } 1518 1519 panic("dtrace: illegal register constant"); 1520 /*NOTREACHED*/ 1521 #else 1522 if (reg >= _NGREG) 1523 panic("dtrace: illegal register constant"); 1524 1525 return (((greg_t *)&rp->r_gs)[reg]); 1526 #endif 1527 } 1528