17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5100b72f4Sandrei * Common Development and Distribution License (the "License"). 6100b72f4Sandrei * You may not use this file except in compliance with the License. 77c478bd9Sstevel@tonic-gate * 87c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 97c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 107c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 117c478bd9Sstevel@tonic-gate * and limitations under the License. 127c478bd9Sstevel@tonic-gate * 137c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 147c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 157c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 167c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 177c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 187c478bd9Sstevel@tonic-gate * 197c478bd9Sstevel@tonic-gate * CDDL HEADER END 207c478bd9Sstevel@tonic-gate */ 21ae115bc7Smrj 227c478bd9Sstevel@tonic-gate /* 235cd376e8SJimmy Vetayases * Copyright (c) 1993, 2010, Oracle and/or its affiliates. All rights reserved. 247c478bd9Sstevel@tonic-gate */ 25a3114836SGerry Liu /* 26a3114836SGerry Liu * Copyright (c) 2010, Intel Corporation. 27a3114836SGerry Liu * All rights reserved. 28a3114836SGerry Liu */ 297c478bd9Sstevel@tonic-gate 307c478bd9Sstevel@tonic-gate #ifndef _SYS_MACHSYSTM_H 317c478bd9Sstevel@tonic-gate #define _SYS_MACHSYSTM_H 327c478bd9Sstevel@tonic-gate 337c478bd9Sstevel@tonic-gate /* 347c478bd9Sstevel@tonic-gate * Numerous platform-dependent interfaces that don't seem to belong 357c478bd9Sstevel@tonic-gate * in any other header file. 367c478bd9Sstevel@tonic-gate * 377c478bd9Sstevel@tonic-gate * This file should not be included by code that purports to be 387c478bd9Sstevel@tonic-gate * platform-independent. 397c478bd9Sstevel@tonic-gate * 407c478bd9Sstevel@tonic-gate */ 417c478bd9Sstevel@tonic-gate 427c478bd9Sstevel@tonic-gate #include <sys/machparam.h> 437c478bd9Sstevel@tonic-gate #include <sys/varargs.h> 447c478bd9Sstevel@tonic-gate #include <sys/thread.h> 457c478bd9Sstevel@tonic-gate #include <sys/cpuvar.h> 46ae115bc7Smrj #include <sys/privregs.h> 47ae115bc7Smrj #include <sys/systm.h> 48ae115bc7Smrj #include <sys/traptrace.h> 497c478bd9Sstevel@tonic-gate #include <vm/page.h> 507c478bd9Sstevel@tonic-gate 517c478bd9Sstevel@tonic-gate #ifdef __cplusplus 527c478bd9Sstevel@tonic-gate extern "C" { 537c478bd9Sstevel@tonic-gate #endif 547c478bd9Sstevel@tonic-gate 557c478bd9Sstevel@tonic-gate #ifdef _KERNEL 567c478bd9Sstevel@tonic-gate 57a3114836SGerry Liu typedef enum mach_cpu_add_arg_type { 58a3114836SGerry Liu MACH_CPU_ARG_LOCAL_APIC, 59a3114836SGerry Liu MACH_CPU_ARG_LOCAL_X2APIC, 60a3114836SGerry Liu } mach_cpu_add_arg_type_t; 61a3114836SGerry Liu 62a3114836SGerry Liu typedef struct mach_cpu_add_arg { 63a3114836SGerry Liu mach_cpu_add_arg_type_t type; 64a3114836SGerry Liu union { 65a3114836SGerry Liu struct { 66a3114836SGerry Liu uint32_t apic_id; 67a3114836SGerry Liu uint32_t proc_id; 68a3114836SGerry Liu } apic; 69a3114836SGerry Liu } arg; 70a3114836SGerry Liu } mach_cpu_add_arg_t; 71a3114836SGerry Liu 72ae115bc7Smrj extern void mach_cpu_idle(void); 73ae115bc7Smrj extern void mach_cpu_halt(char *); 74ae115bc7Smrj extern int mach_cpu_start(cpu_t *, void *); 752df1fe9cSrandyf extern int mach_cpuid_start(processorid_t, void *); 76a3114836SGerry Liu extern int mach_cpu_stop(cpu_t *, void *); 77a3114836SGerry Liu extern int mach_cpu_add(mach_cpu_add_arg_t *, processorid_t *); 78a3114836SGerry Liu extern int mach_cpu_remove(processorid_t); 79fa96bd91SMichael Corcoran extern int mach_cpu_create_device_node(cpu_t *, dev_info_t **); 80a3114836SGerry Liu extern int mach_cpu_get_device_node(cpu_t *, dev_info_t **); 817c478bd9Sstevel@tonic-gate 827c478bd9Sstevel@tonic-gate extern int Cpudelay; 837c478bd9Sstevel@tonic-gate extern void setcpudelay(void); 847c478bd9Sstevel@tonic-gate 857c478bd9Sstevel@tonic-gate extern void send_dirint(int, int); 867c478bd9Sstevel@tonic-gate extern void siron(void); 87dd4eeefdSeota extern void sir_on(int); 887c478bd9Sstevel@tonic-gate 897c478bd9Sstevel@tonic-gate extern void return_instr(void); 907c478bd9Sstevel@tonic-gate 917c478bd9Sstevel@tonic-gate extern int kcpc_hw_load_pcbe(void); 927c478bd9Sstevel@tonic-gate extern void kcpc_hw_init(cpu_t *cp); 93ae115bc7Smrj extern void kcpc_hw_fini(cpu_t *cp); 947c478bd9Sstevel@tonic-gate extern int kcpc_hw_overflow_intr_installed; 957c478bd9Sstevel@tonic-gate 96843e1988Sjohnlev struct panic_trap_info { 97843e1988Sjohnlev struct regs *trap_regs; 98843e1988Sjohnlev uint_t trap_type; 99843e1988Sjohnlev caddr_t trap_addr; 100843e1988Sjohnlev }; 101843e1988Sjohnlev 1027c478bd9Sstevel@tonic-gate struct memconf { 103ae115bc7Smrj pfn_t mcf_spfn; /* begin page frame number */ 1047c478bd9Sstevel@tonic-gate pfn_t mcf_epfn; /* end page frame number */ 1057c478bd9Sstevel@tonic-gate }; 1067c478bd9Sstevel@tonic-gate 1077c478bd9Sstevel@tonic-gate struct system_hardware { 1087c478bd9Sstevel@tonic-gate int hd_nodes; /* number of nodes */ 1097c478bd9Sstevel@tonic-gate int hd_cpus_per_node; /* max cpus in a node */ 1107c478bd9Sstevel@tonic-gate struct memconf hd_mem[MAXNODES]; 1117c478bd9Sstevel@tonic-gate /* 1127c478bd9Sstevel@tonic-gate * memory layout for each 1137c478bd9Sstevel@tonic-gate * node. 1147c478bd9Sstevel@tonic-gate */ 1157c478bd9Sstevel@tonic-gate }; 1167c478bd9Sstevel@tonic-gate extern struct system_hardware system_hardware; 1177c478bd9Sstevel@tonic-gate extern void get_system_configuration(void); 1187c478bd9Sstevel@tonic-gate extern void mmu_init(void); 1197c478bd9Sstevel@tonic-gate extern int cpuid2nodeid(int); 1207c478bd9Sstevel@tonic-gate extern void map_kaddr(caddr_t, pfn_t, int, int); 1217aec1d6eScindi 12284ab085aSmws extern void memscrub_init(void); 123ae115bc7Smrj extern void trap(struct regs *, caddr_t, processorid_t); 124ae115bc7Smrj 125ae115bc7Smrj extern void do_interrupt(struct regs *, trap_trace_rec_t *); 1267aec1d6eScindi extern void memscrub_disable(void); 1277c478bd9Sstevel@tonic-gate 1280e751525SEric Saxe /* 1297ff178cdSJimmy Vetayases * Interrupt handling hooks 1307ff178cdSJimmy Vetayases */ 1317ff178cdSJimmy Vetayases extern void (*do_interrupt_common)(struct regs *, trap_trace_rec_t *); 1327ff178cdSJimmy Vetayases extern uintptr_t (*get_intr_handler)(int, short); 1337ff178cdSJimmy Vetayases 1347ff178cdSJimmy Vetayases /* 1350e751525SEric Saxe * Dispatcher hooks. 1360e751525SEric Saxe */ 1370e751525SEric Saxe void (*idle_cpu)(); 1380e751525SEric Saxe void (*non_deep_idle_cpu)(); 1390e751525SEric Saxe void (*disp_enq_thread)(cpu_t *, int); 1400e751525SEric Saxe void (*non_deep_idle_disp_enq_thread)(cpu_t *, int); 1410e751525SEric Saxe 142843e1988Sjohnlev #ifndef __xpv 1437c478bd9Sstevel@tonic-gate extern unsigned int microdata; 144843e1988Sjohnlev #endif 145843e1988Sjohnlev 1467c478bd9Sstevel@tonic-gate extern int use_mp; 1477c478bd9Sstevel@tonic-gate 1487c478bd9Sstevel@tonic-gate extern struct cpu cpus[]; /* pointer to other cpus */ 1497c478bd9Sstevel@tonic-gate extern struct cpu *cpu[]; /* pointer to all cpus */ 1507c478bd9Sstevel@tonic-gate 151a3114836SGerry Liu /* Operation types for extended mach_cpucontext interfaces */ 152a3114836SGerry Liu #define MACH_CPUCONTEXT_OP_START 0 153a3114836SGerry Liu #define MACH_CPUCONTEXT_OP_STOP 1 154a3114836SGerry Liu 155ae115bc7Smrj extern int mach_cpucontext_init(void); 156ae115bc7Smrj extern void mach_cpucontext_fini(void); 157ae115bc7Smrj extern void *mach_cpucontext_alloc(struct cpu *); 158ae115bc7Smrj extern void mach_cpucontext_free(struct cpu *, void *, int); 159a3114836SGerry Liu extern void *mach_cpucontext_xalloc(struct cpu *, int); 160a3114836SGerry Liu extern void mach_cpucontext_xfree(struct cpu *, void *, int, int); 1612df1fe9cSrandyf extern void rmp_gdt_init(rm_platter_t *); 162ae115bc7Smrj 1637c478bd9Sstevel@tonic-gate extern uintptr_t hole_start, hole_end; 1647c478bd9Sstevel@tonic-gate 1657c478bd9Sstevel@tonic-gate #define INVALID_VADDR(a) \ 1667c478bd9Sstevel@tonic-gate (((a) >= (caddr_t)hole_start && (a) < (caddr_t)hole_end)) 1677c478bd9Sstevel@tonic-gate 1687c478bd9Sstevel@tonic-gate /* kpm mapping window */ 1697c478bd9Sstevel@tonic-gate extern size_t kpm_size; 1707c478bd9Sstevel@tonic-gate extern uchar_t kpm_size_shift; 1717c478bd9Sstevel@tonic-gate extern caddr_t kpm_vbase; 1727c478bd9Sstevel@tonic-gate 173ae115bc7Smrj struct memlist; 174ae115bc7Smrj extern void memlist_add(uint64_t, uint64_t, struct memlist *, 175ae115bc7Smrj struct memlist **); 176a77271f8SVikram Hegde extern page_t *page_get_physical(uintptr_t seed); 177ddece0baSsethg extern int linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp); 178ddece0baSsethg extern int dtrace_linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp); 179ae115bc7Smrj 180c48ac12eSjohnlev extern int force_shutdown_method; 181c48ac12eSjohnlev 182a3114836SGerry Liu /* Dynamic Reconfiguration capability interface. */ 183a3114836SGerry Liu #define PLAT_DR_OPTIONS_NAME "plat-dr-options" 184a3114836SGerry Liu #define PLAT_DR_PHYSMAX_NAME "plat-dr-physmax" 185a3114836SGerry Liu #define PLAT_MAX_NCPUS_NAME "plat-max-ncpus" 186a3114836SGerry Liu #define BOOT_MAX_NCPUS_NAME "boot-max-ncpus" 187a3114836SGerry Liu #define BOOT_NCPUS_NAME "boot-ncpus" 188a3114836SGerry Liu 189a3114836SGerry Liu #define PLAT_DR_FEATURE_CPU 0x1 190a3114836SGerry Liu #define PLAT_DR_FEATURE_MEMORY 0x2 191a3114836SGerry Liu #define PLAT_DR_FEATURE_ENABLED 0x1000000 192a3114836SGerry Liu 193a3114836SGerry Liu #define plat_dr_enabled() \ 194a3114836SGerry Liu plat_dr_check_capability(PLAT_DR_FEATURE_ENABLED) 195a3114836SGerry Liu 196a3114836SGerry Liu #define plat_dr_enable() \ 197a3114836SGerry Liu plat_dr_enable_capability(PLAT_DR_FEATURE_ENABLED) 198a3114836SGerry Liu 199a3114836SGerry Liu #define plat_dr_disable_cpu() \ 200a3114836SGerry Liu plat_dr_disable_capability(PLAT_DR_FEATURE_CPU) 201a3114836SGerry Liu #define plat_dr_disable_memory() \ 202a3114836SGerry Liu plat_dr_disable_capability(PLAT_DR_FEATURE_MEMORY) 203a3114836SGerry Liu 204a3114836SGerry Liu extern boolean_t plat_dr_support_cpu(void); 205a3114836SGerry Liu extern boolean_t plat_dr_support_memory(void); 206a3114836SGerry Liu extern boolean_t plat_dr_check_capability(uint64_t features); 207a3114836SGerry Liu extern void plat_dr_enable_capability(uint64_t features); 208a3114836SGerry Liu extern void plat_dr_disable_capability(uint64_t features); 209a3114836SGerry Liu 210a3114836SGerry Liu #pragma weak plat_dr_support_cpu 211a3114836SGerry Liu #pragma weak plat_dr_support_memory 212a3114836SGerry Liu 213a3114836SGerry Liu /* 214a3114836SGerry Liu * Used to communicate DR updates to platform lgroup framework 215a3114836SGerry Liu */ 216a3114836SGerry Liu typedef struct { 217a3114836SGerry Liu uint64_t u_base; 218a3114836SGerry Liu uint64_t u_length; 219a3114836SGerry Liu uint32_t u_domain; 220a3114836SGerry Liu uint32_t u_device_id; 221a3114836SGerry Liu uint32_t u_sli_cnt; 222a3114836SGerry Liu uchar_t *u_sli_ptr; 223a3114836SGerry Liu } update_membounds_t; 224a3114836SGerry Liu 225a3114836SGerry Liu /* Maximum physical page number (PFN) for memory DR operations. */ 226a3114836SGerry Liu extern uint64_t plat_dr_physmax; 227a3114836SGerry Liu 228843e1988Sjohnlev #ifdef __xpv 229843e1988Sjohnlev #include <sys/xen_mmu.h> 230843e1988Sjohnlev extern page_t *page_get_high_mfn(mfn_t); 231843e1988Sjohnlev #endif 232843e1988Sjohnlev 233*9278ddffSRobert Mustacchi extern hrtime_t tsc_gethrtime_tick_delta(void); 234843e1988Sjohnlev 2357c478bd9Sstevel@tonic-gate #endif /* _KERNEL */ 2367c478bd9Sstevel@tonic-gate 2377c478bd9Sstevel@tonic-gate #ifdef __cplusplus 2387c478bd9Sstevel@tonic-gate } 2397c478bd9Sstevel@tonic-gate #endif 2407c478bd9Sstevel@tonic-gate 2417c478bd9Sstevel@tonic-gate #endif /* _SYS_MACHSYSTM_H */ 242