1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 /* 27 * x86 root nexus driver 28 */ 29 30 #include <sys/sysmacros.h> 31 #include <sys/conf.h> 32 #include <sys/autoconf.h> 33 #include <sys/sysmacros.h> 34 #include <sys/debug.h> 35 #include <sys/psw.h> 36 #include <sys/ddidmareq.h> 37 #include <sys/promif.h> 38 #include <sys/devops.h> 39 #include <sys/kmem.h> 40 #include <sys/cmn_err.h> 41 #include <vm/seg.h> 42 #include <vm/seg_kmem.h> 43 #include <vm/seg_dev.h> 44 #include <sys/vmem.h> 45 #include <sys/mman.h> 46 #include <vm/hat.h> 47 #include <vm/as.h> 48 #include <vm/page.h> 49 #include <sys/avintr.h> 50 #include <sys/errno.h> 51 #include <sys/modctl.h> 52 #include <sys/ddi_impldefs.h> 53 #include <sys/sunddi.h> 54 #include <sys/sunndi.h> 55 #include <sys/mach_intr.h> 56 #include <sys/psm.h> 57 #include <sys/ontrap.h> 58 #include <sys/atomic.h> 59 #include <sys/sdt.h> 60 #include <sys/rootnex.h> 61 #include <vm/hat_i86.h> 62 #include <sys/ddifm.h> 63 #include <sys/ddi_isa.h> 64 65 #ifdef __xpv 66 #include <sys/bootinfo.h> 67 #include <sys/hypervisor.h> 68 #include <sys/bootconf.h> 69 #include <vm/kboot_mmu.h> 70 #endif 71 72 #include <sys/intel_iommu.h> 73 74 /* 75 * add to support dmar fault interrupt, will change soon 76 */ 77 char _depends_on[] = "mach/pcplusmp"; 78 79 /* 80 * enable/disable extra checking of function parameters. Useful for debugging 81 * drivers. 82 */ 83 #ifdef DEBUG 84 int rootnex_alloc_check_parms = 1; 85 int rootnex_bind_check_parms = 1; 86 int rootnex_bind_check_inuse = 1; 87 int rootnex_unbind_verify_buffer = 0; 88 int rootnex_sync_check_parms = 1; 89 #else 90 int rootnex_alloc_check_parms = 0; 91 int rootnex_bind_check_parms = 0; 92 int rootnex_bind_check_inuse = 0; 93 int rootnex_unbind_verify_buffer = 0; 94 int rootnex_sync_check_parms = 0; 95 #endif 96 97 /* Master Abort and Target Abort panic flag */ 98 int rootnex_fm_ma_ta_panic_flag = 0; 99 100 /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 101 int rootnex_bind_fail = 1; 102 int rootnex_bind_warn = 1; 103 uint8_t *rootnex_warn_list; 104 /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 105 #define ROOTNEX_BIND_WARNING (0x1 << 0) 106 107 /* 108 * revert back to old broken behavior of always sync'ing entire copy buffer. 109 * This is useful if be have a buggy driver which doesn't correctly pass in 110 * the offset and size into ddi_dma_sync(). 111 */ 112 int rootnex_sync_ignore_params = 0; 113 114 /* 115 * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 116 * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 117 * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 118 * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 119 * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 120 * (< 8K). We will still need to allocate the copy buffer during bind though 121 * (if we need one). These can only be modified in /etc/system before rootnex 122 * attach. 123 */ 124 #if defined(__amd64) 125 int rootnex_prealloc_cookies = 65; 126 int rootnex_prealloc_windows = 4; 127 int rootnex_prealloc_copybuf = 2; 128 #else 129 int rootnex_prealloc_cookies = 33; 130 int rootnex_prealloc_windows = 4; 131 int rootnex_prealloc_copybuf = 2; 132 #endif 133 134 /* driver global state */ 135 static rootnex_state_t *rootnex_state; 136 137 /* shortcut to rootnex counters */ 138 static uint64_t *rootnex_cnt; 139 140 /* 141 * XXX - does x86 even need these or are they left over from the SPARC days? 142 */ 143 /* statically defined integer/boolean properties for the root node */ 144 static rootnex_intprop_t rootnex_intprp[] = { 145 { "PAGESIZE", PAGESIZE }, 146 { "MMU_PAGESIZE", MMU_PAGESIZE }, 147 { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 148 { DDI_RELATIVE_ADDRESSING, 1 }, 149 }; 150 #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 151 152 #ifdef __xpv 153 typedef maddr_t rootnex_addr_t; 154 #define ROOTNEX_PADDR_TO_RBASE(xinfo, pa) \ 155 (DOMAIN_IS_INITDOMAIN(xinfo) ? pa_to_ma(pa) : (pa)) 156 #else 157 typedef paddr_t rootnex_addr_t; 158 #endif 159 160 161 static struct cb_ops rootnex_cb_ops = { 162 nodev, /* open */ 163 nodev, /* close */ 164 nodev, /* strategy */ 165 nodev, /* print */ 166 nodev, /* dump */ 167 nodev, /* read */ 168 nodev, /* write */ 169 nodev, /* ioctl */ 170 nodev, /* devmap */ 171 nodev, /* mmap */ 172 nodev, /* segmap */ 173 nochpoll, /* chpoll */ 174 ddi_prop_op, /* cb_prop_op */ 175 NULL, /* struct streamtab */ 176 D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 177 CB_REV, /* Rev */ 178 nodev, /* cb_aread */ 179 nodev /* cb_awrite */ 180 }; 181 182 static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 183 off_t offset, off_t len, caddr_t *vaddrp); 184 static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 185 struct hat *hat, struct seg *seg, caddr_t addr, 186 struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 187 static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 188 struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 189 static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 190 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 191 ddi_dma_handle_t *handlep); 192 static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 193 ddi_dma_handle_t handle); 194 static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 195 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 196 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 197 static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 198 ddi_dma_handle_t handle); 199 static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 200 ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 201 static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 202 ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 203 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 204 static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 205 ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 206 off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 207 static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 208 ddi_ctl_enum_t ctlop, void *arg, void *result); 209 static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 210 ddi_iblock_cookie_t *ibc); 211 static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 212 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 213 214 215 static struct bus_ops rootnex_bus_ops = { 216 BUSO_REV, 217 rootnex_map, 218 NULL, 219 NULL, 220 NULL, 221 rootnex_map_fault, 222 rootnex_dma_map, 223 rootnex_dma_allochdl, 224 rootnex_dma_freehdl, 225 rootnex_dma_bindhdl, 226 rootnex_dma_unbindhdl, 227 rootnex_dma_sync, 228 rootnex_dma_win, 229 rootnex_dma_mctl, 230 rootnex_ctlops, 231 ddi_bus_prop_op, 232 i_ddi_rootnex_get_eventcookie, 233 i_ddi_rootnex_add_eventcall, 234 i_ddi_rootnex_remove_eventcall, 235 i_ddi_rootnex_post_event, 236 0, /* bus_intr_ctl */ 237 0, /* bus_config */ 238 0, /* bus_unconfig */ 239 rootnex_fm_init, /* bus_fm_init */ 240 NULL, /* bus_fm_fini */ 241 NULL, /* bus_fm_access_enter */ 242 NULL, /* bus_fm_access_exit */ 243 NULL, /* bus_powr */ 244 rootnex_intr_ops /* bus_intr_op */ 245 }; 246 247 static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 248 static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 249 250 static struct dev_ops rootnex_ops = { 251 DEVO_REV, 252 0, 253 ddi_no_info, 254 nulldev, 255 nulldev, 256 rootnex_attach, 257 rootnex_detach, 258 nulldev, 259 &rootnex_cb_ops, 260 &rootnex_bus_ops 261 }; 262 263 static struct modldrv rootnex_modldrv = { 264 &mod_driverops, 265 "i86pc root nexus", 266 &rootnex_ops 267 }; 268 269 static struct modlinkage rootnex_modlinkage = { 270 MODREV_1, 271 (void *)&rootnex_modldrv, 272 NULL 273 }; 274 275 276 /* 277 * extern hacks 278 */ 279 extern struct seg_ops segdev_ops; 280 extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 281 #ifdef DDI_MAP_DEBUG 282 extern int ddi_map_debug_flag; 283 #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 284 #endif 285 extern void i86_pp_map(page_t *pp, caddr_t kaddr); 286 extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 287 extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 288 psm_intr_op_t, int *); 289 extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 290 extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 291 292 /* 293 * Use device arena to use for device control register mappings. 294 * Various kernel memory walkers (debugger, dtrace) need to know 295 * to avoid this address range to prevent undesired device activity. 296 */ 297 extern void *device_arena_alloc(size_t size, int vm_flag); 298 extern void device_arena_free(void * vaddr, size_t size); 299 300 301 /* 302 * Internal functions 303 */ 304 static int rootnex_dma_init(); 305 static void rootnex_add_props(dev_info_t *); 306 static int rootnex_ctl_reportdev(dev_info_t *dip); 307 static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 308 static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 309 static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 310 static int rootnex_map_handle(ddi_map_req_t *mp); 311 static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 312 static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 313 static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 314 ddi_dma_attr_t *attr); 315 static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 316 rootnex_sglinfo_t *sglinfo); 317 static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 318 rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag); 319 static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 320 rootnex_dma_t *dma, ddi_dma_attr_t *attr); 321 static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 322 static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 323 ddi_dma_attr_t *attr, int kmflag); 324 static void rootnex_teardown_windows(rootnex_dma_t *dma); 325 static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 326 rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 327 static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 328 rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 329 size_t *copybuf_used, page_t **cur_pp); 330 static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 331 rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 332 ddi_dma_attr_t *attr, off_t cur_offset); 333 static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 334 rootnex_dma_t *dma, rootnex_window_t **windowp, 335 ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 336 static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 337 rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 338 static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 339 off_t offset, size_t size, uint_t cache_flags); 340 static int rootnex_verify_buffer(rootnex_dma_t *dma); 341 static int rootnex_dma_check(dev_info_t *dip, const void *handle, 342 const void *comp_addr, const void *not_used); 343 344 /* 345 * _init() 346 * 347 */ 348 int 349 _init(void) 350 { 351 352 rootnex_state = NULL; 353 return (mod_install(&rootnex_modlinkage)); 354 } 355 356 357 /* 358 * _info() 359 * 360 */ 361 int 362 _info(struct modinfo *modinfop) 363 { 364 return (mod_info(&rootnex_modlinkage, modinfop)); 365 } 366 367 368 /* 369 * _fini() 370 * 371 */ 372 int 373 _fini(void) 374 { 375 return (EBUSY); 376 } 377 378 379 /* 380 * rootnex_attach() 381 * 382 */ 383 static int 384 rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 385 { 386 int fmcap; 387 int e; 388 389 switch (cmd) { 390 case DDI_ATTACH: 391 break; 392 case DDI_RESUME: 393 return (DDI_SUCCESS); 394 default: 395 return (DDI_FAILURE); 396 } 397 398 /* 399 * We should only have one instance of rootnex. Save it away since we 400 * don't have an easy way to get it back later. 401 */ 402 ASSERT(rootnex_state == NULL); 403 rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 404 405 rootnex_state->r_dip = dip; 406 rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15); 407 rootnex_state->r_reserved_msg_printed = B_FALSE; 408 rootnex_cnt = &rootnex_state->r_counters[0]; 409 rootnex_state->r_intel_iommu_enabled = B_FALSE; 410 411 /* 412 * Set minimum fm capability level for i86pc platforms and then 413 * initialize error handling. Since we're the rootnex, we don't 414 * care what's returned in the fmcap field. 415 */ 416 ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE | 417 DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE; 418 fmcap = ddi_system_fmcap; 419 ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc); 420 421 /* initialize DMA related state */ 422 e = rootnex_dma_init(); 423 if (e != DDI_SUCCESS) { 424 kmem_free(rootnex_state, sizeof (rootnex_state_t)); 425 return (DDI_FAILURE); 426 } 427 428 /* Add static root node properties */ 429 rootnex_add_props(dip); 430 431 /* since we can't call ddi_report_dev() */ 432 cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 433 434 /* Initialize rootnex event handle */ 435 i_ddi_rootnex_init_events(dip); 436 437 #if defined(__amd64) 438 /* probe intel iommu */ 439 intel_iommu_probe_and_parse(); 440 441 /* attach the iommu nodes */ 442 if (intel_iommu_support) { 443 if (intel_iommu_attach_dmar_nodes() == DDI_SUCCESS) { 444 rootnex_state->r_intel_iommu_enabled = B_TRUE; 445 } else { 446 intel_iommu_release_dmar_info(); 447 } 448 } 449 #endif 450 451 return (DDI_SUCCESS); 452 } 453 454 455 /* 456 * rootnex_detach() 457 * 458 */ 459 /*ARGSUSED*/ 460 static int 461 rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 462 { 463 switch (cmd) { 464 case DDI_SUSPEND: 465 break; 466 default: 467 return (DDI_FAILURE); 468 } 469 470 return (DDI_SUCCESS); 471 } 472 473 474 /* 475 * rootnex_dma_init() 476 * 477 */ 478 /*ARGSUSED*/ 479 static int 480 rootnex_dma_init() 481 { 482 size_t bufsize; 483 484 485 /* 486 * size of our cookie/window/copybuf state needed in dma bind that we 487 * pre-alloc in dma_alloc_handle 488 */ 489 rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 490 rootnex_state->r_prealloc_size = 491 (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 492 (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 493 (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 494 495 /* 496 * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 497 * allocate 16 extra bytes for struct pointer alignment 498 * (p->dmai_private & dma->dp_prealloc_buffer) 499 */ 500 bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 501 rootnex_state->r_prealloc_size + 0x10; 502 rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 503 bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 504 if (rootnex_state->r_dmahdl_cache == NULL) { 505 return (DDI_FAILURE); 506 } 507 508 /* 509 * allocate array to track which major numbers we have printed warnings 510 * for. 511 */ 512 rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 513 KM_SLEEP); 514 515 return (DDI_SUCCESS); 516 } 517 518 519 /* 520 * rootnex_add_props() 521 * 522 */ 523 static void 524 rootnex_add_props(dev_info_t *dip) 525 { 526 rootnex_intprop_t *rpp; 527 int i; 528 529 /* Add static integer/boolean properties to the root node */ 530 rpp = rootnex_intprp; 531 for (i = 0; i < NROOT_INTPROPS; i++) { 532 (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 533 rpp[i].prop_name, rpp[i].prop_value); 534 } 535 } 536 537 538 539 /* 540 * ************************* 541 * ctlops related routines 542 * ************************* 543 */ 544 545 /* 546 * rootnex_ctlops() 547 * 548 */ 549 /*ARGSUSED*/ 550 static int 551 rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 552 void *arg, void *result) 553 { 554 int n, *ptr; 555 struct ddi_parent_private_data *pdp; 556 557 switch (ctlop) { 558 case DDI_CTLOPS_DMAPMAPC: 559 /* 560 * Return 'partial' to indicate that dma mapping 561 * has to be done in the main MMU. 562 */ 563 return (DDI_DMA_PARTIAL); 564 565 case DDI_CTLOPS_BTOP: 566 /* 567 * Convert byte count input to physical page units. 568 * (byte counts that are not a page-size multiple 569 * are rounded down) 570 */ 571 *(ulong_t *)result = btop(*(ulong_t *)arg); 572 return (DDI_SUCCESS); 573 574 case DDI_CTLOPS_PTOB: 575 /* 576 * Convert size in physical pages to bytes 577 */ 578 *(ulong_t *)result = ptob(*(ulong_t *)arg); 579 return (DDI_SUCCESS); 580 581 case DDI_CTLOPS_BTOPR: 582 /* 583 * Convert byte count input to physical page units 584 * (byte counts that are not a page-size multiple 585 * are rounded up) 586 */ 587 *(ulong_t *)result = btopr(*(ulong_t *)arg); 588 return (DDI_SUCCESS); 589 590 case DDI_CTLOPS_INITCHILD: 591 return (impl_ddi_sunbus_initchild(arg)); 592 593 case DDI_CTLOPS_UNINITCHILD: 594 impl_ddi_sunbus_removechild(arg); 595 return (DDI_SUCCESS); 596 597 case DDI_CTLOPS_REPORTDEV: 598 return (rootnex_ctl_reportdev(rdip)); 599 600 case DDI_CTLOPS_IOMIN: 601 /* 602 * Nothing to do here but reflect back.. 603 */ 604 return (DDI_SUCCESS); 605 606 case DDI_CTLOPS_REGSIZE: 607 case DDI_CTLOPS_NREGS: 608 break; 609 610 case DDI_CTLOPS_SIDDEV: 611 if (ndi_dev_is_prom_node(rdip)) 612 return (DDI_SUCCESS); 613 if (ndi_dev_is_persistent_node(rdip)) 614 return (DDI_SUCCESS); 615 return (DDI_FAILURE); 616 617 case DDI_CTLOPS_POWER: 618 return ((*pm_platform_power)((power_req_t *)arg)); 619 620 case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */ 621 case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 622 case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 623 case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 624 case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */ 625 case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */ 626 if (!rootnex_state->r_reserved_msg_printed) { 627 rootnex_state->r_reserved_msg_printed = B_TRUE; 628 cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 629 "1 or more reserved/obsolete operations."); 630 } 631 return (DDI_FAILURE); 632 633 default: 634 return (DDI_FAILURE); 635 } 636 /* 637 * The rest are for "hardware" properties 638 */ 639 if ((pdp = ddi_get_parent_data(rdip)) == NULL) 640 return (DDI_FAILURE); 641 642 if (ctlop == DDI_CTLOPS_NREGS) { 643 ptr = (int *)result; 644 *ptr = pdp->par_nreg; 645 } else { 646 off_t *size = (off_t *)result; 647 648 ptr = (int *)arg; 649 n = *ptr; 650 if (n >= pdp->par_nreg) { 651 return (DDI_FAILURE); 652 } 653 *size = (off_t)pdp->par_reg[n].regspec_size; 654 } 655 return (DDI_SUCCESS); 656 } 657 658 659 /* 660 * rootnex_ctl_reportdev() 661 * 662 */ 663 static int 664 rootnex_ctl_reportdev(dev_info_t *dev) 665 { 666 int i, n, len, f_len = 0; 667 char *buf; 668 669 buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 670 f_len += snprintf(buf, REPORTDEV_BUFSIZE, 671 "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 672 len = strlen(buf); 673 674 for (i = 0; i < sparc_pd_getnreg(dev); i++) { 675 676 struct regspec *rp = sparc_pd_getreg(dev, i); 677 678 if (i == 0) 679 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 680 ": "); 681 else 682 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 683 " and "); 684 len = strlen(buf); 685 686 switch (rp->regspec_bustype) { 687 688 case BTEISA: 689 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 690 "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 691 break; 692 693 case BTISA: 694 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 695 "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 696 break; 697 698 default: 699 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 700 "space %x offset %x", 701 rp->regspec_bustype, rp->regspec_addr); 702 break; 703 } 704 len = strlen(buf); 705 } 706 for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 707 int pri; 708 709 if (i != 0) { 710 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 711 ","); 712 len = strlen(buf); 713 } 714 pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 715 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 716 " sparc ipl %d", pri); 717 len = strlen(buf); 718 } 719 #ifdef DEBUG 720 if (f_len + 1 >= REPORTDEV_BUFSIZE) { 721 cmn_err(CE_NOTE, "next message is truncated: " 722 "printed length 1024, real length %d", f_len); 723 } 724 #endif /* DEBUG */ 725 cmn_err(CE_CONT, "?%s\n", buf); 726 kmem_free(buf, REPORTDEV_BUFSIZE); 727 return (DDI_SUCCESS); 728 } 729 730 731 /* 732 * ****************** 733 * map related code 734 * ****************** 735 */ 736 737 /* 738 * rootnex_map() 739 * 740 */ 741 static int 742 rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 743 off_t len, caddr_t *vaddrp) 744 { 745 struct regspec *rp, tmp_reg; 746 ddi_map_req_t mr = *mp; /* Get private copy of request */ 747 int error; 748 749 mp = &mr; 750 751 switch (mp->map_op) { 752 case DDI_MO_MAP_LOCKED: 753 case DDI_MO_UNMAP: 754 case DDI_MO_MAP_HANDLE: 755 break; 756 default: 757 #ifdef DDI_MAP_DEBUG 758 cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 759 mp->map_op); 760 #endif /* DDI_MAP_DEBUG */ 761 return (DDI_ME_UNIMPLEMENTED); 762 } 763 764 if (mp->map_flags & DDI_MF_USER_MAPPING) { 765 #ifdef DDI_MAP_DEBUG 766 cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 767 #endif /* DDI_MAP_DEBUG */ 768 return (DDI_ME_UNIMPLEMENTED); 769 } 770 771 /* 772 * First, if given an rnumber, convert it to a regspec... 773 * (Presumably, this is on behalf of a child of the root node?) 774 */ 775 776 if (mp->map_type == DDI_MT_RNUMBER) { 777 778 int rnumber = mp->map_obj.rnumber; 779 #ifdef DDI_MAP_DEBUG 780 static char *out_of_range = 781 "rootnex_map: Out of range rnumber <%d>, device <%s>"; 782 #endif /* DDI_MAP_DEBUG */ 783 784 rp = i_ddi_rnumber_to_regspec(rdip, rnumber); 785 if (rp == NULL) { 786 #ifdef DDI_MAP_DEBUG 787 cmn_err(CE_WARN, out_of_range, rnumber, 788 ddi_get_name(rdip)); 789 #endif /* DDI_MAP_DEBUG */ 790 return (DDI_ME_RNUMBER_RANGE); 791 } 792 793 /* 794 * Convert the given ddi_map_req_t from rnumber to regspec... 795 */ 796 797 mp->map_type = DDI_MT_REGSPEC; 798 mp->map_obj.rp = rp; 799 } 800 801 /* 802 * Adjust offset and length correspnding to called values... 803 * XXX: A non-zero length means override the one in the regspec 804 * XXX: (regardless of what's in the parent's range?) 805 */ 806 807 tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */ 808 rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */ 809 810 #ifdef DDI_MAP_DEBUG 811 cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d " 812 "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 813 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset, 814 len, mp->map_handlep); 815 #endif /* DDI_MAP_DEBUG */ 816 817 /* 818 * I/O or memory mapping: 819 * 820 * <bustype=0, addr=x, len=x>: memory 821 * <bustype=1, addr=x, len=x>: i/o 822 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 823 */ 824 825 if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 826 cmn_err(CE_WARN, "<%s,%s> invalid register spec" 827 " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip), 828 ddi_get_name(rdip), rp->regspec_bustype, 829 rp->regspec_addr, rp->regspec_size); 830 return (DDI_ME_INVAL); 831 } 832 833 if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { 834 /* 835 * compatibility i/o mapping 836 */ 837 rp->regspec_bustype += (uint_t)offset; 838 } else { 839 /* 840 * Normal memory or i/o mapping 841 */ 842 rp->regspec_addr += (uint_t)offset; 843 } 844 845 if (len != 0) 846 rp->regspec_size = (uint_t)len; 847 848 #ifdef DDI_MAP_DEBUG 849 cmn_err(CE_CONT, " <%s,%s> <0x%x, 0x%x, 0x%d> offset %d " 850 "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 851 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 852 offset, len, mp->map_handlep); 853 #endif /* DDI_MAP_DEBUG */ 854 855 /* 856 * Apply any parent ranges at this level, if applicable. 857 * (This is where nexus specific regspec translation takes place. 858 * Use of this function is implicit agreement that translation is 859 * provided via ddi_apply_range.) 860 */ 861 862 #ifdef DDI_MAP_DEBUG 863 ddi_map_debug("applying range of parent <%s> to child <%s>...\n", 864 ddi_get_name(dip), ddi_get_name(rdip)); 865 #endif /* DDI_MAP_DEBUG */ 866 867 if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0) 868 return (error); 869 870 switch (mp->map_op) { 871 case DDI_MO_MAP_LOCKED: 872 873 /* 874 * Set up the locked down kernel mapping to the regspec... 875 */ 876 877 return (rootnex_map_regspec(mp, vaddrp)); 878 879 case DDI_MO_UNMAP: 880 881 /* 882 * Release mapping... 883 */ 884 885 return (rootnex_unmap_regspec(mp, vaddrp)); 886 887 case DDI_MO_MAP_HANDLE: 888 889 return (rootnex_map_handle(mp)); 890 891 default: 892 return (DDI_ME_UNIMPLEMENTED); 893 } 894 } 895 896 897 /* 898 * rootnex_map_fault() 899 * 900 * fault in mappings for requestors 901 */ 902 /*ARGSUSED*/ 903 static int 904 rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 905 struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 906 uint_t lock) 907 { 908 909 #ifdef DDI_MAP_DEBUG 910 ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 911 ddi_map_debug(" Seg <%s>\n", 912 seg->s_ops == &segdev_ops ? "segdev" : 913 seg == &kvseg ? "segkmem" : "NONE!"); 914 #endif /* DDI_MAP_DEBUG */ 915 916 /* 917 * This is all terribly broken, but it is a start 918 * 919 * XXX Note that this test means that segdev_ops 920 * must be exported from seg_dev.c. 921 * XXX What about devices with their own segment drivers? 922 */ 923 if (seg->s_ops == &segdev_ops) { 924 struct segdev_data *sdp = (struct segdev_data *)seg->s_data; 925 926 if (hat == NULL) { 927 /* 928 * This is one plausible interpretation of 929 * a null hat i.e. use the first hat on the 930 * address space hat list which by convention is 931 * the hat of the system MMU. At alternative 932 * would be to panic .. this might well be better .. 933 */ 934 ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock)); 935 hat = seg->s_as->a_hat; 936 cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 937 } 938 hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 939 (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 940 } else if (seg == &kvseg && dp == NULL) { 941 hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 942 HAT_LOAD_LOCK); 943 } else 944 return (DDI_FAILURE); 945 return (DDI_SUCCESS); 946 } 947 948 949 /* 950 * rootnex_map_regspec() 951 * we don't support mapping of I/O cards above 4Gb 952 */ 953 static int 954 rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 955 { 956 rootnex_addr_t rbase; 957 void *cvaddr; 958 uint_t npages, pgoffset; 959 struct regspec *rp; 960 ddi_acc_hdl_t *hp; 961 ddi_acc_impl_t *ap; 962 uint_t hat_acc_flags; 963 paddr_t pbase; 964 965 rp = mp->map_obj.rp; 966 hp = mp->map_handlep; 967 968 #ifdef DDI_MAP_DEBUG 969 ddi_map_debug( 970 "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 971 rp->regspec_bustype, rp->regspec_addr, 972 rp->regspec_size, mp->map_handlep); 973 #endif /* DDI_MAP_DEBUG */ 974 975 /* 976 * I/O or memory mapping 977 * 978 * <bustype=0, addr=x, len=x>: memory 979 * <bustype=1, addr=x, len=x>: i/o 980 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 981 */ 982 983 if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 984 cmn_err(CE_WARN, "rootnex: invalid register spec" 985 " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype, 986 rp->regspec_addr, rp->regspec_size); 987 return (DDI_FAILURE); 988 } 989 990 if (rp->regspec_bustype != 0) { 991 /* 992 * I/O space - needs a handle. 993 */ 994 if (hp == NULL) { 995 return (DDI_FAILURE); 996 } 997 ap = (ddi_acc_impl_t *)hp->ah_platform_private; 998 ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 999 impl_acc_hdl_init(hp); 1000 1001 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1002 #ifdef DDI_MAP_DEBUG 1003 ddi_map_debug("rootnex_map_regspec: mmap() " 1004 "to I/O space is not supported.\n"); 1005 #endif /* DDI_MAP_DEBUG */ 1006 return (DDI_ME_INVAL); 1007 } else { 1008 /* 1009 * 1275-compliant vs. compatibility i/o mapping 1010 */ 1011 *vaddrp = 1012 (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 1013 ((caddr_t)(uintptr_t)rp->regspec_bustype) : 1014 ((caddr_t)(uintptr_t)rp->regspec_addr); 1015 #ifdef __xpv 1016 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1017 hp->ah_pfn = xen_assign_pfn( 1018 mmu_btop((ulong_t)rp->regspec_addr & 1019 MMU_PAGEMASK)); 1020 } else { 1021 hp->ah_pfn = mmu_btop( 1022 (ulong_t)rp->regspec_addr & MMU_PAGEMASK); 1023 } 1024 #else 1025 hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr & 1026 MMU_PAGEMASK); 1027 #endif 1028 hp->ah_pnum = mmu_btopr(rp->regspec_size + 1029 (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET); 1030 } 1031 1032 #ifdef DDI_MAP_DEBUG 1033 ddi_map_debug( 1034 "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 1035 rp->regspec_size, *vaddrp); 1036 #endif /* DDI_MAP_DEBUG */ 1037 return (DDI_SUCCESS); 1038 } 1039 1040 /* 1041 * Memory space 1042 */ 1043 1044 if (hp != NULL) { 1045 /* 1046 * hat layer ignores 1047 * hp->ah_acc.devacc_attr_endian_flags. 1048 */ 1049 switch (hp->ah_acc.devacc_attr_dataorder) { 1050 case DDI_STRICTORDER_ACC: 1051 hat_acc_flags = HAT_STRICTORDER; 1052 break; 1053 case DDI_UNORDERED_OK_ACC: 1054 hat_acc_flags = HAT_UNORDERED_OK; 1055 break; 1056 case DDI_MERGING_OK_ACC: 1057 hat_acc_flags = HAT_MERGING_OK; 1058 break; 1059 case DDI_LOADCACHING_OK_ACC: 1060 hat_acc_flags = HAT_LOADCACHING_OK; 1061 break; 1062 case DDI_STORECACHING_OK_ACC: 1063 hat_acc_flags = HAT_STORECACHING_OK; 1064 break; 1065 } 1066 ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1067 ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 1068 impl_acc_hdl_init(hp); 1069 hp->ah_hat_flags = hat_acc_flags; 1070 } else { 1071 hat_acc_flags = HAT_STRICTORDER; 1072 } 1073 1074 rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK); 1075 #ifdef __xpv 1076 /* 1077 * If we're dom0, we're using a real device so we need to translate 1078 * the MA to a PA. 1079 */ 1080 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1081 pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))); 1082 } else { 1083 pbase = rbase; 1084 } 1085 #else 1086 pbase = rbase; 1087 #endif 1088 pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1089 1090 if (rp->regspec_size == 0) { 1091 #ifdef DDI_MAP_DEBUG 1092 ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 1093 #endif /* DDI_MAP_DEBUG */ 1094 return (DDI_ME_INVAL); 1095 } 1096 1097 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1098 /* extra cast to make gcc happy */ 1099 *vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase)); 1100 } else { 1101 npages = mmu_btopr(rp->regspec_size + pgoffset); 1102 1103 #ifdef DDI_MAP_DEBUG 1104 ddi_map_debug("rootnex_map_regspec: Mapping %d pages " 1105 "physical %llx", npages, pbase); 1106 #endif /* DDI_MAP_DEBUG */ 1107 1108 cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 1109 if (cvaddr == NULL) 1110 return (DDI_ME_NORESOURCES); 1111 1112 /* 1113 * Now map in the pages we've allocated... 1114 */ 1115 hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), 1116 mmu_btop(pbase), mp->map_prot | hat_acc_flags, 1117 HAT_LOAD_LOCK); 1118 *vaddrp = (caddr_t)cvaddr + pgoffset; 1119 1120 /* save away pfn and npages for FMA */ 1121 hp = mp->map_handlep; 1122 if (hp) { 1123 hp->ah_pfn = mmu_btop(pbase); 1124 hp->ah_pnum = npages; 1125 } 1126 } 1127 1128 #ifdef DDI_MAP_DEBUG 1129 ddi_map_debug("at virtual 0x%x\n", *vaddrp); 1130 #endif /* DDI_MAP_DEBUG */ 1131 return (DDI_SUCCESS); 1132 } 1133 1134 1135 /* 1136 * rootnex_unmap_regspec() 1137 * 1138 */ 1139 static int 1140 rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1141 { 1142 caddr_t addr = (caddr_t)*vaddrp; 1143 uint_t npages, pgoffset; 1144 struct regspec *rp; 1145 1146 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 1147 return (0); 1148 1149 rp = mp->map_obj.rp; 1150 1151 if (rp->regspec_size == 0) { 1152 #ifdef DDI_MAP_DEBUG 1153 ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 1154 #endif /* DDI_MAP_DEBUG */ 1155 return (DDI_ME_INVAL); 1156 } 1157 1158 /* 1159 * I/O or memory mapping: 1160 * 1161 * <bustype=0, addr=x, len=x>: memory 1162 * <bustype=1, addr=x, len=x>: i/o 1163 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1164 */ 1165 if (rp->regspec_bustype != 0) { 1166 /* 1167 * This is I/O space, which requires no particular 1168 * processing on unmap since it isn't mapped in the 1169 * first place. 1170 */ 1171 return (DDI_SUCCESS); 1172 } 1173 1174 /* 1175 * Memory space 1176 */ 1177 pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 1178 npages = mmu_btopr(rp->regspec_size + pgoffset); 1179 hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 1180 device_arena_free(addr - pgoffset, ptob(npages)); 1181 1182 /* 1183 * Destroy the pointer - the mapping has logically gone 1184 */ 1185 *vaddrp = NULL; 1186 1187 return (DDI_SUCCESS); 1188 } 1189 1190 1191 /* 1192 * rootnex_map_handle() 1193 * 1194 */ 1195 static int 1196 rootnex_map_handle(ddi_map_req_t *mp) 1197 { 1198 rootnex_addr_t rbase; 1199 ddi_acc_hdl_t *hp; 1200 uint_t pgoffset; 1201 struct regspec *rp; 1202 paddr_t pbase; 1203 1204 rp = mp->map_obj.rp; 1205 1206 #ifdef DDI_MAP_DEBUG 1207 ddi_map_debug( 1208 "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 1209 rp->regspec_bustype, rp->regspec_addr, 1210 rp->regspec_size, mp->map_handlep); 1211 #endif /* DDI_MAP_DEBUG */ 1212 1213 /* 1214 * I/O or memory mapping: 1215 * 1216 * <bustype=0, addr=x, len=x>: memory 1217 * <bustype=1, addr=x, len=x>: i/o 1218 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1219 */ 1220 if (rp->regspec_bustype != 0) { 1221 /* 1222 * This refers to I/O space, and we don't support "mapping" 1223 * I/O space to a user. 1224 */ 1225 return (DDI_FAILURE); 1226 } 1227 1228 /* 1229 * Set up the hat_flags for the mapping. 1230 */ 1231 hp = mp->map_handlep; 1232 1233 switch (hp->ah_acc.devacc_attr_endian_flags) { 1234 case DDI_NEVERSWAP_ACC: 1235 hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 1236 break; 1237 case DDI_STRUCTURE_LE_ACC: 1238 hp->ah_hat_flags = HAT_STRUCTURE_LE; 1239 break; 1240 case DDI_STRUCTURE_BE_ACC: 1241 return (DDI_FAILURE); 1242 default: 1243 return (DDI_REGS_ACC_CONFLICT); 1244 } 1245 1246 switch (hp->ah_acc.devacc_attr_dataorder) { 1247 case DDI_STRICTORDER_ACC: 1248 break; 1249 case DDI_UNORDERED_OK_ACC: 1250 hp->ah_hat_flags |= HAT_UNORDERED_OK; 1251 break; 1252 case DDI_MERGING_OK_ACC: 1253 hp->ah_hat_flags |= HAT_MERGING_OK; 1254 break; 1255 case DDI_LOADCACHING_OK_ACC: 1256 hp->ah_hat_flags |= HAT_LOADCACHING_OK; 1257 break; 1258 case DDI_STORECACHING_OK_ACC: 1259 hp->ah_hat_flags |= HAT_STORECACHING_OK; 1260 break; 1261 default: 1262 return (DDI_FAILURE); 1263 } 1264 1265 rbase = (rootnex_addr_t)rp->regspec_addr & 1266 (~(rootnex_addr_t)MMU_PAGEOFFSET); 1267 pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1268 1269 if (rp->regspec_size == 0) 1270 return (DDI_ME_INVAL); 1271 1272 #ifdef __xpv 1273 /* 1274 * If we're dom0, we're using a real device so we need to translate 1275 * the MA to a PA. 1276 */ 1277 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1278 pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) | 1279 (rbase & MMU_PAGEOFFSET); 1280 } else { 1281 pbase = rbase; 1282 } 1283 #else 1284 pbase = rbase; 1285 #endif 1286 1287 hp->ah_pfn = mmu_btop(pbase); 1288 hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 1289 1290 return (DDI_SUCCESS); 1291 } 1292 1293 1294 1295 /* 1296 * ************************ 1297 * interrupt related code 1298 * ************************ 1299 */ 1300 1301 /* 1302 * rootnex_intr_ops() 1303 * bus_intr_op() function for interrupt support 1304 */ 1305 /* ARGSUSED */ 1306 static int 1307 rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 1308 ddi_intr_handle_impl_t *hdlp, void *result) 1309 { 1310 struct intrspec *ispec; 1311 struct ddi_parent_private_data *pdp; 1312 1313 DDI_INTR_NEXDBG((CE_CONT, 1314 "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 1315 (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 1316 1317 /* Process the interrupt operation */ 1318 switch (intr_op) { 1319 case DDI_INTROP_GETCAP: 1320 /* First check with pcplusmp */ 1321 if (psm_intr_ops == NULL) 1322 return (DDI_FAILURE); 1323 1324 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 1325 *(int *)result = 0; 1326 return (DDI_FAILURE); 1327 } 1328 break; 1329 case DDI_INTROP_SETCAP: 1330 if (psm_intr_ops == NULL) 1331 return (DDI_FAILURE); 1332 1333 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 1334 return (DDI_FAILURE); 1335 break; 1336 case DDI_INTROP_ALLOC: 1337 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1338 return (DDI_FAILURE); 1339 hdlp->ih_pri = ispec->intrspec_pri; 1340 *(int *)result = hdlp->ih_scratch1; 1341 break; 1342 case DDI_INTROP_FREE: 1343 pdp = ddi_get_parent_data(rdip); 1344 /* 1345 * Special case for 'pcic' driver' only. 1346 * If an intrspec was created for it, clean it up here 1347 * See detailed comments on this in the function 1348 * rootnex_get_ispec(). 1349 */ 1350 if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1351 kmem_free(pdp->par_intr, sizeof (struct intrspec) * 1352 pdp->par_nintr); 1353 /* 1354 * Set it to zero; so that 1355 * DDI framework doesn't free it again 1356 */ 1357 pdp->par_intr = NULL; 1358 pdp->par_nintr = 0; 1359 } 1360 break; 1361 case DDI_INTROP_GETPRI: 1362 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1363 return (DDI_FAILURE); 1364 *(int *)result = ispec->intrspec_pri; 1365 break; 1366 case DDI_INTROP_SETPRI: 1367 /* Validate the interrupt priority passed to us */ 1368 if (*(int *)result > LOCK_LEVEL) 1369 return (DDI_FAILURE); 1370 1371 /* Ensure that PSM is all initialized and ispec is ok */ 1372 if ((psm_intr_ops == NULL) || 1373 ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 1374 return (DDI_FAILURE); 1375 1376 /* Change the priority */ 1377 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 1378 PSM_FAILURE) 1379 return (DDI_FAILURE); 1380 1381 /* update the ispec with the new priority */ 1382 ispec->intrspec_pri = *(int *)result; 1383 break; 1384 case DDI_INTROP_ADDISR: 1385 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1386 return (DDI_FAILURE); 1387 ispec->intrspec_func = hdlp->ih_cb_func; 1388 break; 1389 case DDI_INTROP_REMISR: 1390 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1391 return (DDI_FAILURE); 1392 ispec->intrspec_func = (uint_t (*)()) 0; 1393 break; 1394 case DDI_INTROP_ENABLE: 1395 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1396 return (DDI_FAILURE); 1397 1398 /* Call psmi to translate irq with the dip */ 1399 if (psm_intr_ops == NULL) 1400 return (DDI_FAILURE); 1401 1402 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1403 (void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 1404 (int *)&hdlp->ih_vector); 1405 1406 /* Add the interrupt handler */ 1407 if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 1408 hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 1409 hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip)) 1410 return (DDI_FAILURE); 1411 break; 1412 case DDI_INTROP_DISABLE: 1413 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1414 return (DDI_FAILURE); 1415 1416 /* Call psm_ops() to translate irq with the dip */ 1417 if (psm_intr_ops == NULL) 1418 return (DDI_FAILURE); 1419 1420 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1421 (void) (*psm_intr_ops)(rdip, hdlp, 1422 PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 1423 1424 /* Remove the interrupt handler */ 1425 rem_avintr((void *)hdlp, ispec->intrspec_pri, 1426 hdlp->ih_cb_func, hdlp->ih_vector); 1427 break; 1428 case DDI_INTROP_SETMASK: 1429 if (psm_intr_ops == NULL) 1430 return (DDI_FAILURE); 1431 1432 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 1433 return (DDI_FAILURE); 1434 break; 1435 case DDI_INTROP_CLRMASK: 1436 if (psm_intr_ops == NULL) 1437 return (DDI_FAILURE); 1438 1439 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 1440 return (DDI_FAILURE); 1441 break; 1442 case DDI_INTROP_GETPENDING: 1443 if (psm_intr_ops == NULL) 1444 return (DDI_FAILURE); 1445 1446 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 1447 result)) { 1448 *(int *)result = 0; 1449 return (DDI_FAILURE); 1450 } 1451 break; 1452 case DDI_INTROP_NAVAIL: 1453 case DDI_INTROP_NINTRS: 1454 *(int *)result = i_ddi_get_intx_nintrs(rdip); 1455 if (*(int *)result == 0) { 1456 /* 1457 * Special case for 'pcic' driver' only. This driver 1458 * driver is a child of 'isa' and 'rootnex' drivers. 1459 * 1460 * See detailed comments on this in the function 1461 * rootnex_get_ispec(). 1462 * 1463 * Children of 'pcic' send 'NINITR' request all the 1464 * way to rootnex driver. But, the 'pdp->par_nintr' 1465 * field may not initialized. So, we fake it here 1466 * to return 1 (a la what PCMCIA nexus does). 1467 */ 1468 if (strcmp(ddi_get_name(rdip), "pcic") == 0) 1469 *(int *)result = 1; 1470 else 1471 return (DDI_FAILURE); 1472 } 1473 break; 1474 case DDI_INTROP_SUPPORTED_TYPES: 1475 *(int *)result = DDI_INTR_TYPE_FIXED; /* Always ... */ 1476 break; 1477 default: 1478 return (DDI_FAILURE); 1479 } 1480 1481 return (DDI_SUCCESS); 1482 } 1483 1484 1485 /* 1486 * rootnex_get_ispec() 1487 * convert an interrupt number to an interrupt specification. 1488 * The interrupt number determines which interrupt spec will be 1489 * returned if more than one exists. 1490 * 1491 * Look into the parent private data area of the 'rdip' to find out 1492 * the interrupt specification. First check to make sure there is 1493 * one that matchs "inumber" and then return a pointer to it. 1494 * 1495 * Return NULL if one could not be found. 1496 * 1497 * NOTE: This is needed for rootnex_intr_ops() 1498 */ 1499 static struct intrspec * 1500 rootnex_get_ispec(dev_info_t *rdip, int inum) 1501 { 1502 struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 1503 1504 /* 1505 * Special case handling for drivers that provide their own 1506 * intrspec structures instead of relying on the DDI framework. 1507 * 1508 * A broken hardware driver in ON could potentially provide its 1509 * own intrspec structure, instead of relying on the hardware. 1510 * If these drivers are children of 'rootnex' then we need to 1511 * continue to provide backward compatibility to them here. 1512 * 1513 * Following check is a special case for 'pcic' driver which 1514 * was found to have broken hardwre andby provides its own intrspec. 1515 * 1516 * Verbatim comments from this driver are shown here: 1517 * "Don't use the ddi_add_intr since we don't have a 1518 * default intrspec in all cases." 1519 * 1520 * Since an 'ispec' may not be always created for it, 1521 * check for that and create one if so. 1522 * 1523 * NOTE: Currently 'pcic' is the only driver found to do this. 1524 */ 1525 if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1526 pdp->par_nintr = 1; 1527 pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 1528 pdp->par_nintr, KM_SLEEP); 1529 } 1530 1531 /* Validate the interrupt number */ 1532 if (inum >= pdp->par_nintr) 1533 return (NULL); 1534 1535 /* Get the interrupt structure pointer and return that */ 1536 return ((struct intrspec *)&pdp->par_intr[inum]); 1537 } 1538 1539 1540 /* 1541 * ****************** 1542 * dma related code 1543 * ****************** 1544 */ 1545 1546 /* 1547 * rootnex_dma_allochdl() 1548 * called from ddi_dma_alloc_handle(). 1549 */ 1550 /*ARGSUSED*/ 1551 static int 1552 rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 1553 int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 1554 { 1555 uint64_t maxsegmentsize_ll; 1556 uint_t maxsegmentsize; 1557 ddi_dma_impl_t *hp; 1558 rootnex_dma_t *dma; 1559 uint64_t count_max; 1560 uint64_t seg; 1561 int kmflag; 1562 int e; 1563 1564 1565 /* convert our sleep flags */ 1566 if (waitfp == DDI_DMA_SLEEP) { 1567 kmflag = KM_SLEEP; 1568 } else { 1569 kmflag = KM_NOSLEEP; 1570 } 1571 1572 /* 1573 * We try to do only one memory allocation here. We'll do a little 1574 * pointer manipulation later. If the bind ends up taking more than 1575 * our prealloc's space, we'll have to allocate more memory in the 1576 * bind operation. Not great, but much better than before and the 1577 * best we can do with the current bind interfaces. 1578 */ 1579 hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 1580 if (hp == NULL) { 1581 if (waitfp != DDI_DMA_DONTWAIT) { 1582 ddi_set_callback(waitfp, arg, 1583 &rootnex_state->r_dvma_call_list_id); 1584 } 1585 return (DDI_DMA_NORESOURCES); 1586 } 1587 1588 /* Do our pointer manipulation now, align the structures */ 1589 hp->dmai_private = (void *)(((uintptr_t)hp + 1590 (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 1591 dma = (rootnex_dma_t *)hp->dmai_private; 1592 dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 1593 sizeof (rootnex_dma_t) + 0x7) & ~0x7); 1594 1595 /* setup the handle */ 1596 rootnex_clean_dmahdl(hp); 1597 dma->dp_dip = rdip; 1598 dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 1599 dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 1600 hp->dmai_minxfer = attr->dma_attr_minxfer; 1601 hp->dmai_burstsizes = attr->dma_attr_burstsizes; 1602 hp->dmai_rdip = rdip; 1603 hp->dmai_attr = *attr; 1604 1605 /* we don't need to worry about the SPL since we do a tryenter */ 1606 mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 1607 1608 /* 1609 * Figure out our maximum segment size. If the segment size is greater 1610 * than 4G, we will limit it to (4G - 1) since the max size of a dma 1611 * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 1612 * dma_attr_count_max are size-1 type values. 1613 * 1614 * Maximum segment size is the largest physically contiguous chunk of 1615 * memory that we can return from a bind (i.e. the maximum size of a 1616 * single cookie). 1617 */ 1618 1619 /* handle the rollover cases */ 1620 seg = attr->dma_attr_seg + 1; 1621 if (seg < attr->dma_attr_seg) { 1622 seg = attr->dma_attr_seg; 1623 } 1624 count_max = attr->dma_attr_count_max + 1; 1625 if (count_max < attr->dma_attr_count_max) { 1626 count_max = attr->dma_attr_count_max; 1627 } 1628 1629 /* 1630 * granularity may or may not be a power of two. If it isn't, we can't 1631 * use a simple mask. 1632 */ 1633 if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) { 1634 dma->dp_granularity_power_2 = B_FALSE; 1635 } else { 1636 dma->dp_granularity_power_2 = B_TRUE; 1637 } 1638 1639 /* 1640 * maxxfer should be a whole multiple of granularity. If we're going to 1641 * break up a window because we're greater than maxxfer, we might as 1642 * well make sure it's maxxfer is a whole multiple so we don't have to 1643 * worry about triming the window later on for this case. 1644 */ 1645 if (attr->dma_attr_granular > 1) { 1646 if (dma->dp_granularity_power_2) { 1647 dma->dp_maxxfer = attr->dma_attr_maxxfer - 1648 (attr->dma_attr_maxxfer & 1649 (attr->dma_attr_granular - 1)); 1650 } else { 1651 dma->dp_maxxfer = attr->dma_attr_maxxfer - 1652 (attr->dma_attr_maxxfer % attr->dma_attr_granular); 1653 } 1654 } else { 1655 dma->dp_maxxfer = attr->dma_attr_maxxfer; 1656 } 1657 1658 maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 1659 maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 1660 if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 1661 maxsegmentsize = 0xFFFFFFFF; 1662 } else { 1663 maxsegmentsize = maxsegmentsize_ll; 1664 } 1665 dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 1666 dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 1667 1668 /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1669 if (rootnex_alloc_check_parms) { 1670 e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 1671 if (e != DDI_SUCCESS) { 1672 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 1673 (void) rootnex_dma_freehdl(dip, rdip, 1674 (ddi_dma_handle_t)hp); 1675 return (e); 1676 } 1677 } 1678 1679 *handlep = (ddi_dma_handle_t)hp; 1680 1681 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1682 DTRACE_PROBE1(rootnex__alloc__handle, uint64_t, 1683 rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1684 1685 return (DDI_SUCCESS); 1686 } 1687 1688 1689 /* 1690 * rootnex_dma_freehdl() 1691 * called from ddi_dma_free_handle(). 1692 */ 1693 /*ARGSUSED*/ 1694 static int 1695 rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 1696 { 1697 ddi_dma_impl_t *hp; 1698 rootnex_dma_t *dma; 1699 1700 1701 hp = (ddi_dma_impl_t *)handle; 1702 dma = (rootnex_dma_t *)hp->dmai_private; 1703 1704 /* unbind should have been called first */ 1705 ASSERT(!dma->dp_inuse); 1706 1707 mutex_destroy(&dma->dp_mutex); 1708 kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 1709 1710 ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1711 DTRACE_PROBE1(rootnex__free__handle, uint64_t, 1712 rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1713 1714 if (rootnex_state->r_dvma_call_list_id) 1715 ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1716 1717 return (DDI_SUCCESS); 1718 } 1719 1720 1721 /* 1722 * rootnex_dma_bindhdl() 1723 * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 1724 */ 1725 /*ARGSUSED*/ 1726 static int 1727 rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 1728 struct ddi_dma_req *dmareq, ddi_dma_cookie_t *cookiep, uint_t *ccountp) 1729 { 1730 rootnex_sglinfo_t *sinfo; 1731 ddi_dma_attr_t *attr; 1732 ddi_dma_impl_t *hp; 1733 rootnex_dma_t *dma; 1734 int kmflag; 1735 int e; 1736 1737 1738 hp = (ddi_dma_impl_t *)handle; 1739 dma = (rootnex_dma_t *)hp->dmai_private; 1740 sinfo = &dma->dp_sglinfo; 1741 attr = &hp->dmai_attr; 1742 1743 hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 1744 1745 /* 1746 * This is useful for debugging a driver. Not as useful in a production 1747 * system. The only time this will fail is if you have a driver bug. 1748 */ 1749 if (rootnex_bind_check_inuse) { 1750 /* 1751 * No one else should ever have this lock unless someone else 1752 * is trying to use this handle. So contention on the lock 1753 * is the same as inuse being set. 1754 */ 1755 e = mutex_tryenter(&dma->dp_mutex); 1756 if (e == 0) { 1757 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1758 return (DDI_DMA_INUSE); 1759 } 1760 if (dma->dp_inuse) { 1761 mutex_exit(&dma->dp_mutex); 1762 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1763 return (DDI_DMA_INUSE); 1764 } 1765 dma->dp_inuse = B_TRUE; 1766 mutex_exit(&dma->dp_mutex); 1767 } 1768 1769 /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1770 if (rootnex_bind_check_parms) { 1771 e = rootnex_valid_bind_parms(dmareq, attr); 1772 if (e != DDI_SUCCESS) { 1773 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1774 rootnex_clean_dmahdl(hp); 1775 return (e); 1776 } 1777 } 1778 1779 /* save away the original bind info */ 1780 dma->dp_dma = dmareq->dmar_object; 1781 1782 if (rootnex_state->r_intel_iommu_enabled) { 1783 e = intel_iommu_map_sgl(handle, dmareq, 1784 rootnex_state->r_prealloc_cookies); 1785 1786 switch (e) { 1787 case IOMMU_SGL_SUCCESS: 1788 goto rootnex_sgl_end; 1789 1790 case IOMMU_SGL_DISABLE: 1791 goto rootnex_sgl_start; 1792 1793 case IOMMU_SGL_NORESOURCES: 1794 cmn_err(CE_WARN, "iommu map sgl failed for %s", 1795 ddi_node_name(dma->dp_dip)); 1796 rootnex_clean_dmahdl(hp); 1797 return (DDI_DMA_NORESOURCES); 1798 1799 default: 1800 cmn_err(CE_WARN, 1801 "undefined value returned from" 1802 " intel_iommu_map_sgl: %d", 1803 e); 1804 rootnex_clean_dmahdl(hp); 1805 return (DDI_DMA_NORESOURCES); 1806 } 1807 } 1808 1809 rootnex_sgl_start: 1810 /* 1811 * Figure out a rough estimate of what maximum number of pages this 1812 * buffer could use (a high estimate of course). 1813 */ 1814 sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 1815 1816 /* 1817 * We'll use the pre-allocated cookies for any bind that will *always* 1818 * fit (more important to be consistent, we don't want to create 1819 * additional degenerate cases). 1820 */ 1821 if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 1822 dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 1823 dma->dp_need_to_free_cookie = B_FALSE; 1824 DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 1825 uint_t, sinfo->si_max_pages); 1826 1827 /* 1828 * For anything larger than that, we'll go ahead and allocate the 1829 * maximum number of pages we expect to see. Hopefuly, we won't be 1830 * seeing this path in the fast path for high performance devices very 1831 * frequently. 1832 * 1833 * a ddi bind interface that allowed the driver to provide storage to 1834 * the bind interface would speed this case up. 1835 */ 1836 } else { 1837 /* convert the sleep flags */ 1838 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1839 kmflag = KM_SLEEP; 1840 } else { 1841 kmflag = KM_NOSLEEP; 1842 } 1843 1844 /* 1845 * Save away how much memory we allocated. If we're doing a 1846 * nosleep, the alloc could fail... 1847 */ 1848 dma->dp_cookie_size = sinfo->si_max_pages * 1849 sizeof (ddi_dma_cookie_t); 1850 dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 1851 if (dma->dp_cookies == NULL) { 1852 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1853 rootnex_clean_dmahdl(hp); 1854 return (DDI_DMA_NORESOURCES); 1855 } 1856 dma->dp_need_to_free_cookie = B_TRUE; 1857 DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t, 1858 sinfo->si_max_pages); 1859 } 1860 hp->dmai_cookie = dma->dp_cookies; 1861 1862 /* 1863 * Get the real sgl. rootnex_get_sgl will fill in cookie array while 1864 * looking at the contraints in the dma structure. It will then put some 1865 * additional state about the sgl in the dma struct (i.e. is the sgl 1866 * clean, or do we need to do some munging; how many pages need to be 1867 * copied, etc.) 1868 */ 1869 rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies, 1870 &dma->dp_sglinfo); 1871 1872 rootnex_sgl_end: 1873 ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 1874 /* if we don't need a copy buffer, we don't need to sync */ 1875 if (sinfo->si_copybuf_req == 0) { 1876 hp->dmai_rflags |= DMP_NOSYNC; 1877 } 1878 1879 /* 1880 * if we don't need the copybuf and we don't need to do a partial, we 1881 * hit the fast path. All the high performance devices should be trying 1882 * to hit this path. To hit this path, a device should be able to reach 1883 * all of memory, shouldn't try to bind more than it can transfer, and 1884 * the buffer shouldn't require more cookies than the driver/device can 1885 * handle [sgllen]). 1886 */ 1887 if ((sinfo->si_copybuf_req == 0) && 1888 (sinfo->si_sgl_size <= attr->dma_attr_sgllen) && 1889 (dma->dp_dma.dmao_size < dma->dp_maxxfer)) { 1890 /* 1891 * If the driver supports FMA, insert the handle in the FMA DMA 1892 * handle cache. 1893 */ 1894 if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 1895 hp->dmai_error.err_cf = rootnex_dma_check; 1896 (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 1897 } 1898 1899 /* 1900 * copy out the first cookie and ccountp, set the cookie 1901 * pointer to the second cookie. The first cookie is passed 1902 * back on the stack. Additional cookies are accessed via 1903 * ddi_dma_nextcookie() 1904 */ 1905 *cookiep = dma->dp_cookies[0]; 1906 *ccountp = sinfo->si_sgl_size; 1907 hp->dmai_cookie++; 1908 hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 1909 hp->dmai_nwin = 1; 1910 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1911 DTRACE_PROBE3(rootnex__bind__fast, dev_info_t *, rdip, uint64_t, 1912 rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 1913 dma->dp_dma.dmao_size); 1914 return (DDI_DMA_MAPPED); 1915 } 1916 1917 /* 1918 * go to the slow path, we may need to alloc more memory, create 1919 * multiple windows, and munge up a sgl to make the device happy. 1920 */ 1921 e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag); 1922 if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 1923 if (dma->dp_need_to_free_cookie) { 1924 kmem_free(dma->dp_cookies, dma->dp_cookie_size); 1925 } 1926 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1927 rootnex_clean_dmahdl(hp); /* must be after free cookie */ 1928 return (e); 1929 } 1930 1931 /* 1932 * If the driver supports FMA, insert the handle in the FMA DMA handle 1933 * cache. 1934 */ 1935 if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 1936 hp->dmai_error.err_cf = rootnex_dma_check; 1937 (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 1938 } 1939 1940 /* if the first window uses the copy buffer, sync it for the device */ 1941 if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 1942 (hp->dmai_rflags & DDI_DMA_WRITE)) { 1943 (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 1944 DDI_DMA_SYNC_FORDEV); 1945 } 1946 1947 /* 1948 * copy out the first cookie and ccountp, set the cookie pointer to the 1949 * second cookie. Make sure the partial flag is set/cleared correctly. 1950 * If we have a partial map (i.e. multiple windows), the number of 1951 * cookies we return is the number of cookies in the first window. 1952 */ 1953 if (e == DDI_DMA_MAPPED) { 1954 hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 1955 *ccountp = sinfo->si_sgl_size; 1956 } else { 1957 hp->dmai_rflags |= DDI_DMA_PARTIAL; 1958 *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 1959 ASSERT(hp->dmai_nwin <= dma->dp_max_win); 1960 } 1961 *cookiep = dma->dp_cookies[0]; 1962 hp->dmai_cookie++; 1963 1964 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1965 DTRACE_PROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 1966 rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 1967 dma->dp_dma.dmao_size); 1968 return (e); 1969 } 1970 1971 1972 /* 1973 * rootnex_dma_unbindhdl() 1974 * called from ddi_dma_unbind_handle() 1975 */ 1976 /*ARGSUSED*/ 1977 static int 1978 rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 1979 ddi_dma_handle_t handle) 1980 { 1981 ddi_dma_impl_t *hp; 1982 rootnex_dma_t *dma; 1983 int e; 1984 1985 1986 hp = (ddi_dma_impl_t *)handle; 1987 dma = (rootnex_dma_t *)hp->dmai_private; 1988 1989 /* make sure the buffer wasn't free'd before calling unbind */ 1990 if (rootnex_unbind_verify_buffer) { 1991 e = rootnex_verify_buffer(dma); 1992 if (e != DDI_SUCCESS) { 1993 ASSERT(0); 1994 return (DDI_FAILURE); 1995 } 1996 } 1997 1998 /* sync the current window before unbinding the buffer */ 1999 if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 2000 (hp->dmai_rflags & DDI_DMA_READ)) { 2001 (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 2002 DDI_DMA_SYNC_FORCPU); 2003 } 2004 2005 /* 2006 * If the driver supports FMA, remove the handle in the FMA DMA handle 2007 * cache. 2008 */ 2009 if (hp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) { 2010 if ((DEVI(rdip)->devi_fmhdl != NULL) && 2011 (DDI_FM_DMA_ERR_CAP(DEVI(rdip)->devi_fmhdl->fh_cap))) { 2012 (void) ndi_fmc_remove(rdip, DMA_HANDLE, hp); 2013 } 2014 } 2015 2016 /* 2017 * cleanup and copy buffer or window state. if we didn't use the copy 2018 * buffer or windows, there won't be much to do :-) 2019 */ 2020 rootnex_teardown_copybuf(dma); 2021 rootnex_teardown_windows(dma); 2022 2023 /* 2024 * If intel iommu enabled, clean up the page tables and free the dvma 2025 */ 2026 if (rootnex_state->r_intel_iommu_enabled) { 2027 intel_iommu_unmap_sgl(handle); 2028 } 2029 2030 /* 2031 * If we had to allocate space to for the worse case sgl (it didn't 2032 * fit into our pre-allocate buffer), free that up now 2033 */ 2034 if (dma->dp_need_to_free_cookie) { 2035 kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2036 } 2037 2038 /* 2039 * clean up the handle so it's ready for the next bind (i.e. if the 2040 * handle is reused). 2041 */ 2042 rootnex_clean_dmahdl(hp); 2043 2044 if (rootnex_state->r_dvma_call_list_id) 2045 ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 2046 2047 ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2048 DTRACE_PROBE1(rootnex__unbind, uint64_t, 2049 rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2050 2051 return (DDI_SUCCESS); 2052 } 2053 2054 2055 /* 2056 * rootnex_verify_buffer() 2057 * verify buffer wasn't free'd 2058 */ 2059 static int 2060 rootnex_verify_buffer(rootnex_dma_t *dma) 2061 { 2062 page_t **pplist; 2063 caddr_t vaddr; 2064 uint_t pcnt; 2065 uint_t poff; 2066 page_t *pp; 2067 char b; 2068 int i; 2069 2070 /* Figure out how many pages this buffer occupies */ 2071 if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 2072 poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 2073 } else { 2074 vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 2075 poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2076 } 2077 pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 2078 2079 switch (dma->dp_dma.dmao_type) { 2080 case DMA_OTYP_PAGES: 2081 /* 2082 * for a linked list of pp's walk through them to make sure 2083 * they're locked and not free. 2084 */ 2085 pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 2086 for (i = 0; i < pcnt; i++) { 2087 if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 2088 return (DDI_FAILURE); 2089 } 2090 pp = pp->p_next; 2091 } 2092 break; 2093 2094 case DMA_OTYP_VADDR: 2095 case DMA_OTYP_BUFVADDR: 2096 pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 2097 /* 2098 * for an array of pp's walk through them to make sure they're 2099 * not free. It's possible that they may not be locked. 2100 */ 2101 if (pplist) { 2102 for (i = 0; i < pcnt; i++) { 2103 if (PP_ISFREE(pplist[i])) { 2104 return (DDI_FAILURE); 2105 } 2106 } 2107 2108 /* For a virtual address, try to peek at each page */ 2109 } else { 2110 if (dma->dp_sglinfo.si_asp == &kas) { 2111 for (i = 0; i < pcnt; i++) { 2112 if (ddi_peek8(NULL, vaddr, &b) == 2113 DDI_FAILURE) 2114 return (DDI_FAILURE); 2115 vaddr += MMU_PAGESIZE; 2116 } 2117 } 2118 } 2119 break; 2120 2121 default: 2122 ASSERT(0); 2123 break; 2124 } 2125 2126 return (DDI_SUCCESS); 2127 } 2128 2129 2130 /* 2131 * rootnex_clean_dmahdl() 2132 * Clean the dma handle. This should be called on a handle alloc and an 2133 * unbind handle. Set the handle state to the default settings. 2134 */ 2135 static void 2136 rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 2137 { 2138 rootnex_dma_t *dma; 2139 2140 2141 dma = (rootnex_dma_t *)hp->dmai_private; 2142 2143 hp->dmai_nwin = 0; 2144 dma->dp_current_cookie = 0; 2145 dma->dp_copybuf_size = 0; 2146 dma->dp_window = NULL; 2147 dma->dp_cbaddr = NULL; 2148 dma->dp_inuse = B_FALSE; 2149 dma->dp_need_to_free_cookie = B_FALSE; 2150 dma->dp_need_to_free_window = B_FALSE; 2151 dma->dp_partial_required = B_FALSE; 2152 dma->dp_trim_required = B_FALSE; 2153 dma->dp_sglinfo.si_copybuf_req = 0; 2154 #if !defined(__amd64) 2155 dma->dp_cb_remaping = B_FALSE; 2156 dma->dp_kva = NULL; 2157 #endif 2158 2159 /* FMA related initialization */ 2160 hp->dmai_fault = 0; 2161 hp->dmai_fault_check = NULL; 2162 hp->dmai_fault_notify = NULL; 2163 hp->dmai_error.err_ena = 0; 2164 hp->dmai_error.err_status = DDI_FM_OK; 2165 hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 2166 hp->dmai_error.err_ontrap = NULL; 2167 hp->dmai_error.err_fep = NULL; 2168 hp->dmai_error.err_cf = NULL; 2169 } 2170 2171 2172 /* 2173 * rootnex_valid_alloc_parms() 2174 * Called in ddi_dma_alloc_handle path to validate its parameters. 2175 */ 2176 static int 2177 rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 2178 { 2179 if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 2180 (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 2181 (attr->dma_attr_granular > MMU_PAGESIZE) || 2182 (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 2183 return (DDI_DMA_BADATTR); 2184 } 2185 2186 if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 2187 return (DDI_DMA_BADATTR); 2188 } 2189 2190 if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 2191 MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 2192 attr->dma_attr_sgllen <= 0) { 2193 return (DDI_DMA_BADATTR); 2194 } 2195 2196 /* We should be able to DMA into every byte offset in a page */ 2197 if (maxsegmentsize < MMU_PAGESIZE) { 2198 return (DDI_DMA_BADATTR); 2199 } 2200 2201 return (DDI_SUCCESS); 2202 } 2203 2204 2205 /* 2206 * rootnex_valid_bind_parms() 2207 * Called in ddi_dma_*_bind_handle path to validate its parameters. 2208 */ 2209 /* ARGSUSED */ 2210 static int 2211 rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 2212 { 2213 #if !defined(__amd64) 2214 /* 2215 * we only support up to a 2G-1 transfer size on 32-bit kernels so 2216 * we can track the offset for the obsoleted interfaces. 2217 */ 2218 if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 2219 return (DDI_DMA_TOOBIG); 2220 } 2221 #endif 2222 2223 return (DDI_SUCCESS); 2224 } 2225 2226 2227 /* 2228 * rootnex_get_sgl() 2229 * Called in bind fastpath to get the sgl. Most of this will be replaced 2230 * with a call to the vm layer when vm2.0 comes around... 2231 */ 2232 static void 2233 rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 2234 rootnex_sglinfo_t *sglinfo) 2235 { 2236 ddi_dma_atyp_t buftype; 2237 rootnex_addr_t raddr; 2238 uint64_t last_page; 2239 uint64_t offset; 2240 uint64_t addrhi; 2241 uint64_t addrlo; 2242 uint64_t maxseg; 2243 page_t **pplist; 2244 uint64_t paddr; 2245 uint32_t psize; 2246 uint32_t size; 2247 caddr_t vaddr; 2248 uint_t pcnt; 2249 page_t *pp; 2250 uint_t cnt; 2251 2252 2253 /* shortcuts */ 2254 pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2255 vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2256 maxseg = sglinfo->si_max_cookie_size; 2257 buftype = dmar_object->dmao_type; 2258 addrhi = sglinfo->si_max_addr; 2259 addrlo = sglinfo->si_min_addr; 2260 size = dmar_object->dmao_size; 2261 2262 pcnt = 0; 2263 cnt = 0; 2264 2265 /* 2266 * if we were passed down a linked list of pages, i.e. pointer to 2267 * page_t, use this to get our physical address and buf offset. 2268 */ 2269 if (buftype == DMA_OTYP_PAGES) { 2270 pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2271 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2272 offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2273 MMU_PAGEOFFSET; 2274 paddr = pfn_to_pa(pp->p_pagenum) + offset; 2275 psize = MIN(size, (MMU_PAGESIZE - offset)); 2276 pp = pp->p_next; 2277 sglinfo->si_asp = NULL; 2278 2279 /* 2280 * We weren't passed down a linked list of pages, but if we were passed 2281 * down an array of pages, use this to get our physical address and buf 2282 * offset. 2283 */ 2284 } else if (pplist != NULL) { 2285 ASSERT((buftype == DMA_OTYP_VADDR) || 2286 (buftype == DMA_OTYP_BUFVADDR)); 2287 2288 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2289 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2290 if (sglinfo->si_asp == NULL) { 2291 sglinfo->si_asp = &kas; 2292 } 2293 2294 ASSERT(!PP_ISFREE(pplist[pcnt])); 2295 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2296 paddr += offset; 2297 psize = MIN(size, (MMU_PAGESIZE - offset)); 2298 pcnt++; 2299 2300 /* 2301 * All we have is a virtual address, we'll need to call into the VM 2302 * to get the physical address. 2303 */ 2304 } else { 2305 ASSERT((buftype == DMA_OTYP_VADDR) || 2306 (buftype == DMA_OTYP_BUFVADDR)); 2307 2308 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2309 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2310 if (sglinfo->si_asp == NULL) { 2311 sglinfo->si_asp = &kas; 2312 } 2313 2314 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2315 paddr += offset; 2316 psize = MIN(size, (MMU_PAGESIZE - offset)); 2317 vaddr += psize; 2318 } 2319 2320 #ifdef __xpv 2321 /* 2322 * If we're dom0, we're using a real device so we need to load 2323 * the cookies with MFNs instead of PFNs. 2324 */ 2325 raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 2326 #else 2327 raddr = paddr; 2328 #endif 2329 2330 /* 2331 * Setup the first cookie with the physical address of the page and the 2332 * size of the page (which takes into account the initial offset into 2333 * the page. 2334 */ 2335 sgl[cnt].dmac_laddress = raddr; 2336 sgl[cnt].dmac_size = psize; 2337 sgl[cnt].dmac_type = 0; 2338 2339 /* 2340 * Save away the buffer offset into the page. We'll need this later in 2341 * the copy buffer code to help figure out the page index within the 2342 * buffer and the offset into the current page. 2343 */ 2344 sglinfo->si_buf_offset = offset; 2345 2346 /* 2347 * If the DMA engine can't reach the physical address, increase how 2348 * much copy buffer we need. We always increase by pagesize so we don't 2349 * have to worry about converting offsets. Set a flag in the cookies 2350 * dmac_type to indicate that it uses the copy buffer. If this isn't the 2351 * last cookie, go to the next cookie (since we separate each page which 2352 * uses the copy buffer in case the copy buffer is not physically 2353 * contiguous. 2354 */ 2355 if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2356 sglinfo->si_copybuf_req += MMU_PAGESIZE; 2357 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2358 if ((cnt + 1) < sglinfo->si_max_pages) { 2359 cnt++; 2360 sgl[cnt].dmac_laddress = 0; 2361 sgl[cnt].dmac_size = 0; 2362 sgl[cnt].dmac_type = 0; 2363 } 2364 } 2365 2366 /* 2367 * save this page's physical address so we can figure out if the next 2368 * page is physically contiguous. Keep decrementing size until we are 2369 * done with the buffer. 2370 */ 2371 last_page = raddr & MMU_PAGEMASK; 2372 size -= psize; 2373 2374 while (size > 0) { 2375 /* Get the size for this page (i.e. partial or full page) */ 2376 psize = MIN(size, MMU_PAGESIZE); 2377 2378 if (buftype == DMA_OTYP_PAGES) { 2379 /* get the paddr from the page_t */ 2380 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2381 paddr = pfn_to_pa(pp->p_pagenum); 2382 pp = pp->p_next; 2383 } else if (pplist != NULL) { 2384 /* index into the array of page_t's to get the paddr */ 2385 ASSERT(!PP_ISFREE(pplist[pcnt])); 2386 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2387 pcnt++; 2388 } else { 2389 /* call into the VM to get the paddr */ 2390 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, 2391 vaddr)); 2392 vaddr += psize; 2393 } 2394 2395 #ifdef __xpv 2396 /* 2397 * If we're dom0, we're using a real device so we need to load 2398 * the cookies with MFNs instead of PFNs. 2399 */ 2400 raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 2401 #else 2402 raddr = paddr; 2403 #endif 2404 2405 /* check to see if this page needs the copy buffer */ 2406 if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2407 sglinfo->si_copybuf_req += MMU_PAGESIZE; 2408 2409 /* 2410 * if there is something in the current cookie, go to 2411 * the next one. We only want one page in a cookie which 2412 * uses the copybuf since the copybuf doesn't have to 2413 * be physically contiguous. 2414 */ 2415 if (sgl[cnt].dmac_size != 0) { 2416 cnt++; 2417 } 2418 sgl[cnt].dmac_laddress = raddr; 2419 sgl[cnt].dmac_size = psize; 2420 #if defined(__amd64) 2421 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2422 #else 2423 /* 2424 * save the buf offset for 32-bit kernel. used in the 2425 * obsoleted interfaces. 2426 */ 2427 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 2428 (dmar_object->dmao_size - size); 2429 #endif 2430 /* if this isn't the last cookie, go to the next one */ 2431 if ((cnt + 1) < sglinfo->si_max_pages) { 2432 cnt++; 2433 sgl[cnt].dmac_laddress = 0; 2434 sgl[cnt].dmac_size = 0; 2435 sgl[cnt].dmac_type = 0; 2436 } 2437 2438 /* 2439 * this page didn't need the copy buffer, if it's not physically 2440 * contiguous, or it would put us over a segment boundary, or it 2441 * puts us over the max cookie size, or the current sgl doesn't 2442 * have anything in it. 2443 */ 2444 } else if (((last_page + MMU_PAGESIZE) != raddr) || 2445 !(raddr & sglinfo->si_segmask) || 2446 ((sgl[cnt].dmac_size + psize) > maxseg) || 2447 (sgl[cnt].dmac_size == 0)) { 2448 /* 2449 * if we're not already in a new cookie, go to the next 2450 * cookie. 2451 */ 2452 if (sgl[cnt].dmac_size != 0) { 2453 cnt++; 2454 } 2455 2456 /* save the cookie information */ 2457 sgl[cnt].dmac_laddress = raddr; 2458 sgl[cnt].dmac_size = psize; 2459 #if defined(__amd64) 2460 sgl[cnt].dmac_type = 0; 2461 #else 2462 /* 2463 * save the buf offset for 32-bit kernel. used in the 2464 * obsoleted interfaces. 2465 */ 2466 sgl[cnt].dmac_type = dmar_object->dmao_size - size; 2467 #endif 2468 2469 /* 2470 * this page didn't need the copy buffer, it is physically 2471 * contiguous with the last page, and it's <= the max cookie 2472 * size. 2473 */ 2474 } else { 2475 sgl[cnt].dmac_size += psize; 2476 2477 /* 2478 * if this exactly == the maximum cookie size, and 2479 * it isn't the last cookie, go to the next cookie. 2480 */ 2481 if (((sgl[cnt].dmac_size + psize) == maxseg) && 2482 ((cnt + 1) < sglinfo->si_max_pages)) { 2483 cnt++; 2484 sgl[cnt].dmac_laddress = 0; 2485 sgl[cnt].dmac_size = 0; 2486 sgl[cnt].dmac_type = 0; 2487 } 2488 } 2489 2490 /* 2491 * save this page's physical address so we can figure out if the 2492 * next page is physically contiguous. Keep decrementing size 2493 * until we are done with the buffer. 2494 */ 2495 last_page = raddr; 2496 size -= psize; 2497 } 2498 2499 /* we're done, save away how many cookies the sgl has */ 2500 if (sgl[cnt].dmac_size == 0) { 2501 ASSERT(cnt < sglinfo->si_max_pages); 2502 sglinfo->si_sgl_size = cnt; 2503 } else { 2504 sglinfo->si_sgl_size = cnt + 1; 2505 } 2506 } 2507 2508 2509 /* 2510 * rootnex_bind_slowpath() 2511 * Call in the bind path if the calling driver can't use the sgl without 2512 * modifying it. We either need to use the copy buffer and/or we will end up 2513 * with a partial bind. 2514 */ 2515 static int 2516 rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2517 rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag) 2518 { 2519 rootnex_sglinfo_t *sinfo; 2520 rootnex_window_t *window; 2521 ddi_dma_cookie_t *cookie; 2522 size_t copybuf_used; 2523 size_t dmac_size; 2524 boolean_t partial; 2525 off_t cur_offset; 2526 page_t *cur_pp; 2527 major_t mnum; 2528 int e; 2529 int i; 2530 2531 2532 sinfo = &dma->dp_sglinfo; 2533 copybuf_used = 0; 2534 partial = B_FALSE; 2535 2536 /* 2537 * If we're using the copybuf, set the copybuf state in dma struct. 2538 * Needs to be first since it sets the copy buffer size. 2539 */ 2540 if (sinfo->si_copybuf_req != 0) { 2541 e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 2542 if (e != DDI_SUCCESS) { 2543 return (e); 2544 } 2545 } else { 2546 dma->dp_copybuf_size = 0; 2547 } 2548 2549 /* 2550 * Figure out if we need to do a partial mapping. If so, figure out 2551 * if we need to trim the buffers when we munge the sgl. 2552 */ 2553 if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 2554 (dma->dp_dma.dmao_size > dma->dp_maxxfer) || 2555 (attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 2556 dma->dp_partial_required = B_TRUE; 2557 if (attr->dma_attr_granular != 1) { 2558 dma->dp_trim_required = B_TRUE; 2559 } 2560 } else { 2561 dma->dp_partial_required = B_FALSE; 2562 dma->dp_trim_required = B_FALSE; 2563 } 2564 2565 /* If we need to do a partial bind, make sure the driver supports it */ 2566 if (dma->dp_partial_required && 2567 !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 2568 2569 mnum = ddi_driver_major(dma->dp_dip); 2570 /* 2571 * patchable which allows us to print one warning per major 2572 * number. 2573 */ 2574 if ((rootnex_bind_warn) && 2575 ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 2576 rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 2577 cmn_err(CE_WARN, "!%s: coding error detected, the " 2578 "driver is using ddi_dma_attr(9S) incorrectly. " 2579 "There is a small risk of data corruption in " 2580 "particular with large I/Os. The driver should be " 2581 "replaced with a corrected version for proper " 2582 "system operation. To disable this warning, add " 2583 "'set rootnex:rootnex_bind_warn=0' to " 2584 "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 2585 } 2586 return (DDI_DMA_TOOBIG); 2587 } 2588 2589 /* 2590 * we might need multiple windows, setup state to handle them. In this 2591 * code path, we will have at least one window. 2592 */ 2593 e = rootnex_setup_windows(hp, dma, attr, kmflag); 2594 if (e != DDI_SUCCESS) { 2595 rootnex_teardown_copybuf(dma); 2596 return (e); 2597 } 2598 2599 window = &dma->dp_window[0]; 2600 cookie = &dma->dp_cookies[0]; 2601 cur_offset = 0; 2602 rootnex_init_win(hp, dma, window, cookie, cur_offset); 2603 if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) { 2604 cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 2605 } 2606 2607 /* loop though all the cookies we got back from get_sgl() */ 2608 for (i = 0; i < sinfo->si_sgl_size; i++) { 2609 /* 2610 * If we're using the copy buffer, check this cookie and setup 2611 * its associated copy buffer state. If this cookie uses the 2612 * copy buffer, make sure we sync this window during dma_sync. 2613 */ 2614 if (dma->dp_copybuf_size > 0) { 2615 rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie, 2616 cur_offset, ©buf_used, &cur_pp); 2617 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2618 window->wd_dosync = B_TRUE; 2619 } 2620 } 2621 2622 /* 2623 * save away the cookie size, since it could be modified in 2624 * the windowing code. 2625 */ 2626 dmac_size = cookie->dmac_size; 2627 2628 /* if we went over max copybuf size */ 2629 if (dma->dp_copybuf_size && 2630 (copybuf_used > dma->dp_copybuf_size)) { 2631 partial = B_TRUE; 2632 e = rootnex_copybuf_window_boundary(hp, dma, &window, 2633 cookie, cur_offset, ©buf_used); 2634 if (e != DDI_SUCCESS) { 2635 rootnex_teardown_copybuf(dma); 2636 rootnex_teardown_windows(dma); 2637 return (e); 2638 } 2639 2640 /* 2641 * if the coookie uses the copy buffer, make sure the 2642 * new window we just moved to is set to sync. 2643 */ 2644 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2645 window->wd_dosync = B_TRUE; 2646 } 2647 DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *, 2648 dma->dp_dip); 2649 2650 /* if the cookie cnt == max sgllen, move to the next window */ 2651 } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) { 2652 partial = B_TRUE; 2653 ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 2654 e = rootnex_sgllen_window_boundary(hp, dma, &window, 2655 cookie, attr, cur_offset); 2656 if (e != DDI_SUCCESS) { 2657 rootnex_teardown_copybuf(dma); 2658 rootnex_teardown_windows(dma); 2659 return (e); 2660 } 2661 2662 /* 2663 * if the coookie uses the copy buffer, make sure the 2664 * new window we just moved to is set to sync. 2665 */ 2666 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2667 window->wd_dosync = B_TRUE; 2668 } 2669 DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *, 2670 dma->dp_dip); 2671 2672 /* else if we will be over maxxfer */ 2673 } else if ((window->wd_size + dmac_size) > 2674 dma->dp_maxxfer) { 2675 partial = B_TRUE; 2676 e = rootnex_maxxfer_window_boundary(hp, dma, &window, 2677 cookie); 2678 if (e != DDI_SUCCESS) { 2679 rootnex_teardown_copybuf(dma); 2680 rootnex_teardown_windows(dma); 2681 return (e); 2682 } 2683 2684 /* 2685 * if the coookie uses the copy buffer, make sure the 2686 * new window we just moved to is set to sync. 2687 */ 2688 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2689 window->wd_dosync = B_TRUE; 2690 } 2691 DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *, 2692 dma->dp_dip); 2693 2694 /* else this cookie fits in the current window */ 2695 } else { 2696 window->wd_cookie_cnt++; 2697 window->wd_size += dmac_size; 2698 } 2699 2700 /* track our offset into the buffer, go to the next cookie */ 2701 ASSERT(dmac_size <= dma->dp_dma.dmao_size); 2702 ASSERT(cookie->dmac_size <= dmac_size); 2703 cur_offset += dmac_size; 2704 cookie++; 2705 } 2706 2707 /* if we ended up with a zero sized window in the end, clean it up */ 2708 if (window->wd_size == 0) { 2709 hp->dmai_nwin--; 2710 window--; 2711 } 2712 2713 ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 2714 2715 if (!partial) { 2716 return (DDI_DMA_MAPPED); 2717 } 2718 2719 ASSERT(dma->dp_partial_required); 2720 return (DDI_DMA_PARTIAL_MAP); 2721 } 2722 2723 2724 /* 2725 * rootnex_setup_copybuf() 2726 * Called in bind slowpath. Figures out if we're going to use the copy 2727 * buffer, and if we do, sets up the basic state to handle it. 2728 */ 2729 static int 2730 rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2731 rootnex_dma_t *dma, ddi_dma_attr_t *attr) 2732 { 2733 rootnex_sglinfo_t *sinfo; 2734 ddi_dma_attr_t lattr; 2735 size_t max_copybuf; 2736 int cansleep; 2737 int e; 2738 #if !defined(__amd64) 2739 int vmflag; 2740 #endif 2741 2742 2743 sinfo = &dma->dp_sglinfo; 2744 2745 /* read this first so it's consistent through the routine */ 2746 max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK; 2747 2748 /* We need to call into the rootnex on ddi_dma_sync() */ 2749 hp->dmai_rflags &= ~DMP_NOSYNC; 2750 2751 /* make sure the copybuf size <= the max size */ 2752 dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 2753 ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 2754 2755 #if !defined(__amd64) 2756 /* 2757 * if we don't have kva space to copy to/from, allocate the KVA space 2758 * now. We only do this for the 32-bit kernel. We use seg kpm space for 2759 * the 64-bit kernel. 2760 */ 2761 if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 2762 (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 2763 2764 /* convert the sleep flags */ 2765 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2766 vmflag = VM_SLEEP; 2767 } else { 2768 vmflag = VM_NOSLEEP; 2769 } 2770 2771 /* allocate Kernel VA space that we can bcopy to/from */ 2772 dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 2773 vmflag); 2774 if (dma->dp_kva == NULL) { 2775 return (DDI_DMA_NORESOURCES); 2776 } 2777 } 2778 #endif 2779 2780 /* convert the sleep flags */ 2781 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2782 cansleep = 1; 2783 } else { 2784 cansleep = 0; 2785 } 2786 2787 /* 2788 * Allocate the actual copy buffer. This needs to fit within the DMA 2789 * engine limits, so we can't use kmem_alloc... We don't need 2790 * contiguous memory (sgllen) since we will be forcing windows on 2791 * sgllen anyway. 2792 */ 2793 lattr = *attr; 2794 lattr.dma_attr_align = MMU_PAGESIZE; 2795 /* 2796 * this should be < 0 to indicate no limit, but due to a bug in 2797 * the rootnex, we'll set it to the maximum positive int. 2798 */ 2799 lattr.dma_attr_sgllen = 0x7fffffff; 2800 e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 2801 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 2802 if (e != DDI_SUCCESS) { 2803 #if !defined(__amd64) 2804 if (dma->dp_kva != NULL) { 2805 vmem_free(heap_arena, dma->dp_kva, 2806 dma->dp_copybuf_size); 2807 } 2808 #endif 2809 return (DDI_DMA_NORESOURCES); 2810 } 2811 2812 DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 2813 size_t, dma->dp_copybuf_size); 2814 2815 return (DDI_SUCCESS); 2816 } 2817 2818 2819 /* 2820 * rootnex_setup_windows() 2821 * Called in bind slowpath to setup the window state. We always have windows 2822 * in the slowpath. Even if the window count = 1. 2823 */ 2824 static int 2825 rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 2826 ddi_dma_attr_t *attr, int kmflag) 2827 { 2828 rootnex_window_t *windowp; 2829 rootnex_sglinfo_t *sinfo; 2830 size_t copy_state_size; 2831 size_t win_state_size; 2832 size_t state_available; 2833 size_t space_needed; 2834 uint_t copybuf_win; 2835 uint_t maxxfer_win; 2836 size_t space_used; 2837 uint_t sglwin; 2838 2839 2840 sinfo = &dma->dp_sglinfo; 2841 2842 dma->dp_current_win = 0; 2843 hp->dmai_nwin = 0; 2844 2845 /* If we don't need to do a partial, we only have one window */ 2846 if (!dma->dp_partial_required) { 2847 dma->dp_max_win = 1; 2848 2849 /* 2850 * we need multiple windows, need to figure out the worse case number 2851 * of windows. 2852 */ 2853 } else { 2854 /* 2855 * if we need windows because we need more copy buffer that 2856 * we allow, the worse case number of windows we could need 2857 * here would be (copybuf space required / copybuf space that 2858 * we have) plus one for remainder, and plus 2 to handle the 2859 * extra pages on the trim for the first and last pages of the 2860 * buffer (a page is the minimum window size so under the right 2861 * attr settings, you could have a window for each page). 2862 * The last page will only be hit here if the size is not a 2863 * multiple of the granularity (which theoretically shouldn't 2864 * be the case but never has been enforced, so we could have 2865 * broken things without it). 2866 */ 2867 if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 2868 ASSERT(dma->dp_copybuf_size > 0); 2869 copybuf_win = (sinfo->si_copybuf_req / 2870 dma->dp_copybuf_size) + 1 + 2; 2871 } else { 2872 copybuf_win = 0; 2873 } 2874 2875 /* 2876 * if we need windows because we have more cookies than the H/W 2877 * can handle, the number of windows we would need here would 2878 * be (cookie count / cookies count H/W supports) plus one for 2879 * remainder, and plus 2 to handle the extra pages on the trim 2880 * (see above comment about trim) 2881 */ 2882 if (attr->dma_attr_sgllen < sinfo->si_sgl_size) { 2883 sglwin = ((sinfo->si_sgl_size / attr->dma_attr_sgllen) 2884 + 1) + 2; 2885 } else { 2886 sglwin = 0; 2887 } 2888 2889 /* 2890 * if we need windows because we're binding more memory than the 2891 * H/W can transfer at once, the number of windows we would need 2892 * here would be (xfer count / max xfer H/W supports) plus one 2893 * for remainder, and plus 2 to handle the extra pages on the 2894 * trim (see above comment about trim) 2895 */ 2896 if (dma->dp_dma.dmao_size > dma->dp_maxxfer) { 2897 maxxfer_win = (dma->dp_dma.dmao_size / 2898 dma->dp_maxxfer) + 1 + 2; 2899 } else { 2900 maxxfer_win = 0; 2901 } 2902 dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 2903 ASSERT(dma->dp_max_win > 0); 2904 } 2905 win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 2906 2907 /* 2908 * Get space for window and potential copy buffer state. Before we 2909 * go and allocate memory, see if we can get away with using what's 2910 * left in the pre-allocted state or the dynamically allocated sgl. 2911 */ 2912 space_used = (uintptr_t)(sinfo->si_sgl_size * 2913 sizeof (ddi_dma_cookie_t)); 2914 2915 /* if we dynamically allocated space for the cookies */ 2916 if (dma->dp_need_to_free_cookie) { 2917 /* if we have more space in the pre-allocted buffer, use it */ 2918 ASSERT(space_used <= dma->dp_cookie_size); 2919 if ((dma->dp_cookie_size - space_used) <= 2920 rootnex_state->r_prealloc_size) { 2921 state_available = rootnex_state->r_prealloc_size; 2922 windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 2923 2924 /* 2925 * else, we have more free space in the dynamically allocated 2926 * buffer, i.e. the buffer wasn't worse case fragmented so we 2927 * didn't need a lot of cookies. 2928 */ 2929 } else { 2930 state_available = dma->dp_cookie_size - space_used; 2931 windowp = (rootnex_window_t *) 2932 &dma->dp_cookies[sinfo->si_sgl_size]; 2933 } 2934 2935 /* we used the pre-alloced buffer */ 2936 } else { 2937 ASSERT(space_used <= rootnex_state->r_prealloc_size); 2938 state_available = rootnex_state->r_prealloc_size - space_used; 2939 windowp = (rootnex_window_t *) 2940 &dma->dp_cookies[sinfo->si_sgl_size]; 2941 } 2942 2943 /* 2944 * figure out how much state we need to track the copy buffer. Add an 2945 * addition 8 bytes for pointer alignemnt later. 2946 */ 2947 if (dma->dp_copybuf_size > 0) { 2948 copy_state_size = sinfo->si_max_pages * 2949 sizeof (rootnex_pgmap_t); 2950 } else { 2951 copy_state_size = 0; 2952 } 2953 /* add an additional 8 bytes for pointer alignment */ 2954 space_needed = win_state_size + copy_state_size + 0x8; 2955 2956 /* if we have enough space already, use it */ 2957 if (state_available >= space_needed) { 2958 dma->dp_window = windowp; 2959 dma->dp_need_to_free_window = B_FALSE; 2960 2961 /* not enough space, need to allocate more. */ 2962 } else { 2963 dma->dp_window = kmem_alloc(space_needed, kmflag); 2964 if (dma->dp_window == NULL) { 2965 return (DDI_DMA_NORESOURCES); 2966 } 2967 dma->dp_need_to_free_window = B_TRUE; 2968 dma->dp_window_size = space_needed; 2969 DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *, 2970 dma->dp_dip, size_t, space_needed); 2971 } 2972 2973 /* 2974 * we allocate copy buffer state and window state at the same time. 2975 * setup our copy buffer state pointers. Make sure it's aligned. 2976 */ 2977 if (dma->dp_copybuf_size > 0) { 2978 dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 2979 &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 2980 2981 #if !defined(__amd64) 2982 /* 2983 * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 2984 * false/NULL. Should be quicker to bzero vs loop and set. 2985 */ 2986 bzero(dma->dp_pgmap, copy_state_size); 2987 #endif 2988 } else { 2989 dma->dp_pgmap = NULL; 2990 } 2991 2992 return (DDI_SUCCESS); 2993 } 2994 2995 2996 /* 2997 * rootnex_teardown_copybuf() 2998 * cleans up after rootnex_setup_copybuf() 2999 */ 3000 static void 3001 rootnex_teardown_copybuf(rootnex_dma_t *dma) 3002 { 3003 #if !defined(__amd64) 3004 int i; 3005 3006 /* 3007 * if we allocated kernel heap VMEM space, go through all the pages and 3008 * map out any of the ones that we're mapped into the kernel heap VMEM 3009 * arena. Then free the VMEM space. 3010 */ 3011 if (dma->dp_kva != NULL) { 3012 for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 3013 if (dma->dp_pgmap[i].pm_mapped) { 3014 hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 3015 MMU_PAGESIZE, HAT_UNLOAD); 3016 dma->dp_pgmap[i].pm_mapped = B_FALSE; 3017 } 3018 } 3019 3020 vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 3021 } 3022 3023 #endif 3024 3025 /* if we allocated a copy buffer, free it */ 3026 if (dma->dp_cbaddr != NULL) { 3027 i_ddi_mem_free(dma->dp_cbaddr, NULL); 3028 } 3029 } 3030 3031 3032 /* 3033 * rootnex_teardown_windows() 3034 * cleans up after rootnex_setup_windows() 3035 */ 3036 static void 3037 rootnex_teardown_windows(rootnex_dma_t *dma) 3038 { 3039 /* 3040 * if we had to allocate window state on the last bind (because we 3041 * didn't have enough pre-allocated space in the handle), free it. 3042 */ 3043 if (dma->dp_need_to_free_window) { 3044 kmem_free(dma->dp_window, dma->dp_window_size); 3045 } 3046 } 3047 3048 3049 /* 3050 * rootnex_init_win() 3051 * Called in bind slow path during creation of a new window. Initializes 3052 * window state to default values. 3053 */ 3054 /*ARGSUSED*/ 3055 static void 3056 rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3057 rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 3058 { 3059 hp->dmai_nwin++; 3060 window->wd_dosync = B_FALSE; 3061 window->wd_offset = cur_offset; 3062 window->wd_size = 0; 3063 window->wd_first_cookie = cookie; 3064 window->wd_cookie_cnt = 0; 3065 window->wd_trim.tr_trim_first = B_FALSE; 3066 window->wd_trim.tr_trim_last = B_FALSE; 3067 window->wd_trim.tr_first_copybuf_win = B_FALSE; 3068 window->wd_trim.tr_last_copybuf_win = B_FALSE; 3069 #if !defined(__amd64) 3070 window->wd_remap_copybuf = dma->dp_cb_remaping; 3071 #endif 3072 } 3073 3074 3075 /* 3076 * rootnex_setup_cookie() 3077 * Called in the bind slow path when the sgl uses the copy buffer. If any of 3078 * the sgl uses the copy buffer, we need to go through each cookie, figure 3079 * out if it uses the copy buffer, and if it does, save away everything we'll 3080 * need during sync. 3081 */ 3082 static void 3083 rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 3084 ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 3085 page_t **cur_pp) 3086 { 3087 boolean_t copybuf_sz_power_2; 3088 rootnex_sglinfo_t *sinfo; 3089 paddr_t paddr; 3090 uint_t pidx; 3091 uint_t pcnt; 3092 off_t poff; 3093 #if defined(__amd64) 3094 pfn_t pfn; 3095 #else 3096 page_t **pplist; 3097 #endif 3098 3099 sinfo = &dma->dp_sglinfo; 3100 3101 /* 3102 * Calculate the page index relative to the start of the buffer. The 3103 * index to the current page for our buffer is the offset into the 3104 * first page of the buffer plus our current offset into the buffer 3105 * itself, shifted of course... 3106 */ 3107 pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 3108 ASSERT(pidx < sinfo->si_max_pages); 3109 3110 /* if this cookie uses the copy buffer */ 3111 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3112 /* 3113 * NOTE: we know that since this cookie uses the copy buffer, it 3114 * is <= MMU_PAGESIZE. 3115 */ 3116 3117 /* 3118 * get the offset into the page. For the 64-bit kernel, get the 3119 * pfn which we'll use with seg kpm. 3120 */ 3121 poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 3122 #if defined(__amd64) 3123 /* mfn_to_pfn() is a NOP on i86pc */ 3124 pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT); 3125 #endif /* __amd64 */ 3126 3127 /* figure out if the copybuf size is a power of 2 */ 3128 if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) { 3129 copybuf_sz_power_2 = B_FALSE; 3130 } else { 3131 copybuf_sz_power_2 = B_TRUE; 3132 } 3133 3134 /* This page uses the copy buffer */ 3135 dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 3136 3137 /* 3138 * save the copy buffer KVA that we'll use with this page. 3139 * if we still fit within the copybuf, it's a simple add. 3140 * otherwise, we need to wrap over using & or % accordingly. 3141 */ 3142 if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 3143 dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 3144 *copybuf_used; 3145 } else { 3146 if (copybuf_sz_power_2) { 3147 dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3148 (uintptr_t)dma->dp_cbaddr + 3149 (*copybuf_used & 3150 (dma->dp_copybuf_size - 1))); 3151 } else { 3152 dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3153 (uintptr_t)dma->dp_cbaddr + 3154 (*copybuf_used % dma->dp_copybuf_size)); 3155 } 3156 } 3157 3158 /* 3159 * over write the cookie physical address with the address of 3160 * the physical address of the copy buffer page that we will 3161 * use. 3162 */ 3163 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3164 dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 3165 3166 #ifdef __xpv 3167 /* 3168 * If we're dom0, we're using a real device so we need to load 3169 * the cookies with MAs instead of PAs. 3170 */ 3171 cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 3172 #else 3173 cookie->dmac_laddress = paddr; 3174 #endif 3175 3176 /* if we have a kernel VA, it's easy, just save that address */ 3177 if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 3178 (sinfo->si_asp == &kas)) { 3179 /* 3180 * save away the page aligned virtual address of the 3181 * driver buffer. Offsets are handled in the sync code. 3182 */ 3183 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 3184 dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 3185 & MMU_PAGEMASK); 3186 #if !defined(__amd64) 3187 /* 3188 * we didn't need to, and will never need to map this 3189 * page. 3190 */ 3191 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3192 #endif 3193 3194 /* we don't have a kernel VA. We need one for the bcopy. */ 3195 } else { 3196 #if defined(__amd64) 3197 /* 3198 * for the 64-bit kernel, it's easy. We use seg kpm to 3199 * get a Kernel VA for the corresponding pfn. 3200 */ 3201 dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 3202 #else 3203 /* 3204 * for the 32-bit kernel, this is a pain. First we'll 3205 * save away the page_t or user VA for this page. This 3206 * is needed in rootnex_dma_win() when we switch to a 3207 * new window which requires us to re-map the copy 3208 * buffer. 3209 */ 3210 pplist = dmar_object->dmao_obj.virt_obj.v_priv; 3211 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3212 dma->dp_pgmap[pidx].pm_pp = *cur_pp; 3213 dma->dp_pgmap[pidx].pm_vaddr = NULL; 3214 } else if (pplist != NULL) { 3215 dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 3216 dma->dp_pgmap[pidx].pm_vaddr = NULL; 3217 } else { 3218 dma->dp_pgmap[pidx].pm_pp = NULL; 3219 dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 3220 (((uintptr_t) 3221 dmar_object->dmao_obj.virt_obj.v_addr + 3222 cur_offset) & MMU_PAGEMASK); 3223 } 3224 3225 /* 3226 * save away the page aligned virtual address which was 3227 * allocated from the kernel heap arena (taking into 3228 * account if we need more copy buffer than we alloced 3229 * and use multiple windows to handle this, i.e. &,%). 3230 * NOTE: there isn't and physical memory backing up this 3231 * virtual address space currently. 3232 */ 3233 if ((*copybuf_used + MMU_PAGESIZE) <= 3234 dma->dp_copybuf_size) { 3235 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3236 (((uintptr_t)dma->dp_kva + *copybuf_used) & 3237 MMU_PAGEMASK); 3238 } else { 3239 if (copybuf_sz_power_2) { 3240 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3241 (((uintptr_t)dma->dp_kva + 3242 (*copybuf_used & 3243 (dma->dp_copybuf_size - 1))) & 3244 MMU_PAGEMASK); 3245 } else { 3246 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3247 (((uintptr_t)dma->dp_kva + 3248 (*copybuf_used % 3249 dma->dp_copybuf_size)) & 3250 MMU_PAGEMASK); 3251 } 3252 } 3253 3254 /* 3255 * if we haven't used up the available copy buffer yet, 3256 * map the kva to the physical page. 3257 */ 3258 if (!dma->dp_cb_remaping && ((*copybuf_used + 3259 MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 3260 dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 3261 if (dma->dp_pgmap[pidx].pm_pp != NULL) { 3262 i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 3263 dma->dp_pgmap[pidx].pm_kaddr); 3264 } else { 3265 i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 3266 sinfo->si_asp, 3267 dma->dp_pgmap[pidx].pm_kaddr); 3268 } 3269 3270 /* 3271 * we've used up the available copy buffer, this page 3272 * will have to be mapped during rootnex_dma_win() when 3273 * we switch to a new window which requires a re-map 3274 * the copy buffer. (32-bit kernel only) 3275 */ 3276 } else { 3277 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3278 } 3279 #endif 3280 /* go to the next page_t */ 3281 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3282 *cur_pp = (*cur_pp)->p_next; 3283 } 3284 } 3285 3286 /* add to the copy buffer count */ 3287 *copybuf_used += MMU_PAGESIZE; 3288 3289 /* 3290 * This cookie doesn't use the copy buffer. Walk through the pages this 3291 * cookie occupies to reflect this. 3292 */ 3293 } else { 3294 /* 3295 * figure out how many pages the cookie occupies. We need to 3296 * use the original page offset of the buffer and the cookies 3297 * offset in the buffer to do this. 3298 */ 3299 poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 3300 pcnt = mmu_btopr(cookie->dmac_size + poff); 3301 3302 while (pcnt > 0) { 3303 #if !defined(__amd64) 3304 /* 3305 * the 32-bit kernel doesn't have seg kpm, so we need 3306 * to map in the driver buffer (if it didn't come down 3307 * with a kernel VA) on the fly. Since this page doesn't 3308 * use the copy buffer, it's not, or will it ever, have 3309 * to be mapped in. 3310 */ 3311 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3312 #endif 3313 dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 3314 3315 /* 3316 * we need to update pidx and cur_pp or we'll loose 3317 * track of where we are. 3318 */ 3319 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3320 *cur_pp = (*cur_pp)->p_next; 3321 } 3322 pidx++; 3323 pcnt--; 3324 } 3325 } 3326 } 3327 3328 3329 /* 3330 * rootnex_sgllen_window_boundary() 3331 * Called in the bind slow path when the next cookie causes us to exceed (in 3332 * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 3333 * length supported by the DMA H/W. 3334 */ 3335 static int 3336 rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3337 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 3338 off_t cur_offset) 3339 { 3340 off_t new_offset; 3341 size_t trim_sz; 3342 off_t coffset; 3343 3344 3345 /* 3346 * if we know we'll never have to trim, it's pretty easy. Just move to 3347 * the next window and init it. We're done. 3348 */ 3349 if (!dma->dp_trim_required) { 3350 (*windowp)++; 3351 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3352 (*windowp)->wd_cookie_cnt++; 3353 (*windowp)->wd_size = cookie->dmac_size; 3354 return (DDI_SUCCESS); 3355 } 3356 3357 /* figure out how much we need to trim from the window */ 3358 ASSERT(attr->dma_attr_granular != 0); 3359 if (dma->dp_granularity_power_2) { 3360 trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 3361 } else { 3362 trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 3363 } 3364 3365 /* The window's a whole multiple of granularity. We're done */ 3366 if (trim_sz == 0) { 3367 (*windowp)++; 3368 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3369 (*windowp)->wd_cookie_cnt++; 3370 (*windowp)->wd_size = cookie->dmac_size; 3371 return (DDI_SUCCESS); 3372 } 3373 3374 /* 3375 * The window's not a whole multiple of granularity, since we know this 3376 * is due to the sgllen, we need to go back to the last cookie and trim 3377 * that one, add the left over part of the old cookie into the new 3378 * window, and then add in the new cookie into the new window. 3379 */ 3380 3381 /* 3382 * make sure the driver isn't making us do something bad... Trimming and 3383 * sgllen == 1 don't go together. 3384 */ 3385 if (attr->dma_attr_sgllen == 1) { 3386 return (DDI_DMA_NOMAPPING); 3387 } 3388 3389 /* 3390 * first, setup the current window to account for the trim. Need to go 3391 * back to the last cookie for this. 3392 */ 3393 cookie--; 3394 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3395 (*windowp)->wd_trim.tr_last_cookie = cookie; 3396 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3397 ASSERT(cookie->dmac_size > trim_sz); 3398 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3399 (*windowp)->wd_size -= trim_sz; 3400 3401 /* save the buffer offsets for the next window */ 3402 coffset = cookie->dmac_size - trim_sz; 3403 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3404 3405 /* 3406 * set this now in case this is the first window. all other cases are 3407 * set in dma_win() 3408 */ 3409 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3410 3411 /* 3412 * initialize the next window using what's left over in the previous 3413 * cookie. 3414 */ 3415 (*windowp)++; 3416 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3417 (*windowp)->wd_cookie_cnt++; 3418 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3419 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3420 (*windowp)->wd_trim.tr_first_size = trim_sz; 3421 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3422 (*windowp)->wd_dosync = B_TRUE; 3423 } 3424 3425 /* 3426 * now go back to the current cookie and add it to the new window. set 3427 * the new window size to the what was left over from the previous 3428 * cookie and what's in the current cookie. 3429 */ 3430 cookie++; 3431 (*windowp)->wd_cookie_cnt++; 3432 (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3433 3434 /* 3435 * trim plus the next cookie could put us over maxxfer (a cookie can be 3436 * a max size of maxxfer). Handle that case. 3437 */ 3438 if ((*windowp)->wd_size > dma->dp_maxxfer) { 3439 /* 3440 * maxxfer is already a whole multiple of granularity, and this 3441 * trim will be <= the previous trim (since a cookie can't be 3442 * larger than maxxfer). Make things simple here. 3443 */ 3444 trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 3445 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3446 (*windowp)->wd_trim.tr_last_cookie = cookie; 3447 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3448 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3449 (*windowp)->wd_size -= trim_sz; 3450 ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 3451 3452 /* save the buffer offsets for the next window */ 3453 coffset = cookie->dmac_size - trim_sz; 3454 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3455 3456 /* setup the next window */ 3457 (*windowp)++; 3458 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3459 (*windowp)->wd_cookie_cnt++; 3460 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3461 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 3462 coffset; 3463 (*windowp)->wd_trim.tr_first_size = trim_sz; 3464 } 3465 3466 return (DDI_SUCCESS); 3467 } 3468 3469 3470 /* 3471 * rootnex_copybuf_window_boundary() 3472 * Called in bind slowpath when we get to a window boundary because we used 3473 * up all the copy buffer that we have. 3474 */ 3475 static int 3476 rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3477 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 3478 size_t *copybuf_used) 3479 { 3480 rootnex_sglinfo_t *sinfo; 3481 off_t new_offset; 3482 size_t trim_sz; 3483 paddr_t paddr; 3484 off_t coffset; 3485 uint_t pidx; 3486 off_t poff; 3487 3488 3489 sinfo = &dma->dp_sglinfo; 3490 3491 /* 3492 * the copy buffer should be a whole multiple of page size. We know that 3493 * this cookie is <= MMU_PAGESIZE. 3494 */ 3495 ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 3496 3497 /* 3498 * from now on, all new windows in this bind need to be re-mapped during 3499 * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 3500 * space... 3501 */ 3502 #if !defined(__amd64) 3503 dma->dp_cb_remaping = B_TRUE; 3504 #endif 3505 3506 /* reset copybuf used */ 3507 *copybuf_used = 0; 3508 3509 /* 3510 * if we don't have to trim (since granularity is set to 1), go to the 3511 * next window and add the current cookie to it. We know the current 3512 * cookie uses the copy buffer since we're in this code path. 3513 */ 3514 if (!dma->dp_trim_required) { 3515 (*windowp)++; 3516 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3517 3518 /* Add this cookie to the new window */ 3519 (*windowp)->wd_cookie_cnt++; 3520 (*windowp)->wd_size += cookie->dmac_size; 3521 *copybuf_used += MMU_PAGESIZE; 3522 return (DDI_SUCCESS); 3523 } 3524 3525 /* 3526 * *** may need to trim, figure it out. 3527 */ 3528 3529 /* figure out how much we need to trim from the window */ 3530 if (dma->dp_granularity_power_2) { 3531 trim_sz = (*windowp)->wd_size & 3532 (hp->dmai_attr.dma_attr_granular - 1); 3533 } else { 3534 trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 3535 } 3536 3537 /* 3538 * if the window's a whole multiple of granularity, go to the next 3539 * window, init it, then add in the current cookie. We know the current 3540 * cookie uses the copy buffer since we're in this code path. 3541 */ 3542 if (trim_sz == 0) { 3543 (*windowp)++; 3544 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3545 3546 /* Add this cookie to the new window */ 3547 (*windowp)->wd_cookie_cnt++; 3548 (*windowp)->wd_size += cookie->dmac_size; 3549 *copybuf_used += MMU_PAGESIZE; 3550 return (DDI_SUCCESS); 3551 } 3552 3553 /* 3554 * *** We figured it out, we definitly need to trim 3555 */ 3556 3557 /* 3558 * make sure the driver isn't making us do something bad... 3559 * Trimming and sgllen == 1 don't go together. 3560 */ 3561 if (hp->dmai_attr.dma_attr_sgllen == 1) { 3562 return (DDI_DMA_NOMAPPING); 3563 } 3564 3565 /* 3566 * first, setup the current window to account for the trim. Need to go 3567 * back to the last cookie for this. Some of the last cookie will be in 3568 * the current window, and some of the last cookie will be in the new 3569 * window. All of the current cookie will be in the new window. 3570 */ 3571 cookie--; 3572 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3573 (*windowp)->wd_trim.tr_last_cookie = cookie; 3574 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3575 ASSERT(cookie->dmac_size > trim_sz); 3576 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3577 (*windowp)->wd_size -= trim_sz; 3578 3579 /* 3580 * we're trimming the last cookie (not the current cookie). So that 3581 * last cookie may have or may not have been using the copy buffer ( 3582 * we know the cookie passed in uses the copy buffer since we're in 3583 * this code path). 3584 * 3585 * If the last cookie doesn't use the copy buffer, nothing special to 3586 * do. However, if it does uses the copy buffer, it will be both the 3587 * last page in the current window and the first page in the next 3588 * window. Since we are reusing the copy buffer (and KVA space on the 3589 * 32-bit kernel), this page will use the end of the copy buffer in the 3590 * current window, and the start of the copy buffer in the next window. 3591 * Track that info... The cookie physical address was already set to 3592 * the copy buffer physical address in setup_cookie.. 3593 */ 3594 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3595 pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 3596 (*windowp)->wd_size) >> MMU_PAGESHIFT; 3597 (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 3598 (*windowp)->wd_trim.tr_last_pidx = pidx; 3599 (*windowp)->wd_trim.tr_last_cbaddr = 3600 dma->dp_pgmap[pidx].pm_cbaddr; 3601 #if !defined(__amd64) 3602 (*windowp)->wd_trim.tr_last_kaddr = 3603 dma->dp_pgmap[pidx].pm_kaddr; 3604 #endif 3605 } 3606 3607 /* save the buffer offsets for the next window */ 3608 coffset = cookie->dmac_size - trim_sz; 3609 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3610 3611 /* 3612 * set this now in case this is the first window. all other cases are 3613 * set in dma_win() 3614 */ 3615 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3616 3617 /* 3618 * initialize the next window using what's left over in the previous 3619 * cookie. 3620 */ 3621 (*windowp)++; 3622 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3623 (*windowp)->wd_cookie_cnt++; 3624 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3625 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3626 (*windowp)->wd_trim.tr_first_size = trim_sz; 3627 3628 /* 3629 * again, we're tracking if the last cookie uses the copy buffer. 3630 * read the comment above for more info on why we need to track 3631 * additional state. 3632 * 3633 * For the first cookie in the new window, we need reset the physical 3634 * address to DMA into to the start of the copy buffer plus any 3635 * initial page offset which may be present. 3636 */ 3637 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3638 (*windowp)->wd_dosync = B_TRUE; 3639 (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 3640 (*windowp)->wd_trim.tr_first_pidx = pidx; 3641 (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 3642 poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 3643 3644 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) + 3645 poff; 3646 #ifdef __xpv 3647 /* 3648 * If we're dom0, we're using a real device so we need to load 3649 * the cookies with MAs instead of PAs. 3650 */ 3651 (*windowp)->wd_trim.tr_first_paddr = 3652 ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 3653 #else 3654 (*windowp)->wd_trim.tr_first_paddr = paddr; 3655 #endif 3656 3657 #if !defined(__amd64) 3658 (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 3659 #endif 3660 /* account for the cookie copybuf usage in the new window */ 3661 *copybuf_used += MMU_PAGESIZE; 3662 3663 /* 3664 * every piece of code has to have a hack, and here is this 3665 * ones :-) 3666 * 3667 * There is a complex interaction between setup_cookie and the 3668 * copybuf window boundary. The complexity had to be in either 3669 * the maxxfer window, or the copybuf window, and I chose the 3670 * copybuf code. 3671 * 3672 * So in this code path, we have taken the last cookie, 3673 * virtually broken it in half due to the trim, and it happens 3674 * to use the copybuf which further complicates life. At the 3675 * same time, we have already setup the current cookie, which 3676 * is now wrong. More background info: the current cookie uses 3677 * the copybuf, so it is only a page long max. So we need to 3678 * fix the current cookies copy buffer address, physical 3679 * address, and kva for the 32-bit kernel. We due this by 3680 * bumping them by page size (of course, we can't due this on 3681 * the physical address since the copy buffer may not be 3682 * physically contiguous). 3683 */ 3684 cookie++; 3685 dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 3686 poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 3687 3688 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3689 dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 3690 #ifdef __xpv 3691 /* 3692 * If we're dom0, we're using a real device so we need to load 3693 * the cookies with MAs instead of PAs. 3694 */ 3695 cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 3696 #else 3697 cookie->dmac_laddress = paddr; 3698 #endif 3699 3700 #if !defined(__amd64) 3701 ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 3702 dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 3703 #endif 3704 } else { 3705 /* go back to the current cookie */ 3706 cookie++; 3707 } 3708 3709 /* 3710 * add the current cookie to the new window. set the new window size to 3711 * the what was left over from the previous cookie and what's in the 3712 * current cookie. 3713 */ 3714 (*windowp)->wd_cookie_cnt++; 3715 (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3716 ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 3717 3718 /* 3719 * we know that the cookie passed in always uses the copy buffer. We 3720 * wouldn't be here if it didn't. 3721 */ 3722 *copybuf_used += MMU_PAGESIZE; 3723 3724 return (DDI_SUCCESS); 3725 } 3726 3727 3728 /* 3729 * rootnex_maxxfer_window_boundary() 3730 * Called in bind slowpath when we get to a window boundary because we will 3731 * go over maxxfer. 3732 */ 3733 static int 3734 rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3735 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 3736 { 3737 size_t dmac_size; 3738 off_t new_offset; 3739 size_t trim_sz; 3740 off_t coffset; 3741 3742 3743 /* 3744 * calculate how much we have to trim off of the current cookie to equal 3745 * maxxfer. We don't have to account for granularity here since our 3746 * maxxfer already takes that into account. 3747 */ 3748 trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 3749 ASSERT(trim_sz <= cookie->dmac_size); 3750 ASSERT(trim_sz <= dma->dp_maxxfer); 3751 3752 /* save cookie size since we need it later and we might change it */ 3753 dmac_size = cookie->dmac_size; 3754 3755 /* 3756 * if we're not trimming the entire cookie, setup the current window to 3757 * account for the trim. 3758 */ 3759 if (trim_sz < cookie->dmac_size) { 3760 (*windowp)->wd_cookie_cnt++; 3761 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3762 (*windowp)->wd_trim.tr_last_cookie = cookie; 3763 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3764 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3765 (*windowp)->wd_size = dma->dp_maxxfer; 3766 3767 /* 3768 * set the adjusted cookie size now in case this is the first 3769 * window. All other windows are taken care of in get win 3770 */ 3771 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3772 } 3773 3774 /* 3775 * coffset is the current offset within the cookie, new_offset is the 3776 * current offset with the entire buffer. 3777 */ 3778 coffset = dmac_size - trim_sz; 3779 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3780 3781 /* initialize the next window */ 3782 (*windowp)++; 3783 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3784 (*windowp)->wd_cookie_cnt++; 3785 (*windowp)->wd_size = trim_sz; 3786 if (trim_sz < dmac_size) { 3787 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3788 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 3789 coffset; 3790 (*windowp)->wd_trim.tr_first_size = trim_sz; 3791 } 3792 3793 return (DDI_SUCCESS); 3794 } 3795 3796 3797 /* 3798 * rootnex_dma_sync() 3799 * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 3800 * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 3801 * is set, ddi_dma_sync() returns immediately passing back success. 3802 */ 3803 /*ARGSUSED*/ 3804 static int 3805 rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 3806 off_t off, size_t len, uint_t cache_flags) 3807 { 3808 rootnex_sglinfo_t *sinfo; 3809 rootnex_pgmap_t *cbpage; 3810 rootnex_window_t *win; 3811 ddi_dma_impl_t *hp; 3812 rootnex_dma_t *dma; 3813 caddr_t fromaddr; 3814 caddr_t toaddr; 3815 uint_t psize; 3816 off_t offset; 3817 uint_t pidx; 3818 size_t size; 3819 off_t poff; 3820 int e; 3821 3822 3823 hp = (ddi_dma_impl_t *)handle; 3824 dma = (rootnex_dma_t *)hp->dmai_private; 3825 sinfo = &dma->dp_sglinfo; 3826 3827 /* 3828 * if we don't have any windows, we don't need to sync. A copybuf 3829 * will cause us to have at least one window. 3830 */ 3831 if (dma->dp_window == NULL) { 3832 return (DDI_SUCCESS); 3833 } 3834 3835 /* This window may not need to be sync'd */ 3836 win = &dma->dp_window[dma->dp_current_win]; 3837 if (!win->wd_dosync) { 3838 return (DDI_SUCCESS); 3839 } 3840 3841 /* handle off and len special cases */ 3842 if ((off == 0) || (rootnex_sync_ignore_params)) { 3843 offset = win->wd_offset; 3844 } else { 3845 offset = off; 3846 } 3847 if ((len == 0) || (rootnex_sync_ignore_params)) { 3848 size = win->wd_size; 3849 } else { 3850 size = len; 3851 } 3852 3853 /* check the sync args to make sure they make a little sense */ 3854 if (rootnex_sync_check_parms) { 3855 e = rootnex_valid_sync_parms(hp, win, offset, size, 3856 cache_flags); 3857 if (e != DDI_SUCCESS) { 3858 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 3859 return (DDI_FAILURE); 3860 } 3861 } 3862 3863 /* 3864 * special case the first page to handle the offset into the page. The 3865 * offset to the current page for our buffer is the offset into the 3866 * first page of the buffer plus our current offset into the buffer 3867 * itself, masked of course. 3868 */ 3869 poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 3870 psize = MIN((MMU_PAGESIZE - poff), size); 3871 3872 /* go through all the pages that we want to sync */ 3873 while (size > 0) { 3874 /* 3875 * Calculate the page index relative to the start of the buffer. 3876 * The index to the current page for our buffer is the offset 3877 * into the first page of the buffer plus our current offset 3878 * into the buffer itself, shifted of course... 3879 */ 3880 pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 3881 ASSERT(pidx < sinfo->si_max_pages); 3882 3883 /* 3884 * if this page uses the copy buffer, we need to sync it, 3885 * otherwise, go on to the next page. 3886 */ 3887 cbpage = &dma->dp_pgmap[pidx]; 3888 ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 3889 (cbpage->pm_uses_copybuf == B_FALSE)); 3890 if (cbpage->pm_uses_copybuf) { 3891 /* cbaddr and kaddr should be page aligned */ 3892 ASSERT(((uintptr_t)cbpage->pm_cbaddr & 3893 MMU_PAGEOFFSET) == 0); 3894 ASSERT(((uintptr_t)cbpage->pm_kaddr & 3895 MMU_PAGEOFFSET) == 0); 3896 3897 /* 3898 * if we're copying for the device, we are going to 3899 * copy from the drivers buffer and to the rootnex 3900 * allocated copy buffer. 3901 */ 3902 if (cache_flags == DDI_DMA_SYNC_FORDEV) { 3903 fromaddr = cbpage->pm_kaddr + poff; 3904 toaddr = cbpage->pm_cbaddr + poff; 3905 DTRACE_PROBE2(rootnex__sync__dev, 3906 dev_info_t *, dma->dp_dip, size_t, psize); 3907 3908 /* 3909 * if we're copying for the cpu/kernel, we are going to 3910 * copy from the rootnex allocated copy buffer to the 3911 * drivers buffer. 3912 */ 3913 } else { 3914 fromaddr = cbpage->pm_cbaddr + poff; 3915 toaddr = cbpage->pm_kaddr + poff; 3916 DTRACE_PROBE2(rootnex__sync__cpu, 3917 dev_info_t *, dma->dp_dip, size_t, psize); 3918 } 3919 3920 bcopy(fromaddr, toaddr, psize); 3921 } 3922 3923 /* 3924 * decrement size until we're done, update our offset into the 3925 * buffer, and get the next page size. 3926 */ 3927 size -= psize; 3928 offset += psize; 3929 psize = MIN(MMU_PAGESIZE, size); 3930 3931 /* page offset is zero for the rest of this loop */ 3932 poff = 0; 3933 } 3934 3935 return (DDI_SUCCESS); 3936 } 3937 3938 3939 /* 3940 * rootnex_valid_sync_parms() 3941 * checks the parameters passed to sync to verify they are correct. 3942 */ 3943 static int 3944 rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 3945 off_t offset, size_t size, uint_t cache_flags) 3946 { 3947 off_t woffset; 3948 3949 3950 /* 3951 * the first part of the test to make sure the offset passed in is 3952 * within the window. 3953 */ 3954 if (offset < win->wd_offset) { 3955 return (DDI_FAILURE); 3956 } 3957 3958 /* 3959 * second and last part of the test to make sure the offset and length 3960 * passed in is within the window. 3961 */ 3962 woffset = offset - win->wd_offset; 3963 if ((woffset + size) > win->wd_size) { 3964 return (DDI_FAILURE); 3965 } 3966 3967 /* 3968 * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 3969 * be set too. 3970 */ 3971 if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 3972 (hp->dmai_rflags & DDI_DMA_WRITE)) { 3973 return (DDI_SUCCESS); 3974 } 3975 3976 /* 3977 * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 3978 * should be set. Also DDI_DMA_READ should be set in the flags. 3979 */ 3980 if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 3981 (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 3982 (hp->dmai_rflags & DDI_DMA_READ)) { 3983 return (DDI_SUCCESS); 3984 } 3985 3986 return (DDI_FAILURE); 3987 } 3988 3989 3990 /* 3991 * rootnex_dma_win() 3992 * called from ddi_dma_getwin() 3993 */ 3994 /*ARGSUSED*/ 3995 static int 3996 rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 3997 uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 3998 uint_t *ccountp) 3999 { 4000 rootnex_window_t *window; 4001 rootnex_trim_t *trim; 4002 ddi_dma_impl_t *hp; 4003 rootnex_dma_t *dma; 4004 #if !defined(__amd64) 4005 rootnex_sglinfo_t *sinfo; 4006 rootnex_pgmap_t *pmap; 4007 uint_t pidx; 4008 uint_t pcnt; 4009 off_t poff; 4010 int i; 4011 #endif 4012 4013 4014 hp = (ddi_dma_impl_t *)handle; 4015 dma = (rootnex_dma_t *)hp->dmai_private; 4016 #if !defined(__amd64) 4017 sinfo = &dma->dp_sglinfo; 4018 #endif 4019 4020 /* If we try and get a window which doesn't exist, return failure */ 4021 if (win >= hp->dmai_nwin) { 4022 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4023 return (DDI_FAILURE); 4024 } 4025 4026 /* 4027 * if we don't have any windows, and they're asking for the first 4028 * window, setup the cookie pointer to the first cookie in the bind. 4029 * setup our return values, then increment the cookie since we return 4030 * the first cookie on the stack. 4031 */ 4032 if (dma->dp_window == NULL) { 4033 if (win != 0) { 4034 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4035 return (DDI_FAILURE); 4036 } 4037 hp->dmai_cookie = dma->dp_cookies; 4038 *offp = 0; 4039 *lenp = dma->dp_dma.dmao_size; 4040 *ccountp = dma->dp_sglinfo.si_sgl_size; 4041 *cookiep = hp->dmai_cookie[0]; 4042 hp->dmai_cookie++; 4043 return (DDI_SUCCESS); 4044 } 4045 4046 /* sync the old window before moving on to the new one */ 4047 window = &dma->dp_window[dma->dp_current_win]; 4048 if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 4049 (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 4050 DDI_DMA_SYNC_FORCPU); 4051 } 4052 4053 #if !defined(__amd64) 4054 /* 4055 * before we move to the next window, if we need to re-map, unmap all 4056 * the pages in this window. 4057 */ 4058 if (dma->dp_cb_remaping) { 4059 /* 4060 * If we switch to this window again, we'll need to map in 4061 * on the fly next time. 4062 */ 4063 window->wd_remap_copybuf = B_TRUE; 4064 4065 /* 4066 * calculate the page index into the buffer where this window 4067 * starts, and the number of pages this window takes up. 4068 */ 4069 pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4070 MMU_PAGESHIFT; 4071 poff = (sinfo->si_buf_offset + window->wd_offset) & 4072 MMU_PAGEOFFSET; 4073 pcnt = mmu_btopr(window->wd_size + poff); 4074 ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 4075 4076 /* unmap pages which are currently mapped in this window */ 4077 for (i = 0; i < pcnt; i++) { 4078 if (dma->dp_pgmap[pidx].pm_mapped) { 4079 hat_unload(kas.a_hat, 4080 dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 4081 HAT_UNLOAD); 4082 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4083 } 4084 pidx++; 4085 } 4086 } 4087 #endif 4088 4089 /* 4090 * Move to the new window. 4091 * NOTE: current_win must be set for sync to work right 4092 */ 4093 dma->dp_current_win = win; 4094 window = &dma->dp_window[win]; 4095 4096 /* if needed, adjust the first and/or last cookies for trim */ 4097 trim = &window->wd_trim; 4098 if (trim->tr_trim_first) { 4099 window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr; 4100 window->wd_first_cookie->dmac_size = trim->tr_first_size; 4101 #if !defined(__amd64) 4102 window->wd_first_cookie->dmac_type = 4103 (window->wd_first_cookie->dmac_type & 4104 ROOTNEX_USES_COPYBUF) + window->wd_offset; 4105 #endif 4106 if (trim->tr_first_copybuf_win) { 4107 dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 4108 trim->tr_first_cbaddr; 4109 #if !defined(__amd64) 4110 dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 4111 trim->tr_first_kaddr; 4112 #endif 4113 } 4114 } 4115 if (trim->tr_trim_last) { 4116 trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr; 4117 trim->tr_last_cookie->dmac_size = trim->tr_last_size; 4118 if (trim->tr_last_copybuf_win) { 4119 dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 4120 trim->tr_last_cbaddr; 4121 #if !defined(__amd64) 4122 dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 4123 trim->tr_last_kaddr; 4124 #endif 4125 } 4126 } 4127 4128 /* 4129 * setup the cookie pointer to the first cookie in the window. setup 4130 * our return values, then increment the cookie since we return the 4131 * first cookie on the stack. 4132 */ 4133 hp->dmai_cookie = window->wd_first_cookie; 4134 *offp = window->wd_offset; 4135 *lenp = window->wd_size; 4136 *ccountp = window->wd_cookie_cnt; 4137 *cookiep = hp->dmai_cookie[0]; 4138 hp->dmai_cookie++; 4139 4140 #if !defined(__amd64) 4141 /* re-map copybuf if required for this window */ 4142 if (dma->dp_cb_remaping) { 4143 /* 4144 * calculate the page index into the buffer where this 4145 * window starts. 4146 */ 4147 pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4148 MMU_PAGESHIFT; 4149 ASSERT(pidx < sinfo->si_max_pages); 4150 4151 /* 4152 * the first page can get unmapped if it's shared with the 4153 * previous window. Even if the rest of this window is already 4154 * mapped in, we need to still check this one. 4155 */ 4156 pmap = &dma->dp_pgmap[pidx]; 4157 if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 4158 if (pmap->pm_pp != NULL) { 4159 pmap->pm_mapped = B_TRUE; 4160 i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 4161 } else if (pmap->pm_vaddr != NULL) { 4162 pmap->pm_mapped = B_TRUE; 4163 i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 4164 pmap->pm_kaddr); 4165 } 4166 } 4167 pidx++; 4168 4169 /* map in the rest of the pages if required */ 4170 if (window->wd_remap_copybuf) { 4171 window->wd_remap_copybuf = B_FALSE; 4172 4173 /* figure out many pages this window takes up */ 4174 poff = (sinfo->si_buf_offset + window->wd_offset) & 4175 MMU_PAGEOFFSET; 4176 pcnt = mmu_btopr(window->wd_size + poff); 4177 ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 4178 4179 /* map pages which require it */ 4180 for (i = 1; i < pcnt; i++) { 4181 pmap = &dma->dp_pgmap[pidx]; 4182 if (pmap->pm_uses_copybuf) { 4183 ASSERT(pmap->pm_mapped == B_FALSE); 4184 if (pmap->pm_pp != NULL) { 4185 pmap->pm_mapped = B_TRUE; 4186 i86_pp_map(pmap->pm_pp, 4187 pmap->pm_kaddr); 4188 } else if (pmap->pm_vaddr != NULL) { 4189 pmap->pm_mapped = B_TRUE; 4190 i86_va_map(pmap->pm_vaddr, 4191 sinfo->si_asp, 4192 pmap->pm_kaddr); 4193 } 4194 } 4195 pidx++; 4196 } 4197 } 4198 } 4199 #endif 4200 4201 /* if the new window uses the copy buffer, sync it for the device */ 4202 if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 4203 (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 4204 DDI_DMA_SYNC_FORDEV); 4205 } 4206 4207 return (DDI_SUCCESS); 4208 } 4209 4210 4211 4212 /* 4213 * ************************ 4214 * obsoleted dma routines 4215 * ************************ 4216 */ 4217 4218 /* 4219 * rootnex_dma_map() 4220 * called from ddi_dma_setup() 4221 */ 4222 /* ARGSUSED */ 4223 static int 4224 rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, struct ddi_dma_req *dmareq, 4225 ddi_dma_handle_t *handlep) 4226 { 4227 #if defined(__amd64) 4228 /* 4229 * this interface is not supported in 64-bit x86 kernel. See comment in 4230 * rootnex_dma_mctl() 4231 */ 4232 return (DDI_DMA_NORESOURCES); 4233 4234 #else /* 32-bit x86 kernel */ 4235 ddi_dma_handle_t *lhandlep; 4236 ddi_dma_handle_t lhandle; 4237 ddi_dma_cookie_t cookie; 4238 ddi_dma_attr_t dma_attr; 4239 ddi_dma_lim_t *dma_lim; 4240 uint_t ccnt; 4241 int e; 4242 4243 4244 /* 4245 * if the driver is just testing to see if it's possible to do the bind, 4246 * we'll use local state. Otherwise, use the handle pointer passed in. 4247 */ 4248 if (handlep == NULL) { 4249 lhandlep = &lhandle; 4250 } else { 4251 lhandlep = handlep; 4252 } 4253 4254 /* convert the limit structure to a dma_attr one */ 4255 dma_lim = dmareq->dmar_limits; 4256 dma_attr.dma_attr_version = DMA_ATTR_V0; 4257 dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo; 4258 dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi; 4259 dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer; 4260 dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max; 4261 dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max; 4262 dma_attr.dma_attr_granular = dma_lim->dlim_granular; 4263 dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen; 4264 dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize; 4265 dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes; 4266 dma_attr.dma_attr_align = MMU_PAGESIZE; 4267 dma_attr.dma_attr_flags = 0; 4268 4269 e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp, 4270 dmareq->dmar_arg, lhandlep); 4271 if (e != DDI_SUCCESS) { 4272 return (e); 4273 } 4274 4275 e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt); 4276 if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 4277 (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4278 return (e); 4279 } 4280 4281 /* 4282 * if the driver is just testing to see if it's possible to do the bind, 4283 * free up the local state and return the result. 4284 */ 4285 if (handlep == NULL) { 4286 (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep); 4287 (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4288 if (e == DDI_DMA_MAPPED) { 4289 return (DDI_DMA_MAPOK); 4290 } else { 4291 return (DDI_DMA_NOMAPPING); 4292 } 4293 } 4294 4295 return (e); 4296 #endif /* defined(__amd64) */ 4297 } 4298 4299 4300 /* 4301 * rootnex_dma_mctl() 4302 * 4303 */ 4304 /* ARGSUSED */ 4305 static int 4306 rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4307 enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 4308 uint_t cache_flags) 4309 { 4310 #if defined(__amd64) 4311 /* 4312 * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a 4313 * common implementation in genunix, so they no longer have x86 4314 * specific functionality which called into dma_ctl. 4315 * 4316 * The rest of the obsoleted interfaces were never supported in the 4317 * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface 4318 * was not ported to the x86 64-bit kernel do to serious x86 rootnex 4319 * implementation issues. 4320 * 4321 * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and 4322 * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we 4323 * reflect that now too... 4324 * 4325 * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are 4326 * not going to put this functionality into the 64-bit x86 kernel now. 4327 * It wasn't ported to the 64-bit kernel for s10, no reason to change 4328 * that in a future release. 4329 */ 4330 return (DDI_FAILURE); 4331 4332 #else /* 32-bit x86 kernel */ 4333 ddi_dma_cookie_t lcookie; 4334 ddi_dma_cookie_t *cookie; 4335 rootnex_window_t *window; 4336 ddi_dma_impl_t *hp; 4337 rootnex_dma_t *dma; 4338 uint_t nwin; 4339 uint_t ccnt; 4340 size_t len; 4341 off_t off; 4342 int e; 4343 4344 4345 /* 4346 * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little 4347 * hacky since were optimizing for the current interfaces and so we can 4348 * cleanup the mess in genunix. Hopefully we will remove the this 4349 * obsoleted routines someday soon. 4350 */ 4351 4352 switch (request) { 4353 4354 case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */ 4355 hp = (ddi_dma_impl_t *)handle; 4356 cookie = (ddi_dma_cookie_t *)objpp; 4357 4358 /* 4359 * convert segment to cookie. We don't distinguish between the 4360 * two :-) 4361 */ 4362 *cookie = *hp->dmai_cookie; 4363 *lenp = cookie->dmac_size; 4364 *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF; 4365 return (DDI_SUCCESS); 4366 4367 case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */ 4368 hp = (ddi_dma_impl_t *)handle; 4369 dma = (rootnex_dma_t *)hp->dmai_private; 4370 4371 if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) { 4372 return (DDI_DMA_STALE); 4373 } 4374 4375 /* handle the case where we don't have any windows */ 4376 if (dma->dp_window == NULL) { 4377 /* 4378 * if seg == NULL, and we don't have any windows, 4379 * return the first cookie in the sgl. 4380 */ 4381 if (*lenp == NULL) { 4382 dma->dp_current_cookie = 0; 4383 hp->dmai_cookie = dma->dp_cookies; 4384 *objpp = (caddr_t)handle; 4385 return (DDI_SUCCESS); 4386 4387 /* if we have more cookies, go to the next cookie */ 4388 } else { 4389 if ((dma->dp_current_cookie + 1) >= 4390 dma->dp_sglinfo.si_sgl_size) { 4391 return (DDI_DMA_DONE); 4392 } 4393 dma->dp_current_cookie++; 4394 hp->dmai_cookie++; 4395 return (DDI_SUCCESS); 4396 } 4397 } 4398 4399 /* We have one or more windows */ 4400 window = &dma->dp_window[dma->dp_current_win]; 4401 4402 /* 4403 * if seg == NULL, return the first cookie in the current 4404 * window 4405 */ 4406 if (*lenp == NULL) { 4407 dma->dp_current_cookie = 0; 4408 hp->dmai_cookie = window->wd_first_cookie; 4409 4410 /* 4411 * go to the next cookie in the window then see if we done with 4412 * this window. 4413 */ 4414 } else { 4415 if ((dma->dp_current_cookie + 1) >= 4416 window->wd_cookie_cnt) { 4417 return (DDI_DMA_DONE); 4418 } 4419 dma->dp_current_cookie++; 4420 hp->dmai_cookie++; 4421 } 4422 *objpp = (caddr_t)handle; 4423 return (DDI_SUCCESS); 4424 4425 case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */ 4426 hp = (ddi_dma_impl_t *)handle; 4427 dma = (rootnex_dma_t *)hp->dmai_private; 4428 4429 if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) { 4430 return (DDI_DMA_STALE); 4431 } 4432 4433 /* if win == NULL, return the first window in the bind */ 4434 if (*offp == NULL) { 4435 nwin = 0; 4436 4437 /* 4438 * else, go to the next window then see if we're done with all 4439 * the windows. 4440 */ 4441 } else { 4442 nwin = dma->dp_current_win + 1; 4443 if (nwin >= hp->dmai_nwin) { 4444 return (DDI_DMA_DONE); 4445 } 4446 } 4447 4448 /* switch to the next window */ 4449 e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len, 4450 &lcookie, &ccnt); 4451 ASSERT(e == DDI_SUCCESS); 4452 if (e != DDI_SUCCESS) { 4453 return (DDI_DMA_STALE); 4454 } 4455 4456 /* reset the cookie back to the first cookie in the window */ 4457 if (dma->dp_window != NULL) { 4458 window = &dma->dp_window[dma->dp_current_win]; 4459 hp->dmai_cookie = window->wd_first_cookie; 4460 } else { 4461 hp->dmai_cookie = dma->dp_cookies; 4462 } 4463 4464 *objpp = (caddr_t)handle; 4465 return (DDI_SUCCESS); 4466 4467 case DDI_DMA_FREE: /* ddi_dma_free() */ 4468 (void) rootnex_dma_unbindhdl(dip, rdip, handle); 4469 (void) rootnex_dma_freehdl(dip, rdip, handle); 4470 if (rootnex_state->r_dvma_call_list_id) { 4471 ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 4472 } 4473 return (DDI_SUCCESS); 4474 4475 case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */ 4476 case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */ 4477 /* should never get here, handled in genunix */ 4478 ASSERT(0); 4479 return (DDI_FAILURE); 4480 4481 case DDI_DMA_KVADDR: 4482 case DDI_DMA_GETERR: 4483 case DDI_DMA_COFF: 4484 return (DDI_FAILURE); 4485 } 4486 4487 return (DDI_FAILURE); 4488 #endif /* defined(__amd64) */ 4489 } 4490 4491 4492 /* 4493 * ********* 4494 * FMA Code 4495 * ********* 4496 */ 4497 4498 /* 4499 * rootnex_fm_init() 4500 * FMA init busop 4501 */ 4502 /* ARGSUSED */ 4503 static int 4504 rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 4505 ddi_iblock_cookie_t *ibc) 4506 { 4507 *ibc = rootnex_state->r_err_ibc; 4508 4509 return (ddi_system_fmcap); 4510 } 4511 4512 /* 4513 * rootnex_dma_check() 4514 * Function called after a dma fault occurred to find out whether the 4515 * fault address is associated with a driver that is able to handle faults 4516 * and recover from faults. 4517 */ 4518 /* ARGSUSED */ 4519 static int 4520 rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr, 4521 const void *not_used) 4522 { 4523 rootnex_window_t *window; 4524 uint64_t start_addr; 4525 uint64_t fault_addr; 4526 ddi_dma_impl_t *hp; 4527 rootnex_dma_t *dma; 4528 uint64_t end_addr; 4529 size_t csize; 4530 int i; 4531 int j; 4532 4533 4534 /* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */ 4535 hp = (ddi_dma_impl_t *)handle; 4536 ASSERT(hp); 4537 4538 dma = (rootnex_dma_t *)hp->dmai_private; 4539 4540 /* Get the address that we need to search for */ 4541 fault_addr = *(uint64_t *)addr; 4542 4543 /* 4544 * if we don't have any windows, we can just walk through all the 4545 * cookies. 4546 */ 4547 if (dma->dp_window == NULL) { 4548 /* for each cookie */ 4549 for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) { 4550 /* 4551 * if the faulted address is within the physical address 4552 * range of the cookie, return DDI_FM_NONFATAL. 4553 */ 4554 if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) && 4555 (fault_addr <= (dma->dp_cookies[i].dmac_laddress + 4556 dma->dp_cookies[i].dmac_size))) { 4557 return (DDI_FM_NONFATAL); 4558 } 4559 } 4560 4561 /* fault_addr not within this DMA handle */ 4562 return (DDI_FM_UNKNOWN); 4563 } 4564 4565 /* we have mutiple windows, walk through each window */ 4566 for (i = 0; i < hp->dmai_nwin; i++) { 4567 window = &dma->dp_window[i]; 4568 4569 /* Go through all the cookies in the window */ 4570 for (j = 0; j < window->wd_cookie_cnt; j++) { 4571 4572 start_addr = window->wd_first_cookie[j].dmac_laddress; 4573 csize = window->wd_first_cookie[j].dmac_size; 4574 4575 /* 4576 * if we are trimming the first cookie in the window, 4577 * and this is the first cookie, adjust the start 4578 * address and size of the cookie to account for the 4579 * trim. 4580 */ 4581 if (window->wd_trim.tr_trim_first && (j == 0)) { 4582 start_addr = window->wd_trim.tr_first_paddr; 4583 csize = window->wd_trim.tr_first_size; 4584 } 4585 4586 /* 4587 * if we are trimming the last cookie in the window, 4588 * and this is the last cookie, adjust the start 4589 * address and size of the cookie to account for the 4590 * trim. 4591 */ 4592 if (window->wd_trim.tr_trim_last && 4593 (j == (window->wd_cookie_cnt - 1))) { 4594 start_addr = window->wd_trim.tr_last_paddr; 4595 csize = window->wd_trim.tr_last_size; 4596 } 4597 4598 end_addr = start_addr + csize; 4599 4600 /* 4601 * if the faulted address is within the physical address 4602 * range of the cookie, return DDI_FM_NONFATAL. 4603 */ 4604 if ((fault_addr >= start_addr) && 4605 (fault_addr <= end_addr)) { 4606 return (DDI_FM_NONFATAL); 4607 } 4608 } 4609 } 4610 4611 /* fault_addr not within this DMA handle */ 4612 return (DDI_FM_UNKNOWN); 4613 } 4614