1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 #define PSMI_1_5 30 31 #include <sys/mutex.h> 32 #include <sys/types.h> 33 #include <sys/time.h> 34 #include <sys/machlock.h> 35 #include <sys/smp_impldefs.h> 36 #include <sys/uadmin.h> 37 #include <sys/promif.h> 38 #include <sys/psm.h> 39 #include <sys/pit.h> 40 #include <sys/psm_common.h> 41 #include <sys/atomic.h> 42 43 #define NSEC_IN_SEC 1000000000 44 45 /* 46 * External References 47 */ 48 extern int intr_clear(void); 49 extern void intr_restore(uint_t); 50 51 /* 52 * Local Function Prototypes 53 */ 54 static void uppc_softinit(void); 55 static void uppc_picinit(); 56 static int uppc_clkinit(int); 57 static int uppc_addspl(int irqno, int ipl, int min_ipl, int max_ipl); 58 static int uppc_delspl(int irqno, int ipl, int min_ipl, int max_ipl); 59 static processorid_t uppc_get_next_processorid(processorid_t cpu_id); 60 static int uppc_get_clockirq(int ipl); 61 static int uppc_probe(void); 62 static int uppc_translate_irq(dev_info_t *dip, int irqno); 63 static void uppc_shutdown(int cmd, int fcn); 64 static void uppc_preshutdown(int cmd, int fcn); 65 static int uppc_init_acpi(void); 66 static void uppc_setspl(int); 67 static int uppc_intr_enter(int, int *); 68 static void uppc_intr_exit(int, int); 69 static hrtime_t uppc_gethrtime(); 70 71 static int uppc_acpi_irq_configure(acpi_psm_lnk_t *acpipsmlnkp, dev_info_t *dip, 72 int *pci_irqp, iflag_t *intr_flagp); 73 74 /* 75 * Global Data 76 */ 77 static struct standard_pic pics0; 78 int uppc_use_acpi = 1; /* Use ACPI by default */ 79 int uppc_enable_acpi = 0; 80 81 82 /* 83 * For interrupt link devices, if uppc_unconditional_srs is set, an irq resource 84 * will be assigned (via _SRS). If it is not set, use the current 85 * irq setting (via _CRS), but only if that irq is in the set of possible 86 * irqs (returned by _PRS) for the device. 87 */ 88 int uppc_unconditional_srs = 1; 89 90 /* 91 * For interrupt link devices, if uppc_prefer_crs is set when we are 92 * assigning an IRQ resource to a device, prefer the current IRQ setting 93 * over other possible irq settings under same conditions. 94 */ 95 int uppc_prefer_crs = 1; 96 97 int uppc_verbose = 0; 98 99 /* flag definitions for uppc_verbose */ 100 #define UPPC_VERBOSE_IRQ_FLAG 0x00000001 101 #define UPPC_VERBOSE_POWEROFF_FLAG 0x00000002 102 #define UPPC_VERBOSE_POWEROFF_PAUSE_FLAG 0x00000004 103 104 105 #define UPPC_VERBOSE_IRQ(fmt) \ 106 if (uppc_verbose & UPPC_VERBOSE_IRQ_FLAG) \ 107 cmn_err fmt; 108 109 #define UPPC_VERBOSE_POWEROFF(fmt) \ 110 if (uppc_verbose & UPPC_VERBOSE_POWEROFF_FLAG) \ 111 prom_printf fmt; 112 113 uchar_t uppc_reserved_irqlist[MAX_ISA_IRQ + 1]; 114 115 static uint16_t uppc_irq_shared_table[MAX_ISA_IRQ + 1]; 116 117 /* 118 * Contains SCI irqno from FADT after initialization 119 */ 120 static int uppc_sci = -1; 121 122 /* 123 * Local Static Data 124 */ 125 126 static lock_t uppc_gethrtime_lock; 127 static hrtime_t uppc_lasthrtime; 128 129 130 #ifdef UPPC_DEBUG 131 #define DENT 0x0001 132 133 static int uppc_debug = 0; 134 135 136 #endif 137 138 139 static struct psm_ops uppc_ops = { 140 uppc_probe, /* psm_probe */ 141 142 uppc_softinit, /* psm_init */ 143 uppc_picinit, /* psm_picinit */ 144 uppc_intr_enter, /* psm_intr_enter */ 145 uppc_intr_exit, /* psm_intr_exit */ 146 uppc_setspl, /* psm_setspl */ 147 uppc_addspl, /* psm_addspl */ 148 uppc_delspl, /* psm_delspl */ 149 (int (*)(processorid_t))NULL, /* psm_disable_intr */ 150 (void (*)(processorid_t))NULL, /* psm_enable_intr */ 151 (int (*)(int))NULL, /* psm_softlvl_to_irq */ 152 (void (*)(int))NULL, /* psm_set_softintr */ 153 (void (*)(processorid_t))NULL, /* psm_set_idlecpu */ 154 (void (*)(processorid_t))NULL, /* psm_unset_idlecpu */ 155 156 uppc_clkinit, /* psm_clkinit */ 157 uppc_get_clockirq, /* psm_get_clockirq */ 158 (void (*)(void))NULL, /* psm_hrtimeinit */ 159 uppc_gethrtime, /* psm_gethrtime */ 160 161 uppc_get_next_processorid, /* psm_get_next_processorid */ 162 (void (*)(processorid_t, caddr_t))NULL, /* psm_cpu_start */ 163 (int (*)(void))NULL, /* psm_post_cpu_start */ 164 uppc_shutdown, /* psm_shutdown */ 165 (int (*)(int, int))NULL, /* psm_get_ipivect */ 166 (void (*)(processorid_t, int))NULL, /* psm_send_ipi */ 167 168 uppc_translate_irq, /* psm_translate_irq */ 169 170 (int (*)(todinfo_t *))NULL, /* psm_tod_get */ 171 (int (*)(todinfo_t *))NULL, /* psm_tod_set */ 172 173 (void (*)(int, char *))NULL, /* psm_notify_error */ 174 (void (*)(int msg))NULL, /* psm_notify_func */ 175 (void (*)(hrtime_t time))NULL, /* psm_timer_reprogram */ 176 (void (*)(void))NULL, /* psm_timer_enable */ 177 (void (*)(void))NULL, /* psm_timer_disable */ 178 (void (*)(void *arg))NULL, /* psm_post_cyclic_setup */ 179 uppc_preshutdown, /* psm_preshutdown */ 180 181 (int (*)(dev_info_t *, ddi_intr_handle_impl_t *, 182 psm_intr_op_t, int *))NULL /* psm_intr_ops */ 183 }; 184 185 186 static struct psm_info uppc_info = { 187 PSM_INFO_VER01_5, /* version */ 188 PSM_OWN_SYS_DEFAULT, /* ownership */ 189 (struct psm_ops *)&uppc_ops, /* operation */ 190 "uppc", /* machine name */ 191 "UniProcessor PC", /* machine descriptions */ 192 }; 193 194 /* 195 * Configuration Data 196 */ 197 198 /* 199 * This is the loadable module wrapper. 200 */ 201 #include <sys/modctl.h> 202 203 static void *uppc_hdlp; 204 205 int 206 _init(void) 207 { 208 return (psm_mod_init(&uppc_hdlp, &uppc_info)); 209 } 210 211 int 212 _fini(void) 213 { 214 return (psm_mod_fini(&uppc_hdlp, &uppc_info)); 215 } 216 217 int 218 _info(struct modinfo *modinfop) 219 { 220 return (psm_mod_info(&uppc_hdlp, &uppc_info, modinfop)); 221 } 222 223 /* 224 * Autoconfiguration Routines 225 */ 226 227 static int 228 uppc_probe(void) 229 { 230 231 232 return (PSM_SUCCESS); 233 } 234 235 static void 236 uppc_softinit(void) 237 { 238 struct standard_pic *pp; 239 int i; 240 241 pp = &pics0; 242 243 244 if (uppc_use_acpi && uppc_init_acpi()) { 245 build_reserved_irqlist((uchar_t *)uppc_reserved_irqlist); 246 for (i = 0; i <= MAX_ISA_IRQ; i++) 247 uppc_irq_shared_table[i] = 0; 248 uppc_enable_acpi = 1; 249 } 250 251 /* 252 * initialize the ipl mask 253 */ 254 for (i = 0; i < (MAXIPL << 1); i += 2) { 255 /* enable slave lines on master */ 256 pp->c_iplmask[i] = 0xff; 257 pp->c_iplmask[i+1] = (0xff & ~(1 << MASTERLINE)); 258 } 259 } 260 261 /*ARGSUSED*/ 262 static int 263 uppc_clkinit(int hertz) 264 { 265 ulong_t clkticks = PIT_HZ / hz; 266 267 if (hertz == 0) 268 return (0); /* One shot mode not supported */ 269 270 /* 271 * program timer 0 272 */ 273 outb(PITCTL_PORT, (PIT_C0|PIT_NDIVMODE|PIT_READMODE)); 274 outb(PITCTR0_PORT, (uchar_t)clkticks); 275 outb(PITCTR0_PORT, (uchar_t)(clkticks>>8)); 276 277 return (NSEC_IN_SEC / hertz); 278 } 279 280 static void 281 uppc_picinit() 282 { 283 picsetup(); 284 285 /* 286 * If a valid SCI is present, manually addspl() 287 * since we're not set-up early enough in boot 288 * to do it "conventionally" (via add_avintr) 289 */ 290 if (uppc_sci >= 0) 291 (void) uppc_addspl(uppc_sci, SCI_IPL, SCI_IPL, SCI_IPL); 292 } 293 294 /*ARGSUSED3*/ 295 static int 296 uppc_addspl(int irqno, int ipl, int min_ipl, int max_ipl) 297 { 298 struct standard_pic *pp; 299 int i; 300 int startidx; 301 uchar_t vectmask; 302 303 if (ipl != min_ipl) 304 return (0); 305 306 if (irqno > 7) { 307 vectmask = 1 << (irqno - 8); 308 startidx = (ipl << 1); 309 } else { 310 vectmask = 1 << irqno; 311 startidx = (ipl << 1) + 1; 312 } 313 314 if (irqno <= MAX_ISA_IRQ) 315 atomic_add_16(&uppc_irq_shared_table[irqno], 1); 316 317 /* 318 * mask intr same or above ipl 319 * level MAXIPL has all intr off as init. default 320 */ 321 pp = &pics0; 322 for (i = startidx; i < (MAXIPL << 1); i += 2) { 323 if (pp->c_iplmask[i] & vectmask) 324 break; 325 pp->c_iplmask[i] |= vectmask; 326 } 327 328 /* 329 * unmask intr below ipl 330 */ 331 for (i = startidx-2; i >= 0; i -= 2) { 332 if (!(pp->c_iplmask[i] & vectmask)) 333 break; 334 pp->c_iplmask[i] &= ~vectmask; 335 } 336 return (0); 337 } 338 339 static int 340 uppc_delspl(int irqno, int ipl, int min_ipl, int max_ipl) 341 { 342 struct standard_pic *pp; 343 int i; 344 uchar_t vectmask; 345 346 /* 347 * skip if we are not deleting the last handler 348 * and the ipl is higher than minimum 349 */ 350 if ((max_ipl != PSM_INVALID_IPL) && (ipl >= min_ipl)) 351 return (0); 352 353 if (irqno > 7) { 354 vectmask = 1 << (irqno - 8); 355 i = 0; 356 } else { 357 vectmask = 1 << irqno; 358 i = 1; 359 } 360 361 if (irqno <= MAX_ISA_IRQ) 362 atomic_add_16(&uppc_irq_shared_table[irqno], -1); 363 364 pp = &pics0; 365 366 /* 367 * check any handlers left for this irqno 368 */ 369 if (max_ipl != PSM_INVALID_IPL) { 370 /* 371 * unmasks all levels below the lowest priority 372 */ 373 i += ((min_ipl - 1) << 1); 374 for (; i >= 0; i -= 2) { 375 if (!(pp->c_iplmask[i] & vectmask)) 376 break; 377 pp->c_iplmask[i] &= ~vectmask; 378 } 379 } else { 380 /* 381 * set mask to all levels 382 */ 383 for (; i < (MAXIPL << 1); i += 2) { 384 if (pp->c_iplmask[i] & vectmask) 385 break; 386 pp->c_iplmask[i] |= vectmask; 387 } 388 } 389 return (0); 390 } 391 392 static processorid_t 393 uppc_get_next_processorid(processorid_t cpu_id) 394 { 395 if (cpu_id == -1) 396 return (0); 397 return (-1); 398 } 399 400 /*ARGSUSED*/ 401 static int 402 uppc_get_clockirq(int ipl) 403 { 404 return (CLOCK_VECTOR); 405 } 406 407 408 static int 409 uppc_init_acpi(void) 410 { 411 int verboseflags = 0; 412 int sci; 413 int elcr_port, elcr_bit; 414 iflag_t sci_flags; 415 416 /* 417 * Process SCI configuration here; this may return 418 * an error if acpi-user-options has specified 419 * legacy mode (use ACPI without ACPI mode or SCI) 420 */ 421 if (acpica_get_sci(&sci, &sci_flags) != AE_OK) 422 sci = -1; 423 424 /* 425 * Initialize sub-system - if error is returns, ACPI is not 426 * used. 427 */ 428 if (acpica_init() != AE_OK) 429 return (0); 430 431 /* 432 * uppc implies system is in PIC mode; set edge/level 433 * via ELCR based on return value from get_sci; this 434 * will default to level/low if no override present, 435 * as recommended by Intel ACPI CA team. 436 */ 437 if (sci >= 0) { 438 elcr_port = ELCR_PORT1 + (sci >> 3); 439 elcr_bit = 1 << (sci & 0x07); 440 441 ASSERT((sci_flags.intr_el == INTR_EL_LEVEL) || 442 (sci_flags.intr_el == INTR_EL_EDGE)); 443 444 switch (sci_flags.intr_el) { 445 case INTR_EL_LEVEL: 446 /* set bit to force level-triggered mode */ 447 outb(elcr_port, inb(elcr_port) | elcr_bit); 448 break; 449 case INTR_EL_EDGE: 450 /* clear bit to force edge-triggered mode */ 451 outb(elcr_port, inb(elcr_port) & ~elcr_bit); 452 break; 453 } 454 } 455 456 /* 457 * Remember SCI for later use 458 */ 459 uppc_sci = sci; 460 461 if (uppc_verbose & UPPC_VERBOSE_IRQ_FLAG) 462 verboseflags |= PSM_VERBOSE_IRQ_FLAG; 463 464 if (uppc_verbose & UPPC_VERBOSE_POWEROFF_FLAG) 465 verboseflags |= PSM_VERBOSE_POWEROFF_FLAG; 466 467 if (uppc_verbose & UPPC_VERBOSE_POWEROFF_PAUSE_FLAG) 468 verboseflags |= PSM_VERBOSE_POWEROFF_PAUSE_FLAG; 469 470 if (acpi_psm_init(uppc_info.p_mach_idstring, verboseflags) == 471 ACPI_PSM_FAILURE) { 472 return (0); 473 } 474 475 return (1); 476 } 477 478 479 static void 480 uppc_preshutdown(int cmd, int fcn) 481 { 482 UPPC_VERBOSE_POWEROFF(("uppc_preshutdown(%d,%d);\n", cmd, fcn)); 483 484 if ((cmd != A_SHUTDOWN) || (fcn != AD_POWEROFF)) { 485 return; 486 } 487 488 if (uppc_enable_acpi) { 489 UPPC_VERBOSE_POWEROFF(("uppc_preshutdown: ACPI enabled\n")); 490 } else { 491 UPPC_VERBOSE_POWEROFF(("uppc_preshutdown: ACPI not enabled\n")); 492 } 493 } 494 495 static void 496 uppc_shutdown(int cmd, int fcn) 497 { 498 UPPC_VERBOSE_POWEROFF(("uppc_shutdown(%d,%d);\n", cmd, fcn)); 499 500 if ((cmd != A_SHUTDOWN) || (fcn != AD_POWEROFF)) { 501 return; 502 } 503 if (uppc_enable_acpi) 504 (void) acpi_poweroff(); 505 } 506 507 static int 508 uppc_acpi_translate_pci_irq(dev_info_t *dip, int busid, int devid, 509 int ipin, int *pci_irqp, iflag_t *intr_flagp) 510 { 511 int status; 512 acpi_psm_lnk_t acpipsmlnk; 513 514 if ((status = acpi_get_irq_cache_ent(busid, devid, ipin, pci_irqp, 515 intr_flagp)) == ACPI_PSM_SUCCESS) { 516 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: Found irqno %d " 517 "from cache for device %s, instance #%d\n", *pci_irqp, 518 ddi_get_name(dip), ddi_get_instance(dip))); 519 return (status); 520 } 521 522 bzero(&acpipsmlnk, sizeof (acpi_psm_lnk_t)); 523 524 if ((status = acpi_translate_pci_irq(dip, ipin, pci_irqp, 525 intr_flagp, &acpipsmlnk)) == ACPI_PSM_FAILURE) { 526 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: " 527 " acpi_translate_pci_irq failed for device %s, instance" 528 " #%d\n", ddi_get_name(dip), ddi_get_instance(dip))); 529 530 return (status); 531 } 532 533 if (status == ACPI_PSM_PARTIAL && acpipsmlnk.lnkobj != NULL) { 534 status = uppc_acpi_irq_configure(&acpipsmlnk, dip, pci_irqp, 535 intr_flagp); 536 if (status != ACPI_PSM_SUCCESS) { 537 status = acpi_get_current_irq_resource(&acpipsmlnk, 538 pci_irqp, intr_flagp); 539 } 540 } 541 542 if (status == ACPI_PSM_SUCCESS) { 543 acpi_new_irq_cache_ent(busid, devid, ipin, *pci_irqp, 544 intr_flagp, &acpipsmlnk); 545 546 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: [ACPI] " 547 "new irq %d for device %s, instance #%d\n", 548 *pci_irqp, ddi_get_name(dip), ddi_get_instance(dip))); 549 } 550 551 return (status); 552 } 553 554 /* 555 * Configures the irq for the interrupt link device identified by 556 * acpipsmlnkp. 557 * 558 * Gets the current and the list of possible irq settings for the 559 * device. If uppc_unconditional_srs is not set, and the current 560 * resource setting is in the list of possible irq settings, 561 * current irq resource setting is passed to the caller. 562 * 563 * Otherwise, picks an irq number from the list of possible irq 564 * settings, and sets the irq of the device to this value. 565 * If prefer_crs is set, among a set of irq numbers in the list that have 566 * the least number of devices sharing the interrupt, we pick current irq 567 * resource setting if it is a member of this set. 568 * 569 * Passes the irq number in the value pointed to by pci_irqp, and 570 * polarity and sensitivity in the structure pointed to by dipintrflagp 571 * to the caller. 572 * 573 * Note that if setting the irq resource failed, but successfuly obtained 574 * the current irq resource settings, passes the current irq resources 575 * and considers it a success. 576 * 577 * Returns: 578 * ACPI_PSM_SUCCESS on success. 579 * 580 * ACPI_PSM_FAILURE if an error occured during the configuration or 581 * if a suitable irq was not found for this device, or if setting the 582 * irq resource and obtaining the current resource fails. 583 * 584 */ 585 static int 586 uppc_acpi_irq_configure(acpi_psm_lnk_t *acpipsmlnkp, dev_info_t *dip, 587 int *pci_irqp, iflag_t *dipintr_flagp) 588 { 589 int i, min_share, foundnow, done = 0; 590 int32_t irq; 591 int32_t share_irq = -1; 592 int32_t chosen_irq = -1; 593 int cur_irq = -1; 594 acpi_irqlist_t *irqlistp; 595 acpi_irqlist_t *irqlistent; 596 597 if ((acpi_get_possible_irq_resources(acpipsmlnkp, &irqlistp)) 598 == ACPI_PSM_FAILURE) { 599 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: Unable to determine " 600 "or assign IRQ for device %s, instance #%d: The system was " 601 "unable to get the list of potential IRQs from ACPI.", 602 ddi_get_name(dip), ddi_get_instance(dip))); 603 604 return (ACPI_PSM_FAILURE); 605 } 606 607 if ((acpi_get_current_irq_resource(acpipsmlnkp, &cur_irq, 608 dipintr_flagp) == ACPI_PSM_SUCCESS) && (!uppc_unconditional_srs) && 609 (cur_irq > 0)) { 610 611 if (acpi_irqlist_find_irq(irqlistp, cur_irq, NULL) 612 == ACPI_PSM_SUCCESS) { 613 614 acpi_free_irqlist(irqlistp); 615 ASSERT(pci_irqp != NULL); 616 *pci_irqp = cur_irq; 617 return (ACPI_PSM_SUCCESS); 618 } 619 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: Could not find the " 620 "current irq %d for device %s, instance #%d in ACPI's " 621 "list of possible irqs for this device. Picking one from " 622 " the latter list.", cur_irq, ddi_get_name(dip), 623 ddi_get_instance(dip))); 624 625 } 626 627 irqlistent = irqlistp; 628 min_share = 255; 629 630 while (irqlistent != NULL) { 631 632 for (foundnow = 0, i = 0; i < irqlistent->num_irqs; i++) { 633 634 irq = irqlistp->irqs[i]; 635 636 if ((irq > MAX_ISA_IRQ) || 637 (irqlistent->intr_flags.intr_el == INTR_EL_EDGE) || 638 (irq == 0)) 639 continue; 640 641 if (uppc_reserved_irqlist[irq]) 642 continue; 643 644 if (uppc_irq_shared_table[irq] == 0) { 645 chosen_irq = irq; 646 foundnow = 1; 647 if (!(uppc_prefer_crs) || (irq == cur_irq)) { 648 done = 1; 649 break; 650 } 651 } 652 653 if ((uppc_irq_shared_table[irq] < min_share) || 654 ((uppc_irq_shared_table[irq] == min_share) && 655 (cur_irq == irq) && (uppc_prefer_crs))) { 656 min_share = uppc_irq_shared_table[irq]; 657 share_irq = irq; 658 foundnow = 1; 659 } 660 } 661 662 /* If we found an IRQ in the inner loop, save the details */ 663 if (foundnow && ((chosen_irq != -1) || (share_irq != -1))) { 664 /* 665 * Copy the acpi_prs_private_t and flags from this 666 * irq list entry, since we found an irq from this 667 * entry. 668 */ 669 acpipsmlnkp->acpi_prs_prv = irqlistent->acpi_prs_prv; 670 *dipintr_flagp = irqlistent->intr_flags; 671 } 672 673 if (done) 674 break; 675 676 /* Load the next entry in the irqlist */ 677 irqlistent = irqlistent->next; 678 } 679 680 acpi_free_irqlist(irqlistp); 681 682 if (chosen_irq != -1) 683 irq = chosen_irq; 684 else if (share_irq != -1) 685 irq = share_irq; 686 else { 687 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: Could not find a " 688 "suitable irq from the list of possible irqs for device " 689 "%s, instance #%d in ACPI's list of possible\n", 690 ddi_get_name(dip), ddi_get_instance(dip))); 691 692 return (ACPI_PSM_FAILURE); 693 } 694 695 696 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: Setting irq %d for device %s " 697 "instance #%d\n", irq, ddi_get_name(dip), ddi_get_instance(dip))); 698 699 if ((acpi_set_irq_resource(acpipsmlnkp, irq)) == ACPI_PSM_SUCCESS) { 700 /* 701 * setting irq was successful, check to make sure CRS 702 * reflects that. If CRS does not agree with what we 703 * set, return the irq that was set. 704 */ 705 706 if (acpi_get_current_irq_resource(acpipsmlnkp, &cur_irq, 707 dipintr_flagp) == ACPI_PSM_SUCCESS) { 708 709 if (cur_irq != irq) 710 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: " 711 "IRQ resource set (irqno %d) for device %s " 712 "instance #%d, differs from current " 713 "setting irqno %d", 714 irq, ddi_get_name(dip), 715 ddi_get_instance(dip), cur_irq)); 716 } 717 /* 718 * return the irq that was set, and not what CRS reports, 719 * since CRS has been seen to be bogus on some systems 720 */ 721 cur_irq = irq; 722 } else { 723 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: set resource irq %d " 724 "failed for device %s instance #%d", 725 irq, ddi_get_name(dip), ddi_get_instance(dip))); 726 if (cur_irq == -1) 727 return (ACPI_PSM_FAILURE); 728 } 729 730 ASSERT(pci_irqp != NULL); 731 *pci_irqp = cur_irq; 732 return (ACPI_PSM_SUCCESS); 733 } 734 735 736 /*ARGSUSED*/ 737 static int 738 uppc_translate_irq(dev_info_t *dip, int irqno) 739 { 740 char dev_type[16]; 741 int dev_len, pci_irq, devid, busid; 742 ddi_acc_handle_t cfg_handle; 743 uchar_t ipin; 744 iflag_t intr_flag; 745 746 if (dip == NULL) { 747 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: irqno = %d" 748 " dip = NULL\n", irqno)); 749 return (irqno); 750 } 751 752 if (!uppc_enable_acpi) { 753 return (irqno); 754 } 755 756 dev_len = sizeof (dev_type); 757 if (ddi_getlongprop_buf(DDI_DEV_T_NONE, ddi_get_parent(dip), 758 DDI_PROP_DONTPASS, "device_type", (caddr_t)dev_type, 759 &dev_len) != DDI_PROP_SUCCESS) { 760 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: irqno %d" 761 "device %s instance %d no device_type\n", irqno, 762 ddi_get_name(dip), ddi_get_instance(dip))); 763 return (irqno); 764 } 765 766 if (strcmp(dev_type, "pci") == 0) { 767 768 /* pci device */ 769 if (acpica_get_bdf(dip, &busid, &devid, NULL) != 0) 770 return (irqno); 771 772 if (pci_config_setup(dip, &cfg_handle) != DDI_SUCCESS) 773 return (irqno); 774 775 ipin = pci_config_get8(cfg_handle, PCI_CONF_IPIN) - PCI_INTA; 776 pci_config_teardown(&cfg_handle); 777 if (uppc_acpi_translate_pci_irq(dip, busid, devid, 778 ipin, &pci_irq, &intr_flag) == ACPI_PSM_SUCCESS) { 779 780 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: [ACPI] new irq " 781 "%d old irq %d device %s, instance %d\n", pci_irq, 782 irqno, ddi_get_name(dip), ddi_get_instance(dip))); 783 784 /* 785 * Make sure pci_irq is within range. 786 * Otherwise, fall through and return irqno. 787 */ 788 if (pci_irq <= MAX_ISA_IRQ) 789 return (pci_irq); 790 } 791 792 /* FALLTHRU to common case - returning irqno */ 793 } else { 794 /* non pci */ 795 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: non-pci," 796 "irqno %d device %s instance %d\n", irqno, 797 ddi_get_name(dip), ddi_get_instance(dip))); 798 } 799 800 return (irqno); 801 } 802 803 /* 804 * uppc_intr_enter() raises the ipl to the level of the current interrupt, 805 * and sends EOI to the pics. 806 * If interrupt is 7 or 15 and not spurious interrupt, send specific EOI 807 * else send non-specific EOI 808 * uppc_intr_enter() returns the new priority level, 809 * or -1 for spurious interrupt 810 */ 811 static int 812 uppc_intr_enter(int ipl, int *vector) 813 { 814 int newipl; 815 int intno; 816 817 intno = (*vector); 818 819 ASSERT(intno < 256); 820 821 newipl = autovect[intno].avh_hi_pri; 822 823 /* 824 * During wait_till_seen() periods when interrupt vector is being 825 * removed in remove_av(), the removed hardware interrupt could 826 * trigger and got here with newipl 0. It has to send EOI 827 * as usual but no need to call setspl and returns -1 like spurious. 828 */ 829 if ((intno & 7) != 7) { 830 if (newipl) 831 uppc_setspl(newipl); 832 outb(MCMD_PORT, PIC_NSEOI); 833 if (intno >= 8) { 834 outb(SCMD_PORT, PIC_NSEOI); 835 } 836 } else { /* int was 7 or 15 */ 837 if (newipl && newipl <= ipl) { /* Check for spurious int */ 838 if (intno != 7) 839 outb(MCMD_PORT, PIC_NSEOI); 840 return (-1); /* Spurious int */ 841 } else { 842 if (newipl) 843 uppc_setspl(newipl); 844 if (intno != 7) { 845 outb(MCMD_PORT, PIC_NSEOI); 846 outb(SCMD_PORT, PIC_SEOI_LVL7); 847 } else { 848 outb(MCMD_PORT, PIC_SEOI_LVL7); 849 } 850 } 851 } 852 853 if (newipl) 854 return (newipl); 855 else 856 return (-1); /* not real spurious int */ 857 } 858 859 /* 860 * uppc_intr_exit() restores the old interrupt 861 * priority level after processing an interrupt. 862 * It is called with interrupts disabled, and does not enable interrupts. 863 */ 864 /* ARGSUSED */ 865 static void 866 uppc_intr_exit(int ipl, int vector) 867 { 868 uppc_setspl(ipl); 869 } 870 871 /* 872 * uppc_setspl() loads new interrupt masks into the pics 873 * based on input ipl. 874 */ 875 /* ARGSUSED */ 876 static void 877 uppc_setspl(int ipl) 878 { 879 struct standard_pic *pp; 880 uint8_t smask, mmask; 881 uint8_t cursmask, curmmask; 882 883 pp = &pics0; 884 smask = pp->c_iplmask[ipl * 2]; 885 mmask = pp->c_iplmask[ipl * 2 + 1]; 886 cursmask = pp->c_curmask[0]; 887 curmmask = pp->c_curmask[1]; 888 if (cursmask == smask && curmmask == mmask) 889 return; 890 pp->c_curmask[0] = smask; 891 pp->c_curmask[1] = mmask; 892 893 if (cursmask != smask) { 894 /* 895 * program new slave pic mask 896 */ 897 outb(SIMR_PORT, smask); 898 } 899 if (curmmask != mmask) { 900 /* 901 * program new master pic mask 902 */ 903 outb(MIMR_PORT, mmask); 904 } 905 /* 906 * read master to allow pics to settle 907 */ 908 (void) inb(MIMR_PORT); 909 } 910 911 /* 912 * uppc_gethrtime() returns high resolution timer value 913 */ 914 static hrtime_t 915 uppc_gethrtime() 916 { 917 hrtime_t timeval, temp; 918 unsigned int oflags, ctr0; 919 920 oflags = intr_clear(); /* disable ints */ 921 lock_set(&uppc_gethrtime_lock); 922 retry: 923 temp = hrtime_base; 924 outb(PITCTL_PORT, 0); /* latch counter 0 */ 925 /* 926 * read counter 0 927 */ 928 ctr0 = inb(PITCTR0_PORT); 929 ctr0 |= inb(PITCTR0_PORT) << 8; 930 timeval = (hrtime_t)ctr0 * (NANOSEC / PIT_HZ); 931 if (temp != hrtime_base) 932 goto retry; 933 timeval -= temp; 934 if (timeval < uppc_lasthrtime) 935 timeval = uppc_lasthrtime; 936 uppc_lasthrtime = timeval; 937 lock_clear(&uppc_gethrtime_lock); 938 intr_restore(oflags); 939 return (timeval); 940 } 941