xref: /titanic_51/usr/src/uts/i86pc/io/ppm.conf (revision 4596d7e96cbde86cd5bd70b9cd44960693e88271)
15cff7825Smh27603#
25cff7825Smh27603# CDDL HEADER START
35cff7825Smh27603#
45cff7825Smh27603# The contents of this file are subject to the terms of the
55cff7825Smh27603# Common Development and Distribution License (the "License").
65cff7825Smh27603# You may not use this file except in compliance with the License.
75cff7825Smh27603#
85cff7825Smh27603# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
95cff7825Smh27603# or http://www.opensolaris.org/os/licensing.
105cff7825Smh27603# See the License for the specific language governing permissions
115cff7825Smh27603# and limitations under the License.
125cff7825Smh27603#
135cff7825Smh27603# When distributing Covered Code, include this CDDL HEADER in each
145cff7825Smh27603# file and include the License file at usr/src/OPENSOLARIS.LICENSE.
155cff7825Smh27603# If applicable, add the following below this CDDL HEADER, with the
165cff7825Smh27603# fields enclosed by brackets "[]" replaced with your own identifying
175cff7825Smh27603# information: Portions Copyright [yyyy] [name of copyright owner]
185cff7825Smh27603#
195cff7825Smh27603# CDDL HEADER END
205cff7825Smh27603#
215cff7825Smh27603#
22*4596d7e9SGuoli Shu# Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
235cff7825Smh27603# Use is subject to license terms.
245cff7825Smh27603#
255cff7825Smh27603
265cff7825Smh27603name="ppm" parent="pseudo" instance=0;
275cff7825Smh27603
285cff7825Smh27603#
295cff7825Smh27603# ppm configuration format
305cff7825Smh27603#
315cff7825Smh27603# "ppm-domains" - in form of "domain_xxx" where "xxx" string highlights
325cff7825Smh27603# the nature of the domain;
335cff7825Smh27603#
345cff7825Smh27603# "domain_xxx-model" - PM model: CPU
352df1fe9cSrandyf# "domain_xxx-model" - PM model: SX
365cff7825Smh27603#
375cff7825Smh27603# "domain_xxx-propname" - a property name that is exported by device in
385cff7825Smh27603# a domain.  Currently, it is used by PCI_PROP model to identify devices
395cff7825Smh27603# that are to have their clocks stopped when all power-manageable devices
405cff7825Smh27603# in the domain are at D3 power level.
415cff7825Smh27603#
425cff7825Smh27603# "domain-xxx-devices" - a list of prom path match patterns to match devices
435cff7825Smh27603# that fall into "domain_xxx", where wildcard '*' is allowed by observing
445cff7825Smh27603# the following expectations:
455cff7825Smh27603#	. a single wildcard with exact match up to (but exclude) the wildcard
465cff7825Smh27603#	  which then terminates the match pattern;
475cff7825Smh27603#	. a single wildcard that does not terminate a match pattern must
485cff7825Smh27603#	  match driver name (followed by '@');
495cff7825Smh27603#	. with two wildcard occurences, the first is to match driver name,
505cff7825Smh27603#	  the second function id, as well as the last character of the match
515cff7825Smh27603#	  pattern.
525cff7825Smh27603#
535cff7825Smh27603# "domain-xxx-ctrl" - blank space separated definitions in the form of
545cff7825Smh27603# keyword=definition [keyword=definition...]
555cff7825Smh27603#    The keywords are as follows, where 'method' must come before mask as it
565cff7825Smh27603#       tells how to store 'mask' and 'val'.  Missing 'val' defaults to 0.
575cff7825Smh27603#
585cff7825Smh27603#    which keywords apply depends on cmd.  There are two sets as shown below.
595cff7825Smh27603#    Here is the first:
602df1fe9cSrandyf#	cmd=[ENTER_S3 | ENTER_S4]
615cff7825Smh27603# 	path=<prompath>	- control device's prom pathname (includes minor)
625cff7825Smh27603# 	method=[KIO|I2CKIO]	This selects a method which may be
635cff7825Smh27603#		an ioctl that sets a single value or an i2c ioctl that
645cff7825Smh27603#		takes a value and a mask to access gpio register
655cff7825Smh27603#	iord=<integer> - value of ioctl command for reading
665cff7825Smh27603#	iowr=<integer> - value of ioctl command for writing
675cff7825Smh27603# 	val=<integer>	- a single integer value, generally the value to which
685cff7825Smh27603#			  the relevant bits of a register will be set
695cff7825Smh27603#	mask=<integer>	- which bits of val are relevant (if method is I2CKIO)
705cff7825Smh27603#
712df1fe9cSrandyfppm-domains="domain_cpu" , "domain_estar";
725cff7825Smh27603
732df1fe9cSrandyf#
742df1fe9cSrandyf# CPU domain
752df1fe9cSrandyf#
765cff7825Smh27603domain_cpu-devices="/cpus/cpu@*";
775cff7825Smh27603domain_cpu-model="CPU";
782df1fe9cSrandyf
792df1fe9cSrandyf#
802df1fe9cSrandyf# Estar domain
812df1fe9cSrandyf#   0x4101 is APPMIOC_ENTER_S3	(('A' << 8) | 1)
822df1fe9cSrandyf#   0x4102 is APPMIOC_EXIT_S3	(('A' << 8) | 2)
832df1fe9cSrandyf#
842df1fe9cSrandyfdomain_estar-devices="/";
852df1fe9cSrandyfdomain_estar-model="SX";
862df1fe9cSrandyfdomain_estar-control=
872df1fe9cSrandyf    "cmd=ENTER_S3 path=/pseudo/acpippm@0:acpi-ppm method=KIO iowr=0x4101",
882df1fe9cSrandyf    "cmd=EXIT_S3 path=/pseudo/acpippm@0:acpi-ppm method=KIO iowr=0x4102";
892df1fe9cSrandyf
902df1fe9cSrandyf#
912df1fe9cSrandyf# S3-enable whitelist
922df1fe9cSrandyf#
932df1fe9cSrandyfS3-support-enable =
94*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA M8",
95*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA M9",
96*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA M10",
97*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA A9",
98*4596d7e9SGuoli Shu    "TOSHIBA", "Satellite A205",
99*4596d7e9SGuoli Shu    "TOSHIBA", "PORTEGE R500",
100*4596d7e9SGuoli Shu    "LENOVO", "64608VU",
101*4596d7e9SGuoli Shu    "LENOVO", "889703U",
102*4596d7e9SGuoli Shu    "Sony Corporation", "VGN-CR490N",
103*4596d7e9SGuoli Shu    "Dell Inc.", "Latitude D630",
104*4596d7e9SGuoli Shu    "Dell Inc.", "Precision M4300                 ",
105*4596d7e9SGuoli Shu    "Sun Microsystems", "Ultra 24",
1062df1fe9cSrandyf    "Sun Microsystems", "Sun Ultra 40 Workstation",
1072df1fe9cSrandyf    "Sun Microsystems", "Sun Ultra 20 Workstation";
1082df1fe9cSrandyf
1092df1fe9cSrandyfS3-support-disable =
1102df1fe9cSrandyf    "Sun Microsystems", "Sun Blade x8400 Server Module",
1112df1fe9cSrandyf    "Sun Microsystems", "Sun Fire*";
1122df1fe9cSrandyf
1132df1fe9cSrandyfS3-autoenable =
114*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA M8",
115*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA M9",
116*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA M10",
117*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA A9",
118*4596d7e9SGuoli Shu    "TOSHIBA", "Satellite A205",
119*4596d7e9SGuoli Shu    "TOSHIBA", "PORTEGE R500",
120*4596d7e9SGuoli Shu    "LENOVO", "64608VU",
121*4596d7e9SGuoli Shu    "LENOVO", "889703U",
122*4596d7e9SGuoli Shu    "Sony Corporation", "VGN-CR490N",
123*4596d7e9SGuoli Shu    "Dell Inc.", "Latitude D630",
124*4596d7e9SGuoli Shu    "Dell Inc.", "Precision M4300                 ",
125*4596d7e9SGuoli Shu    "Sun Microsystems", "Ultra 24",
1262df1fe9cSrandyf    "Sun Microsystems", "Sun Ultra 40 Workstation",
1272df1fe9cSrandyf    "Sun Microsystems", "Sun Ultra 20 Workstation";
1282df1fe9cSrandyf
1292df1fe9cSrandyfS3-autodisable =
1302df1fe9cSrandyf    "Sun Microsystems", "Sun Blade x8400 Server Module",
1312df1fe9cSrandyf    "Sun Microsystems", "Sun Fire*";
1322df1fe9cSrandyf
1332df1fe9cSrandyfautopm-enable =
134*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA M8",
135*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA M9",
136*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA M10",
137*4596d7e9SGuoli Shu    "TOSHIBA", "TECRA A9",
138*4596d7e9SGuoli Shu    "TOSHIBA", "Satellite A205",
139*4596d7e9SGuoli Shu    "TOSHIBA", "PORTEGE R500",
140*4596d7e9SGuoli Shu    "LENOVO", "64608VU",
141*4596d7e9SGuoli Shu    "LENOVO", "889703U",
142*4596d7e9SGuoli Shu    "Sony Corporation", "VGN-CR490N",
143*4596d7e9SGuoli Shu    "Dell Inc.", "Latitude D630",
144*4596d7e9SGuoli Shu    "Dell Inc.", "Precision M4300                 ",
145*4596d7e9SGuoli Shu    "Sun Microsystems", "Ultra 24",
1462df1fe9cSrandyf    "Sun Microsystems", "Sun Ultra 40 Workstation",
1472df1fe9cSrandyf    "Sun Microsystems", "Sun Ultra 20 Workstation";
1482df1fe9cSrandyf
1492df1fe9cSrandyfautopm-disable =
1502df1fe9cSrandyf    "Sun Microsystems", "Sun Blade x8400 Server Module",
1512df1fe9cSrandyf    "Sun Microsystems", "Sun Fire*";
152