xref: /titanic_51/usr/src/uts/common/sys/pci_tools.h (revision 8eea8e29cc4374d1ee24c25a07f45af132db3499)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _SYS_PCI_TOOLS_H
28 #define	_SYS_PCI_TOOLS_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #include <sys/modctl.h>
33 
34 #ifdef	__cplusplus
35 extern "C" {
36 #endif
37 
38 /*
39  * Versioning. Have different versions for userland program and drivers, so
40  * they can all stay in sync with each other.
41  */
42 #define	PCITOOL_USER_VERSION	1
43 #define	PCITOOL_DRVR_VERSION	1
44 
45 /*
46  * Ioctls for PCI tools.
47  */
48 #define	PCITOOL_IOC		(('P' << 24) | ('C' << 16) | ('T' << 8))
49 
50 /* Read/write a device on a PCI bus, in physical space. */
51 #define	PCITOOL_DEVICE_GET_REG	(PCITOOL_IOC | 1)
52 #define	PCITOOL_DEVICE_SET_REG	(PCITOOL_IOC | 2)
53 
54 /* Read/write the PCI nexus bridge, in physical space. */
55 #define	PCITOOL_NEXUS_GET_REG	(PCITOOL_IOC | 3)
56 #define	PCITOOL_NEXUS_SET_REG	(PCITOOL_IOC | 4)
57 
58 /* Get/set interrupt-CPU mapping for PCI devices. */
59 #define	PCITOOL_DEVICE_GET_INTR	(PCITOOL_IOC | 5)
60 #define	PCITOOL_DEVICE_SET_INTR	(PCITOOL_IOC | 6)
61 
62 /* Return the number of supported interrupts on a PCI bus. */
63 #define	PCITOOL_DEVICE_NUM_INTR	(PCITOOL_IOC | 7)
64 
65 
66 /*
67  * This file contains data structures for the pci tool.
68  */
69 #define	PCITOOL_CONFIG	0
70 #define	PCITOOL_BAR0	1
71 #define	PCITOOL_BAR1	2
72 #define	PCITOOL_BAR2	3
73 #define	PCITOOL_BAR3	4
74 #define	PCITOOL_BAR4	5
75 #define	PCITOOL_BAR5	6
76 #define	PCITOOL_ROM	7
77 
78 /*
79  * BAR corresponding to space desired.
80  */
81 typedef enum {
82     config = PCITOOL_CONFIG,
83     bar0 = PCITOOL_BAR0,
84     bar1 = PCITOOL_BAR1,
85     bar2 = PCITOOL_BAR2,
86     bar3 = PCITOOL_BAR3,
87     bar4 = PCITOOL_BAR4,
88     bar5 = PCITOOL_BAR5,
89     rom = PCITOOL_ROM
90 } pcitool_bars_t;
91 
92 
93 /*
94  * PCITOOL error numbers.
95  */
96 
97 typedef enum {
98 	PCITOOL_SUCCESS = 0x0,
99 	PCITOOL_INVALID_CPUID,
100 	PCITOOL_INVALID_INO,
101 	PCITOOL_PENDING_INTRTIMEOUT,
102 	PCITOOL_REGPROP_NOTWELLFORMED,
103 	PCITOOL_INVALID_ADDRESS,
104 	PCITOOL_NOT_ALIGNED,
105 	PCITOOL_OUT_OF_RANGE,
106 	PCITOOL_END_OF_RANGE,
107 	PCITOOL_ROM_DISABLED,
108 	PCITOOL_ROM_WRITE,
109 	PCITOOL_IO_ERROR,
110 	PCITOOL_INVALID_SIZE
111 } pcitool_errno_t;
112 
113 
114 /*
115  * PCITOOL_DEVICE_SET_INTR ioctl data structure to re-assign the interrupts.
116  */
117 typedef struct pcitool_intr_set {
118 	uint16_t user_version;	/* Userland program version - to krnl */
119 	uint16_t drvr_version;	/* Driver version - from kernel */
120 	uint32_t ino;		/* interrupt to set - to kernel */
121 	uint32_t cpu_id;	/* to: cpu to set / from: old cpu returned */
122 	pcitool_errno_t status;	/* from kernel */
123 } pcitool_intr_set_t;
124 
125 
126 /*
127  * PCITOOL_DEVICE_GET_INTR ioctl data structure to dump out the
128  * ino mapping information.
129  */
130 
131 typedef struct pcitool_intr_dev {
132 	uint32_t	dev_inst;	/* device instance - from kernel */
133 	char		driver_name[MAXMODCONFNAME];	/* from kernel */
134 	char		path[MAXPATHLEN]; /* device path - from kernel */
135 } pcitool_intr_dev_t;
136 
137 
138 typedef struct pcitool_intr_get {
139 	uint16_t user_version;		/* Userland program version - to krnl */
140 	uint16_t drvr_version;		/* Driver version - from kernel */
141 	uint32_t	ino;		/* interrupt number - to kernel */
142 	uint8_t		num_devs_ret;	/* room for this # of devs to be */
143 					/* returned - to kernel */
144 					/* # devs returned - from kernel */
145 	uint8_t		num_devs;	/* # devs on this ino - from kernel */
146 					/* intrs enabled for devs if > 0 */
147 	uint8_t		ctlr;		/* controller number - from kernel */
148 	uint32_t	cpu_id;		/* cpu of interrupt - from kernel */
149 	pcitool_errno_t status;		/* returned status - from kernel */
150 	pcitool_intr_dev_t	dev[1];	/* start of variable device list */
151 					/* from kernel */
152 } pcitool_intr_get_t;
153 
154 /*
155  * Get the size needed to return the number of devices wanted.
156  * Can't say num_devs - 1 as num_devs may be unsigned.
157  */
158 #define	PCITOOL_IGET_SIZE(num_devs) \
159 	(sizeof (pcitool_intr_get_t) - \
160 	sizeof (pcitool_intr_dev_t) + \
161 	(num_devs * sizeof (pcitool_intr_dev_t)))
162 
163 /*
164  * Size and endian fields for acc_attr bitmask.
165  */
166 #define	PCITOOL_ACC_ATTR_SIZE_MASK	0x3
167 #define	PCITOOL_ACC_ATTR_SIZE_1		0x0
168 #define	PCITOOL_ACC_ATTR_SIZE_2		0x1
169 #define	PCITOOL_ACC_ATTR_SIZE_4		0x2
170 #define	PCITOOL_ACC_ATTR_SIZE_8		0x3
171 #define	PCITOOL_ACC_ATTR_SIZE(x)	(1 << (x & PCITOOL_ACC_ATTR_SIZE_MASK))
172 
173 #define	PCITOOL_ACC_ATTR_ENDN_MASK	0x100
174 #define	PCITOOL_ACC_ATTR_ENDN_LTL	0x0
175 #define	PCITOOL_ACC_ATTR_ENDN_BIG	0x100
176 #define	PCITOOL_ACC_IS_BIG_ENDIAN(x)	(x & PCITOOL_ACC_ATTR_ENDN_BIG)
177 
178 /*
179  * Data stucture to read and write to pci device registers.
180  * This is the argument to the following ioctls:
181  *	PCITOOL_DEVICE_SET/GET_REG
182  *	PCITOOL_NEXUS_SET/GET_REG
183  */
184 typedef struct pcitool_reg {
185 	uint16_t	user_version;	/* Userland program version - to krnl */
186 	uint16_t	drvr_version;	/* Driver version - from kernel */
187 	uint8_t		bus_no;		/* pci bus - to kernel */
188 	uint8_t		dev_no;		/* pci dev - to kernel */
189 	uint8_t		func_no;	/* pci function - to kernel */
190 	uint8_t		barnum;		/* bank (DEVCTL_NEXUS_SET/GET_REG) or */
191 					/*   BAR from pcitools_bar_t */
192 					/*   (DEVCTL_DEVICE_SET/GET_REG) */
193 					/*   to kernel */
194 	uint64_t	offset;		/* to kernel */
195 	uint32_t	acc_attr;	/* access attributes - to kernel */
196 	uint32_t	padding1;	/* 8-byte align next uint64_t for X86 */
197 	uint64_t	data;		/* to/from kernel, 64-bit alignment */
198 	uint32_t	status;		/* from kernel */
199 	uint32_t	padding2;	/* 8-byte align next uint64_t for X86 */
200 	uint64_t	phys_addr;	/* from kernel, 64-bit alignment */
201 } pcitool_reg_t;
202 
203 
204 #ifdef	__cplusplus
205 }
206 #endif
207 
208 #endif	/* _SYS_PCI_TOOLS_H */
209