1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_NXGE_NXGE_TXDMA_H 28 #define _SYS_NXGE_NXGE_TXDMA_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 #include <sys/nxge/nxge_txdma_hw.h> 35 #include <npi_txdma.h> 36 #include <sys/nxge/nxge_serialize.h> 37 38 #define TXDMA_PORT_BITMAP(nxgep) (nxgep->pt_config.tx_dma_map) 39 40 #define TXDMA_RECLAIM_PENDING_DEFAULT 64 41 #define TX_FULL_MARK 3 42 43 /* 44 * Transmit load balancing definitions. 45 */ 46 #define NXGE_TX_LB_TCPUDP 0 /* default policy */ 47 #define NXGE_TX_LB_HASH 1 /* from the hint data */ 48 #define NXGE_TX_LB_DEST_MAC 2 /* Dest. MAC */ 49 50 /* 51 * Descriptor ring empty: 52 * (1) head index is equal to tail index. 53 * (2) wrapped around bits are the same. 54 * Descriptor ring full: 55 * (1) head index is equal to tail index. 56 * (2) wrapped around bits are different. 57 * 58 */ 59 #define TXDMA_RING_EMPTY(head, head_wrap, tail, tail_wrap) \ 60 ((head == tail && head_wrap == tail_wrap) ? B_TRUE : B_FALSE) 61 62 #define TXDMA_RING_FULL(head, head_wrap, tail, tail_wrap) \ 63 ((head == tail && head_wrap != tail_wrap) ? B_TRUE : B_FALSE) 64 65 #define TXDMA_DESC_NEXT_INDEX(index, entries, wrap_mask) \ 66 ((index + entries) & wrap_mask) 67 68 #define TXDMA_DRR_WEIGHT_DEFAULT 0x001f 69 70 typedef enum { 71 NXGE_USE_SERIAL = 0, 72 NXGE_USE_START, 73 } nxge_tx_mode_t; 74 75 typedef struct _tx_msg_t { 76 nxge_os_block_mv_t flags; /* DMA, BCOPY, DVMA (?) */ 77 nxge_os_dma_common_t buf_dma; /* premapped buffer blocks */ 78 nxge_os_dma_handle_t buf_dma_handle; /* premapped buffer handle */ 79 nxge_os_dma_handle_t dma_handle; /* DMA handle for normal send */ 80 nxge_os_dma_handle_t dvma_handle; /* Fast DVMA handle */ 81 struct _tx_msg_t *nextp; 82 83 p_mblk_t tx_message; 84 uint32_t tx_msg_size; 85 size_t bytes_used; 86 int head; 87 int tail; 88 } tx_msg_t, *p_tx_msg_t; 89 90 /* 91 * TX Statistics. 92 */ 93 typedef struct _nxge_tx_ring_stats_t { 94 uint64_t opackets; 95 uint64_t obytes; 96 uint64_t oerrors; 97 98 uint32_t tx_inits; 99 uint32_t tx_no_buf; 100 101 uint32_t mbox_err; 102 uint32_t pkt_size_err; 103 uint32_t tx_ring_oflow; 104 uint32_t pre_buf_par_err; 105 uint32_t nack_pref; 106 uint32_t nack_pkt_rd; 107 uint32_t conf_part_err; 108 uint32_t pkt_part_err; 109 uint32_t tx_starts; 110 uint32_t tx_nocanput; 111 uint32_t tx_msgdup_fail; 112 uint32_t tx_allocb_fail; 113 uint32_t tx_no_desc; 114 uint32_t tx_dma_bind_fail; 115 uint32_t tx_uflo; 116 117 uint32_t tx_hdr_pkts; 118 uint32_t tx_ddi_pkts; 119 uint32_t tx_dvma_pkts; 120 121 uint32_t tx_max_pend; 122 uint32_t tx_jumbo_pkts; 123 124 txdma_ring_errlog_t errlog; 125 } nxge_tx_ring_stats_t, *p_nxge_tx_ring_stats_t; 126 127 typedef struct _tx_ring_t { 128 nxge_os_dma_common_t tdc_desc; 129 struct _nxge_t *nxgep; 130 p_tx_msg_t tx_msg_ring; 131 uint32_t tnblocks; 132 tx_rng_cfig_t tx_ring_cfig; 133 tx_ring_hdl_t tx_ring_hdl; 134 tx_ring_kick_t tx_ring_kick; 135 tx_cs_t tx_cs; 136 tx_dma_ent_msk_t tx_evmask; 137 txdma_mbh_t tx_mbox_mbh; 138 txdma_mbl_t tx_mbox_mbl; 139 log_page_vld_t page_valid; 140 log_page_mask_t page_mask_1; 141 log_page_mask_t page_mask_2; 142 log_page_value_t page_value_1; 143 log_page_value_t page_value_2; 144 log_page_relo_t page_reloc_1; 145 log_page_relo_t page_reloc_2; 146 log_page_hdl_t page_hdl; 147 txc_dma_max_burst_t max_burst; 148 boolean_t cfg_set; 149 #define NXGE_TX_RING_ONLINE 0x00 150 #define NXGE_TX_RING_OFFLINING 0x01 151 #define NXGE_TX_RING_OFFLINED 0x02 152 uint32_t tx_ring_offline; 153 boolean_t tx_ring_busy; 154 155 p_tx_msg_t tx_free_list_p; 156 nxge_os_mutex_t freelock; 157 158 nxge_os_mutex_t lock; 159 uint16_t index; 160 uint16_t tdc; 161 struct nxge_tdc_cfg *tdc_p; 162 uint_t tx_ring_size; 163 uint32_t num_chunks; 164 165 uint_t tx_wrap_mask; 166 uint_t rd_index; 167 uint_t wr_index; 168 boolean_t wr_index_wrap; 169 tx_ring_hdl_t ring_head; 170 tx_ring_kick_t ring_kick_tail; 171 txdma_mailbox_t tx_mbox; 172 173 uint_t descs_pending; 174 boolean_t queueing; 175 176 nxge_os_mutex_t sq_lock; 177 nxge_serialize_t *serial; 178 p_mblk_t head; 179 p_mblk_t tail; 180 181 uint16_t ldg_group_id; 182 p_nxge_tx_ring_stats_t tdc_stats; 183 184 nxge_os_mutex_t dvma_lock; 185 uint_t dvma_wr_index; 186 uint_t dvma_rd_index; 187 uint_t dvma_pending; 188 uint_t dvma_available; 189 uint_t dvma_wrap_mask; 190 191 nxge_os_dma_handle_t *dvma_ring; 192 193 #if defined(sun4v) && defined(NIU_LP_WORKAROUND) 194 uint64_t hv_tx_buf_base_ioaddr_pp; 195 uint64_t hv_tx_buf_ioaddr_size; 196 uint64_t hv_tx_cntl_base_ioaddr_pp; 197 uint64_t hv_tx_cntl_ioaddr_size; 198 boolean_t hv_set; 199 #endif 200 } tx_ring_t, *p_tx_ring_t; 201 202 203 /* Transmit Mailbox */ 204 typedef struct _tx_mbox_t { 205 nxge_os_mutex_t lock; 206 uint16_t index; 207 struct _nxge_t *nxgep; 208 uint16_t tdc; 209 nxge_os_dma_common_t tx_mbox; 210 txdma_mbl_t tx_mbox_l; 211 txdma_mbh_t tx_mbox_h; 212 } tx_mbox_t, *p_tx_mbox_t; 213 214 typedef struct _tx_rings_t { 215 p_tx_ring_t *rings; 216 boolean_t txdesc_allocated; 217 uint32_t ndmas; 218 nxge_os_dma_common_t tdc_dma; 219 nxge_os_dma_common_t tdc_mbox; 220 } tx_rings_t, *p_tx_rings_t; 221 222 223 typedef struct _tx_mbox_areas_t { 224 p_tx_mbox_t *txmbox_areas_p; 225 boolean_t txmbox_allocated; 226 } tx_mbox_areas_t, *p_tx_mbox_areas_t; 227 228 /* 229 * Transmit prototypes. 230 */ 231 nxge_status_t nxge_init_txdma_channels(p_nxge_t); 232 void nxge_uninit_txdma_channels(p_nxge_t); 233 234 nxge_status_t nxge_init_txdma_channel(p_nxge_t, int); 235 void nxge_uninit_txdma_channel(p_nxge_t, int); 236 237 void nxge_setup_dma_common(p_nxge_dma_common_t, p_nxge_dma_common_t, 238 uint32_t, uint32_t); 239 nxge_status_t nxge_reset_txdma_channel(p_nxge_t, uint16_t, 240 uint64_t); 241 nxge_status_t nxge_init_txdma_channel_event_mask(p_nxge_t, 242 uint16_t, p_tx_dma_ent_msk_t); 243 nxge_status_t nxge_init_txdma_channel_cntl_stat(p_nxge_t, 244 uint16_t, uint64_t); 245 nxge_status_t nxge_enable_txdma_channel(p_nxge_t, uint16_t, 246 p_tx_ring_t, p_tx_mbox_t); 247 248 p_mblk_t nxge_tx_pkt_header_reserve(p_mblk_t, uint8_t *); 249 int nxge_tx_pkt_nmblocks(p_mblk_t, int *); 250 boolean_t nxge_txdma_reclaim(p_nxge_t, p_tx_ring_t, int); 251 252 void nxge_fill_tx_hdr(p_mblk_t, boolean_t, boolean_t, 253 int, uint8_t, p_tx_pkt_hdr_all_t, t_uscalar_t, t_uscalar_t); 254 255 nxge_status_t nxge_txdma_hw_mode(p_nxge_t, boolean_t); 256 void nxge_hw_start_tx(p_nxge_t); 257 void nxge_txdma_stop(p_nxge_t); 258 void nxge_txdma_stop_start(p_nxge_t); 259 void nxge_fixup_txdma_rings(p_nxge_t); 260 void nxge_txdma_hw_kick(p_nxge_t); 261 void nxge_txdma_fix_channel(p_nxge_t, uint16_t); 262 void nxge_txdma_fixup_channel(p_nxge_t, p_tx_ring_t, 263 uint16_t); 264 void nxge_txdma_hw_kick_channel(p_nxge_t, p_tx_ring_t, 265 uint16_t); 266 267 void nxge_txdma_regs_dump(p_nxge_t, int); 268 void nxge_txdma_regs_dump_channels(p_nxge_t); 269 270 void nxge_check_tx_hang(p_nxge_t); 271 void nxge_fixup_hung_txdma_rings(p_nxge_t); 272 273 void nxge_reclaim_rings(p_nxge_t); 274 int nxge_txdma_channel_hung(p_nxge_t, 275 p_tx_ring_t tx_ring_p, uint16_t); 276 int nxge_txdma_hung(p_nxge_t); 277 int nxge_txdma_stop_inj_err(p_nxge_t, int); 278 void nxge_txdma_inject_err(p_nxge_t, uint32_t, uint8_t); 279 280 extern nxge_status_t nxge_alloc_tx_mem_pool(p_nxge_t); 281 extern nxge_status_t nxge_alloc_txb(p_nxge_t nxgep, int channel); 282 extern void nxge_free_txb(p_nxge_t nxgep, int channel); 283 284 #ifdef __cplusplus 285 } 286 #endif 287 288 #endif /* _SYS_NXGE_NXGE_TXDMA_H */ 289