xref: /titanic_51/usr/src/uts/common/sys/nxge/nxge_txc.h (revision 1e49577a7fcde812700ded04431b49d67cc57d6d)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef	_SYS_NXGE_NXGE_TXC_H
27 #define	_SYS_NXGE_NXGE_TXC_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #ifdef	__cplusplus
32 extern "C" {
33 #endif
34 
35 #include <sys/nxge/nxge_txc_hw.h>
36 #include <npi_txc.h>
37 
38 /* Suggested by hardware team 7/19/2006 */
39 #define	TXC_DMA_MAX_BURST_DEFAULT	1530	/* Max burst used by DRR */
40 
41 typedef	struct _txc_errlog {
42 	txc_ro_states_t		ro_st;
43 	txc_sf_states_t		sf_st;
44 } txc_errlog_t;
45 
46 typedef struct _nxge_txc_stats {
47 	uint32_t		pkt_stuffed;
48 	uint32_t		pkt_xmit;
49 	uint32_t		ro_correct_err;
50 	uint32_t		ro_uncorrect_err;
51 	uint32_t		sf_correct_err;
52 	uint32_t		sf_uncorrect_err;
53 	uint32_t		address_failed;
54 	uint32_t		dma_failed;
55 	uint32_t		length_failed;
56 	uint32_t		pkt_assy_dead;
57 	uint32_t		reorder_err;
58 	txc_errlog_t		errlog;
59 } nxge_txc_stats_t, *p_nxge_txc_stats_t;
60 
61 typedef struct _nxge_txc {
62 	uint32_t		dma_max_burst;
63 	uint32_t		dma_length;
64 	uint32_t		training;
65 	uint8_t			debug_select;
66 	uint64_t		control_status;
67 	uint64_t		port_dma_list;
68 	nxge_txc_stats_t	*txc_stats;
69 } nxge_txc_t, *p_nxge_txc_t;
70 
71 /*
72  * Transmit Controller (TXC) prototypes.
73  */
74 nxge_status_t nxge_txc_init(p_nxge_t);
75 nxge_status_t nxge_txc_uninit(p_nxge_t);
76 nxge_status_t nxge_txc_tdc_bind(p_nxge_t, int);
77 nxge_status_t nxge_txc_tdc_unbind(p_nxge_t, int);
78 nxge_status_t nxge_txc_handle_sys_errors(p_nxge_t);
79 void nxge_txc_inject_err(p_nxge_t, uint32_t);
80 
81 #ifdef	__cplusplus
82 }
83 #endif
84 
85 #endif	/* _SYS_NXGE_NXGE_TXC_H */
86