xref: /titanic_51/usr/src/uts/common/sys/gfx_private.h (revision a2266950f53717262a8cf333da1e96f33e128d04)
1afe959e5SGordon Ross /*
2afe959e5SGordon Ross  * CDDL HEADER START
3afe959e5SGordon Ross  *
4afe959e5SGordon Ross  * The contents of this file are subject to the terms of the
5afe959e5SGordon Ross  * Common Development and Distribution License (the "License").
6afe959e5SGordon Ross  * You may not use this file except in compliance with the License.
7afe959e5SGordon Ross  *
8afe959e5SGordon Ross  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9afe959e5SGordon Ross  * or http://www.opensolaris.org/os/licensing.
10afe959e5SGordon Ross  * See the License for the specific language governing permissions
11afe959e5SGordon Ross  * and limitations under the License.
12afe959e5SGordon Ross  *
13afe959e5SGordon Ross  * When distributing Covered Code, include this CDDL HEADER in each
14afe959e5SGordon Ross  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15afe959e5SGordon Ross  * If applicable, add the following below this CDDL HEADER, with the
16afe959e5SGordon Ross  * fields enclosed by brackets "[]" replaced with your own identifying
17afe959e5SGordon Ross  * information: Portions Copyright [yyyy] [name of copyright owner]
18afe959e5SGordon Ross  *
19afe959e5SGordon Ross  * CDDL HEADER END
20afe959e5SGordon Ross  */
21afe959e5SGordon Ross /*
22afe959e5SGordon Ross  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
23afe959e5SGordon Ross  * Use is subject to license terms.
24afe959e5SGordon Ross  */
25afe959e5SGordon Ross 
26*a2266950SGordon Ross /*
27*a2266950SGordon Ross  * This file defines interfaces consumed by the AGP kernel modules,
28*a2266950SGordon Ross  * and indirectly by the DRM system.  Please consider everything in
29*a2266950SGordon Ross  * this file to be a "contract private interface", and keep in sync
30*a2266950SGordon Ross  * with the consumers in the "DRM" gate.
31*a2266950SGordon Ross  */
32*a2266950SGordon Ross 
33afe959e5SGordon Ross #ifndef	_GFX_PRIVATE_H
34afe959e5SGordon Ross #define	_GFX_PRIVATE_H
35afe959e5SGordon Ross 
36afe959e5SGordon Ross #ifdef __cplusplus
37afe959e5SGordon Ross extern "C" {
38afe959e5SGordon Ross #endif
39afe959e5SGordon Ross 
40afe959e5SGordon Ross /* Memory cache attributes */
41afe959e5SGordon Ross #define	GFXP_MEMORY_CACHED		0
42afe959e5SGordon Ross #define	GFXP_MEMORY_UNCACHED		1
43afe959e5SGordon Ross #define	GFXP_MEMORY_WRITECOMBINED	2
44afe959e5SGordon Ross 
45afe959e5SGordon Ross typedef uint64_t gfx_maddr_t;
46afe959e5SGordon Ross 
47afe959e5SGordon Ross extern int gfxp_ddi_segmap_setup(dev_t dev, off_t offset, struct as *as,
48afe959e5SGordon Ross 	caddr_t *addrp, off_t len, uint_t prot, uint_t maxprot, uint_t flags,
49afe959e5SGordon Ross 	cred_t *cred, ddi_device_acc_attr_t *accattrp, uint_t rnumber);
50afe959e5SGordon Ross 
51afe959e5SGordon Ross extern ddi_umem_cookie_t gfxp_umem_cookie_init(caddr_t kva, size_t size);
52afe959e5SGordon Ross extern void gfxp_umem_cookie_destroy(ddi_umem_cookie_t cookie);
53afe959e5SGordon Ross extern int gfxp_devmap_umem_setup(devmap_cookie_t dhc, dev_info_t *dip,
54afe959e5SGordon Ross 	struct devmap_callback_ctl *callbackops, ddi_umem_cookie_t cookie,
55afe959e5SGordon Ross 	offset_t off, size_t len, uint_t maxprot, uint_t flags,
56afe959e5SGordon Ross 	ddi_device_acc_attr_t *accattrp);
57afe959e5SGordon Ross extern void gfxp_map_devmem(devmap_cookie_t dhc, gfx_maddr_t maddr,
58afe959e5SGordon Ross 	size_t length, ddi_device_acc_attr_t *attrp);
59afe959e5SGordon Ross 
60afe959e5SGordon Ross 
61afe959e5SGordon Ross typedef char *gfxp_acc_handle_t;
62afe959e5SGordon Ross extern gfxp_acc_handle_t gfxp_pci_init_handle(uint8_t bus, uint8_t slot,
63afe959e5SGordon Ross 	uint8_t function, uint16_t *vendor, uint16_t *device);
64afe959e5SGordon Ross extern uint8_t gfxp_pci_read_byte(gfxp_acc_handle_t handle, uint16_t offset);
65afe959e5SGordon Ross extern uint16_t gfxp_pci_read_word(gfxp_acc_handle_t handle, uint16_t offset);
66afe959e5SGordon Ross extern uint32_t gfxp_pci_read_dword(gfxp_acc_handle_t handle, uint16_t offset);
67afe959e5SGordon Ross extern void gfxp_pci_write_byte(gfxp_acc_handle_t handle, uint16_t offset,
68afe959e5SGordon Ross 	uint8_t value);
69afe959e5SGordon Ross extern void gfxp_pci_write_word(gfxp_acc_handle_t handle, uint16_t offset,
70afe959e5SGordon Ross 	uint16_t value);
71afe959e5SGordon Ross extern void gfxp_pci_write_dword(gfxp_acc_handle_t handle, uint16_t offset,
72afe959e5SGordon Ross 	uint32_t value);
73afe959e5SGordon Ross extern int gfxp_pci_device_present(uint16_t vendor, uint16_t device);
74afe959e5SGordon Ross 
75afe959e5SGordon Ross typedef char *gfxp_kva_t;
76afe959e5SGordon Ross extern gfxp_kva_t gfxp_map_kernel_space(uint64_t start, size_t size,
77afe959e5SGordon Ross 	uint32_t mode);
78afe959e5SGordon Ross extern void gfxp_unmap_kernel_space(gfxp_kva_t address, size_t size);
79afe959e5SGordon Ross extern int gfxp_va2pa(struct as *as, caddr_t addr, uint64_t *pa);
80afe959e5SGordon Ross extern void gfxp_fix_mem_cache_attrs(caddr_t kva_start, size_t length,
81afe959e5SGordon Ross 	int cache_attr);
82afe959e5SGordon Ross extern gfx_maddr_t gfxp_convert_addr(paddr_t paddr);
83afe959e5SGordon Ross 
84afe959e5SGordon Ross typedef char *gfxp_vgatext_softc_ptr_t;
85afe959e5SGordon Ross 
86afe959e5SGordon Ross extern gfxp_vgatext_softc_ptr_t gfxp_vgatext_softc_alloc(void);
87afe959e5SGordon Ross extern void gfxp_vgatext_softc_free(gfxp_vgatext_softc_ptr_t ptr);
88afe959e5SGordon Ross extern int gfxp_vgatext_attach(dev_info_t *devi, ddi_attach_cmd_t cmd,
89afe959e5SGordon Ross 	gfxp_vgatext_softc_ptr_t ptr);
90afe959e5SGordon Ross extern int gfxp_vgatext_detach(dev_info_t *devi, ddi_detach_cmd_t cmd,
91afe959e5SGordon Ross 	gfxp_vgatext_softc_ptr_t ptr);
92afe959e5SGordon Ross extern int gfxp_vgatext_open(dev_t *devp, int flag, int otyp, cred_t *cred,
93afe959e5SGordon Ross 	gfxp_vgatext_softc_ptr_t ptr);
94afe959e5SGordon Ross extern int gfxp_vgatext_close(dev_t devp, int flag, int otyp, cred_t *cred,
95afe959e5SGordon Ross 	gfxp_vgatext_softc_ptr_t ptr);
96afe959e5SGordon Ross extern int gfxp_vgatext_ioctl(dev_t dev, int cmd, intptr_t data, int mode,
97afe959e5SGordon Ross 	cred_t *cred, int *rval, gfxp_vgatext_softc_ptr_t ptr);
98afe959e5SGordon Ross 
99afe959e5SGordon Ross extern int gfxp_mlock_user_memory(caddr_t address, size_t length);
100afe959e5SGordon Ross extern int gfxp_munlock_user_memory(caddr_t address, size_t length);
101afe959e5SGordon Ross extern int gfxp_vgatext_devmap(dev_t dev, devmap_cookie_t dhp, offset_t off,
102afe959e5SGordon Ross 	size_t len, size_t *maplen, uint_t model, void *ptr);
103afe959e5SGordon Ross 
104*a2266950SGordon Ross 
105*a2266950SGordon Ross /*
106*a2266950SGordon Ross  * Updated "glue" for newer libdrm code.
107*a2266950SGordon Ross  * See: kernel/drm/src/drm_fb_helper.c
108*a2266950SGordon Ross  */
109*a2266950SGordon Ross 
110*a2266950SGordon Ross /* Same as: gfxp_vgatext_softc_ptr_t; */
111*a2266950SGordon Ross typedef char *gfxp_fb_softc_ptr_t;
112*a2266950SGordon Ross 
113*a2266950SGordon Ross /*
114*a2266950SGordon Ross  * Used by drm_register_fbops().
115*a2266950SGordon Ross  * Note: only setmode is supplied.
116*a2266950SGordon Ross  */
117*a2266950SGordon Ross struct gfxp_blt_ops {
118*a2266950SGordon Ross 	int (*blt)(void *);
119*a2266950SGordon Ross 	int (*copy) (void *);
120*a2266950SGordon Ross 	int (*clear) (void *);
121*a2266950SGordon Ross 	int (*setmode) (int);
122*a2266950SGordon Ross };
123*a2266950SGordon Ross 
124*a2266950SGordon Ross extern void gfxp_bm_register_fbops(gfxp_fb_softc_ptr_t,
125*a2266950SGordon Ross     struct gfxp_blt_ops *);
126*a2266950SGordon Ross 
127*a2266950SGordon Ross /* See: kernel/drm/src/drm_fb_helper.c */
128*a2266950SGordon Ross 
129*a2266950SGordon Ross struct gfxp_bm_fb_info {
130*a2266950SGordon Ross 	uint16_t xres;
131*a2266950SGordon Ross 	uint16_t yres;
132*a2266950SGordon Ross 	uint8_t bpp;
133*a2266950SGordon Ross 	uint8_t depth;
134*a2266950SGordon Ross };
135*a2266950SGordon Ross 
136*a2266950SGordon Ross void gfxp_bm_getfb_info(gfxp_fb_softc_ptr_t, struct gfxp_bm_fb_info *);
137*a2266950SGordon Ross 
138*a2266950SGordon Ross /* See: kernel/drm/src/drm_bufs.c etc */
139*a2266950SGordon Ross 
140*a2266950SGordon Ross caddr_t	gfxp_alloc_kernel_space(size_t size);	/* vmem_alloc heap_arena */
141*a2266950SGordon Ross void	gfxp_free_kernel_space(caddr_t address, size_t size);
142*a2266950SGordon Ross 
143*a2266950SGordon Ross void	gfxp_load_kernel_space(uint64_t start, size_t size,
144*a2266950SGordon Ross 				uint32_t mode, caddr_t cvaddr);
145*a2266950SGordon Ross void	gfxp_unload_kernel_space(caddr_t address, size_t size);
146*a2266950SGordon Ross 
147*a2266950SGordon Ross /*
148*a2266950SGordon Ross  * Note that "mempool" is optional and normally disabled in drm_gem.c
149*a2266950SGordon Ross  * (see HAS_MEM_POOL).  Let's just stub these out so we can reduce
150*a2266950SGordon Ross  * changes from the upstream in the DRM driver code.
151*a2266950SGordon Ross  */
152*a2266950SGordon Ross struct gfxp_pmem_cookie {
153*a2266950SGordon Ross 	ulong_t a, b, c;
154*a2266950SGordon Ross };
155*a2266950SGordon Ross void	gfxp_mempool_init(void);
156*a2266950SGordon Ross void	gfxp_mempool_destroy(void);
157*a2266950SGordon Ross int gfxp_alloc_from_mempool(struct gfxp_pmem_cookie *, caddr_t *,
158*a2266950SGordon Ross 			    pfn_t *, pgcnt_t, int);
159*a2266950SGordon Ross void gfxp_free_mempool(struct gfxp_pmem_cookie *, caddr_t, size_t);
160*a2266950SGordon Ross 
161afe959e5SGordon Ross #ifdef __cplusplus
162afe959e5SGordon Ross }
163afe959e5SGordon Ross #endif
164afe959e5SGordon Ross 
165afe959e5SGordon Ross #endif /* _GFX_PRIVATE_H */
166