xref: /titanic_51/usr/src/uts/common/sys/cpudrv.h (revision 499fd60129a966ad9d9e752e65f591c3a6a1c697)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _SYS_CPUDRV_H
27 #define	_SYS_CPUDRV_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #include <sys/promif.h>
32 #include <sys/cpuvar.h>
33 #include <sys/taskq.h>
34 
35 #ifdef	__cplusplus
36 extern "C" {
37 #endif
38 
39 #ifdef _KERNEL
40 
41 /*
42  * CPU power management data
43  */
44 /*
45  * Data related to a particular speed.
46  *
47  * All per speed data nodes for a CPU are linked together using down_spd.
48  * The link list is ordered with first node containing data for
49  * normal (maximum) speed. up_spd points to the next speed up. Currently
50  * all up_spd's point to the normal speed but this can be changed in future.
51  * quant_cnt is the number of ticks when monitoring system will be called
52  * next. There are different quant_cnt for different speeds.
53  *
54  * Note that 'speed' has different meaning depending upon the platform.
55  * On SPARC, the speed is really a divisor of the maximum speed (e.g., a speed
56  * of 2 means that it's 1/2 the maximum speed). On x86, speed is a processor
57  * frequency.
58  */
59 typedef struct cpudrv_pm_spd {
60 	uint_t			speed;		/* platform dependent notion */
61 	uint_t			quant_cnt;	/* quantum count in ticks */
62 	struct cpudrv_pm_spd	*down_spd;	/* ptr to next speed down */
63 	struct cpudrv_pm_spd	*up_spd;	/* ptr to next speed up */
64 	uint_t			idle_hwm;	/* down if idle thread >= hwm */
65 	uint_t			idle_lwm;	/* up if idle thread < lwm */
66 	uint_t			idle_bhwm_cnt;	/* # of iters idle is < hwm */
67 	uint_t			idle_blwm_cnt;	/* # of iters idle is < lwm */
68 	uint_t			user_hwm;	/* up if user thread > hwm */
69 	int			user_lwm;	/* down if user thread <= lwm */
70 	int			pm_level;	/* power level for framework */
71 } cpudrv_pm_spd_t;
72 
73 /*
74  * Power management data
75  */
76 typedef struct cpudrv_pm {
77 	cpudrv_pm_spd_t	*head_spd;	/* ptr to head of speed */
78 	cpudrv_pm_spd_t	*cur_spd;	/* ptr to current speed */
79 	cpudrv_pm_spd_t	*targ_spd;	/* target speed when cur_spd */
80 					/* is unknown (i.e. NULL) */
81 	uint_t		num_spd;	/* number of speeds */
82 	hrtime_t	lastquan_mstate[NCMSTATES]; /* last quantum's mstate */
83 	clock_t		lastquan_lbolt;	/* last quantum's lbolt */
84 	int		pm_busycnt;	/* pm_busy_component() count  */
85 	taskq_t		*tq;		/* taskq handler for CPU monitor */
86 	timeout_id_t	timeout_id;	/* cpudrv_pm_monitor()'s timeout_id */
87 	int		timeout_count;	/* count dispatched timeouts */
88 	kmutex_t	timeout_lock;	/* protect timeout_count */
89 	kcondvar_t	timeout_cv;	/* wait on timeout_count change */
90 #if defined(__x86)
91 	kthread_t	*pm_throttle_thread; /* throttling thread */
92 #endif
93 	boolean_t	pm_started;	/* PM really started */
94 } cpudrv_pm_t;
95 
96 /*
97  * Idle & user threads water marks in percentage
98  */
99 #if defined(__x86)
100 #define	CPUDRV_PM_IDLE_HWM		85	/* idle high water mark */
101 #define	CPUDRV_PM_IDLE_LWM		70	/* idle low water mark */
102 #else
103 #define	CPUDRV_PM_IDLE_HWM		98	/* idle high water mark */
104 #define	CPUDRV_PM_IDLE_LWM		8	/* idle low water mark */
105 #endif
106 #define	CPUDRV_PM_USER_HWM		20	/* user high water mark */
107 #define	CPUDRV_PM_IDLE_BUF_ZONE		4    /* buffer zone when going down */
108 
109 #define	CPUDRV_PM_IDLE_BLWM_CNT_MAX	2    /* # of iters idle can be < lwm */
110 #define	CPUDRV_PM_IDLE_BHWM_CNT_MAX	2    /* # of iters idle can be < hwm */
111 
112 /*
113  * Maximums for creating 'pm-components' property
114  */
115 #define	CPUDRV_PM_COMP_MAX_DIG	4	/* max digits in power level */
116 					/* or divisor */
117 #define	CPUDRV_PM_COMP_MAX_VAL	9999	/* max value in above digits */
118 
119 /*
120  * Component number for calls to PM framework
121  */
122 #define	CPUDRV_PM_COMP_NUM	0	/* first component is 0 */
123 
124 /*
125  * Quantum counts for normal and other clock speeds in terms of ticks.
126  *
127  * In determining the quantum count, we need to balance two opposing factors:
128  *
129  *	1) Minimal delay when user start using the CPU that is in low
130  *	power mode -- requires that we monitor more frequently,
131  *
132  *	2) Extra code executed because of frequent monitoring -- requires
133  *	that we monitor less frequently.
134  *
135  * We reach a tradeoff between these two requirements by monitoring
136  * more frequently when we are in low speed mode (CPUDRV_PM_QUANT_CNT_OTHR)
137  * so we can bring the CPU up without user noticing it. Moreover, at low
138  * speed we are not using CPU much so extra code execution should be fine.
139  * Since we are in no hurry to bring CPU down and at normal speed and we
140  * might really be using the CPU fully, we monitor less frequently
141  * (CPUDRV_PM_QUANT_CNT_NORMAL).
142  */
143 #define	CPUDRV_PM_QUANT_CNT_NORMAL	(hz * 5)	/* 5 sec */
144 #define	CPUDRV_PM_QUANT_CNT_OTHR	(hz * 1)	/* 1 sec */
145 
146 /*
147  * Taskq parameters
148  */
149 #define	CPUDRV_PM_TASKQ_THREADS		1    /* # threads to run CPU monitor */
150 #define	CPUDRV_PM_TASKQ_MIN		2	/* min # of taskq entries */
151 #define	CPUDRV_PM_TASKQ_MAX		2	/* max # of taskq entries */
152 
153 
154 /*
155  * Device driver state structure
156  */
157 typedef struct cpudrv_devstate {
158 	dev_info_t	*dip;		/* devinfo handle */
159 	processorid_t	cpu_id;		/* CPU number for this node */
160 	cpudrv_pm_t	cpudrv_pm;	/* power management data */
161 	kmutex_t	lock;		/* protects state struct */
162 #if defined(__x86)
163 	void		*acpi_handle;	/* ACPI cache */
164 	void		*module_state;  /* CPU module state */
165 #endif
166 } cpudrv_devstate_t;
167 
168 extern void	*cpudrv_state;
169 
170 /*
171  * Debugging definitions
172  */
173 #ifdef	DEBUG
174 #define	D_INIT			0x00000001
175 #define	D_FINI			0x00000002
176 #define	D_ATTACH		0x00000004
177 #define	D_DETACH		0x00000008
178 #define	D_POWER			0x00000010
179 #define	D_PM_INIT		0x00000020
180 #define	D_PM_FREE		0x00000040
181 #define	D_PM_COMP_CREATE	0x00000080
182 #define	D_PM_MONITOR		0x00000100
183 #define	D_PM_MONITOR_VERBOSE	0x00000200
184 #define	D_PM_MONITOR_DELAY	0x00000400
185 
186 extern uint_t	cpudrv_debug;
187 
188 #define	_PRINTF prom_printf
189 #define	DPRINTF(flag, args)	if (cpudrv_debug & flag) _PRINTF args;
190 #else
191 #define	DPRINTF(flag, args)
192 #endif /* DEBUG */
193 
194 extern int cpudrv_pm_change_speed(cpudrv_devstate_t *, cpudrv_pm_spd_t *);
195 extern boolean_t cpudrv_pm_get_cpu_id(dev_info_t *, processorid_t *);
196 extern boolean_t cpudrv_pm_all_instances_ready(void);
197 extern boolean_t cpudrv_pm_is_throttle_thread(cpudrv_pm_t *);
198 extern boolean_t cpudrv_pm_init_module(cpudrv_devstate_t *);
199 extern void cpudrv_pm_free_module(cpudrv_devstate_t *);
200 
201 #endif /* _KERNEL */
202 
203 #ifdef	__cplusplus
204 }
205 #endif
206 
207 #endif /* _SYS_CPUDRV_H */
208