1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 #include <sys/nxge/nxge_impl.h> 29 #include <sys/nxge/nxge_hio.h> 30 #include <npi_tx_wr64.h> 31 32 /* Software LSO required header files */ 33 #include <netinet/tcp.h> 34 #include <inet/ip_impl.h> 35 #include <inet/tcp.h> 36 37 static mblk_t *nxge_lso_eliminate(mblk_t *); 38 static mblk_t *nxge_do_softlso(mblk_t *mp, uint32_t mss); 39 static void nxge_lso_info_get(mblk_t *, uint32_t *, uint32_t *); 40 static void nxge_hcksum_retrieve(mblk_t *, 41 uint32_t *, uint32_t *, uint32_t *, 42 uint32_t *, uint32_t *); 43 static uint32_t nxge_csgen(uint16_t *, int); 44 45 extern uint32_t nxge_reclaim_pending; 46 extern uint32_t nxge_bcopy_thresh; 47 extern uint32_t nxge_dvma_thresh; 48 extern uint32_t nxge_dma_stream_thresh; 49 extern uint32_t nxge_tx_minfree; 50 extern uint32_t nxge_tx_intr_thres; 51 extern uint32_t nxge_tx_max_gathers; 52 extern uint32_t nxge_tx_tiny_pack; 53 extern uint32_t nxge_tx_use_bcopy; 54 extern uint32_t nxge_tx_lb_policy; 55 extern uint32_t nxge_no_tx_lb; 56 extern nxge_tx_mode_t nxge_tx_scheme; 57 uint32_t nxge_lso_kick_cnt = 2; 58 59 typedef struct _mac_tx_hint { 60 uint16_t sap; 61 uint16_t vid; 62 void *hash; 63 } mac_tx_hint_t, *p_mac_tx_hint_t; 64 65 int nxge_tx_lb_ring_1(p_mblk_t, uint32_t, p_mac_tx_hint_t); 66 67 int 68 nxge_start(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, p_mblk_t mp) 69 { 70 int status = 0; 71 p_tx_desc_t tx_desc_ring_vp; 72 npi_handle_t npi_desc_handle; 73 nxge_os_dma_handle_t tx_desc_dma_handle; 74 p_tx_desc_t tx_desc_p; 75 p_tx_msg_t tx_msg_ring; 76 p_tx_msg_t tx_msg_p; 77 tx_desc_t tx_desc, *tmp_desc_p; 78 tx_desc_t sop_tx_desc, *sop_tx_desc_p; 79 p_tx_pkt_header_t hdrp; 80 tx_pkt_header_t tmp_hdrp; 81 p_tx_pkt_hdr_all_t pkthdrp; 82 uint8_t npads = 0; 83 uint64_t dma_ioaddr; 84 uint32_t dma_flags; 85 int last_bidx; 86 uint8_t *b_rptr; 87 caddr_t kaddr; 88 uint32_t nmblks; 89 uint32_t ngathers; 90 uint32_t clen; 91 int len; 92 uint32_t pkt_len, pack_len, min_len; 93 uint32_t bcopy_thresh; 94 int i, cur_index, sop_index; 95 uint16_t tail_index; 96 boolean_t tail_wrap = B_FALSE; 97 nxge_dma_common_t desc_area; 98 nxge_os_dma_handle_t dma_handle; 99 ddi_dma_cookie_t dma_cookie; 100 npi_handle_t npi_handle; 101 p_mblk_t nmp; 102 p_mblk_t t_mp; 103 uint32_t ncookies; 104 boolean_t good_packet; 105 boolean_t mark_mode = B_FALSE; 106 p_nxge_stats_t statsp; 107 p_nxge_tx_ring_stats_t tdc_stats; 108 t_uscalar_t start_offset = 0; 109 t_uscalar_t stuff_offset = 0; 110 t_uscalar_t end_offset = 0; 111 t_uscalar_t value = 0; 112 t_uscalar_t cksum_flags = 0; 113 boolean_t cksum_on = B_FALSE; 114 uint32_t boff = 0; 115 uint64_t tot_xfer_len = 0; 116 boolean_t header_set = B_FALSE; 117 #ifdef NXGE_DEBUG 118 p_tx_desc_t tx_desc_ring_pp; 119 p_tx_desc_t tx_desc_pp; 120 tx_desc_t *save_desc_p; 121 int dump_len; 122 int sad_len; 123 uint64_t sad; 124 int xfer_len; 125 uint32_t msgsize; 126 #endif 127 p_mblk_t mp_chain = NULL; 128 boolean_t is_lso = B_FALSE; 129 boolean_t lso_again; 130 int cur_index_lso; 131 p_mblk_t nmp_lso_save; 132 uint32_t lso_ngathers; 133 boolean_t lso_tail_wrap = B_FALSE; 134 135 NXGE_DEBUG_MSG((nxgep, TX_CTL, 136 "==> nxge_start: tx dma channel %d", tx_ring_p->tdc)); 137 NXGE_DEBUG_MSG((nxgep, TX_CTL, 138 "==> nxge_start: Starting tdc %d desc pending %d", 139 tx_ring_p->tdc, tx_ring_p->descs_pending)); 140 141 statsp = nxgep->statsp; 142 143 if (!isLDOMguest(nxgep)) { 144 switch (nxgep->mac.portmode) { 145 default: 146 if (nxgep->statsp->port_stats.lb_mode == 147 nxge_lb_normal) { 148 if (!statsp->mac_stats.link_up) { 149 freemsg(mp); 150 NXGE_DEBUG_MSG((nxgep, TX_CTL, 151 "==> nxge_start: " 152 "link not up")); 153 goto nxge_start_fail1; 154 } 155 } 156 break; 157 case PORT_10G_FIBER: 158 /* 159 * For the following modes, check the link status 160 * before sending the packet out: 161 * nxge_lb_normal, nxge_lb_ext10g, nxge_lb_phy10g 162 */ 163 if (nxgep->statsp->port_stats.lb_mode < 164 nxge_lb_serdes10g) { 165 if (!statsp->mac_stats.link_up) { 166 freemsg(mp); 167 NXGE_DEBUG_MSG((nxgep, TX_CTL, 168 "==> nxge_start: " 169 "link not up")); 170 goto nxge_start_fail1; 171 } 172 } 173 break; 174 } 175 } 176 177 if ((!(nxgep->drv_state & STATE_HW_INITIALIZED)) || 178 (nxgep->nxge_mac_state != NXGE_MAC_STARTED)) { 179 NXGE_DEBUG_MSG((nxgep, TX_CTL, 180 "==> nxge_start: hardware not initialized or stopped")); 181 freemsg(mp); 182 goto nxge_start_fail1; 183 } 184 185 if (nxgep->soft_lso_enable) { 186 mp_chain = nxge_lso_eliminate(mp); 187 NXGE_DEBUG_MSG((nxgep, TX_CTL, 188 "==> nxge_start(0): LSO mp $%p mp_chain $%p", 189 mp, mp_chain)); 190 if (mp_chain == NULL) { 191 NXGE_ERROR_MSG((nxgep, TX_CTL, 192 "==> nxge_send(0): NULL mp_chain $%p != mp $%p", 193 mp_chain, mp)); 194 goto nxge_start_fail1; 195 } 196 if (mp_chain != mp) { 197 NXGE_DEBUG_MSG((nxgep, TX_CTL, 198 "==> nxge_send(1): IS LSO mp_chain $%p != mp $%p", 199 mp_chain, mp)); 200 is_lso = B_TRUE; 201 mp = mp_chain; 202 mp_chain = mp_chain->b_next; 203 mp->b_next = NULL; 204 } 205 } 206 207 hcksum_retrieve(mp, NULL, NULL, &start_offset, 208 &stuff_offset, &end_offset, &value, &cksum_flags); 209 if (!NXGE_IS_VLAN_PACKET(mp->b_rptr)) { 210 start_offset += sizeof (ether_header_t); 211 stuff_offset += sizeof (ether_header_t); 212 } else { 213 start_offset += sizeof (struct ether_vlan_header); 214 stuff_offset += sizeof (struct ether_vlan_header); 215 } 216 217 if (cksum_flags & HCK_PARTIALCKSUM) { 218 NXGE_DEBUG_MSG((nxgep, TX_CTL, 219 "==> nxge_start: mp $%p len %d " 220 "cksum_flags 0x%x (partial checksum) ", 221 mp, MBLKL(mp), cksum_flags)); 222 cksum_on = B_TRUE; 223 } 224 225 pkthdrp = (p_tx_pkt_hdr_all_t)&tmp_hdrp; 226 pkthdrp->reserved = 0; 227 tmp_hdrp.value = 0; 228 nxge_fill_tx_hdr(mp, B_FALSE, cksum_on, 229 0, 0, pkthdrp, 230 start_offset, stuff_offset); 231 232 lso_again = B_FALSE; 233 lso_ngathers = 0; 234 235 MUTEX_ENTER(&tx_ring_p->lock); 236 237 if (isLDOMservice(nxgep)) { 238 tx_ring_p->tx_ring_busy = B_TRUE; 239 if (tx_ring_p->tx_ring_offline) { 240 freemsg(mp); 241 tx_ring_p->tx_ring_busy = B_FALSE; 242 (void) atomic_swap_32(&tx_ring_p->tx_ring_offline, 243 NXGE_TX_RING_OFFLINED); 244 MUTEX_EXIT(&tx_ring_p->lock); 245 return (status); 246 } 247 } 248 249 cur_index_lso = tx_ring_p->wr_index; 250 lso_tail_wrap = tx_ring_p->wr_index_wrap; 251 start_again: 252 ngathers = 0; 253 sop_index = tx_ring_p->wr_index; 254 #ifdef NXGE_DEBUG 255 if (tx_ring_p->descs_pending) { 256 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: " 257 "desc pending %d ", tx_ring_p->descs_pending)); 258 } 259 260 dump_len = (int)(MBLKL(mp)); 261 dump_len = (dump_len > 128) ? 128: dump_len; 262 263 NXGE_DEBUG_MSG((nxgep, TX_CTL, 264 "==> nxge_start: tdc %d: dumping ...: b_rptr $%p " 265 "(Before header reserve: ORIGINAL LEN %d)", 266 tx_ring_p->tdc, 267 mp->b_rptr, 268 dump_len)); 269 270 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: dump packets " 271 "(IP ORIGINAL b_rptr $%p): %s", mp->b_rptr, 272 nxge_dump_packet((char *)mp->b_rptr, dump_len))); 273 #endif 274 275 tdc_stats = tx_ring_p->tdc_stats; 276 mark_mode = (tx_ring_p->descs_pending && 277 ((tx_ring_p->tx_ring_size - tx_ring_p->descs_pending) 278 < nxge_tx_minfree)); 279 280 NXGE_DEBUG_MSG((nxgep, TX_CTL, 281 "TX Descriptor ring is channel %d mark mode %d", 282 tx_ring_p->tdc, mark_mode)); 283 284 if ((tx_ring_p->descs_pending + lso_ngathers) >= nxge_reclaim_pending) { 285 if (!nxge_txdma_reclaim(nxgep, tx_ring_p, 286 (nxge_tx_minfree + lso_ngathers))) { 287 NXGE_DEBUG_MSG((nxgep, TX_CTL, 288 "TX Descriptor ring is full: channel %d", 289 tx_ring_p->tdc)); 290 NXGE_DEBUG_MSG((nxgep, TX_CTL, 291 "TX Descriptor ring is full: channel %d", 292 tx_ring_p->tdc)); 293 if (is_lso) { 294 /* 295 * free the current mp and mp_chain if not FULL. 296 */ 297 tdc_stats->tx_no_desc++; 298 NXGE_DEBUG_MSG((nxgep, TX_CTL, 299 "LSO packet: TX Descriptor ring is full: " 300 "channel %d", 301 tx_ring_p->tdc)); 302 goto nxge_start_fail_lso; 303 } else { 304 boolean_t skip_sched = B_FALSE; 305 306 cas32((uint32_t *)&tx_ring_p->queueing, 0, 1); 307 tdc_stats->tx_no_desc++; 308 309 if (isLDOMservice(nxgep)) { 310 tx_ring_p->tx_ring_busy = B_FALSE; 311 if (tx_ring_p->tx_ring_offline) { 312 (void) atomic_swap_32( 313 &tx_ring_p->tx_ring_offline, 314 NXGE_TX_RING_OFFLINED); 315 skip_sched = B_TRUE; 316 } 317 } 318 319 MUTEX_EXIT(&tx_ring_p->lock); 320 if (nxgep->resched_needed && 321 !nxgep->resched_running && !skip_sched) { 322 nxgep->resched_running = B_TRUE; 323 ddi_trigger_softintr(nxgep->resched_id); 324 } 325 status = 1; 326 goto nxge_start_fail1; 327 } 328 } 329 } 330 331 nmp = mp; 332 i = sop_index = tx_ring_p->wr_index; 333 nmblks = 0; 334 ngathers = 0; 335 pkt_len = 0; 336 pack_len = 0; 337 clen = 0; 338 last_bidx = -1; 339 good_packet = B_TRUE; 340 341 desc_area = tx_ring_p->tdc_desc; 342 npi_handle = desc_area.npi_handle; 343 npi_desc_handle.regh = (nxge_os_acc_handle_t) 344 DMA_COMMON_ACC_HANDLE(desc_area); 345 tx_desc_ring_vp = (p_tx_desc_t)DMA_COMMON_VPTR(desc_area); 346 tx_desc_dma_handle = (nxge_os_dma_handle_t) 347 DMA_COMMON_HANDLE(desc_area); 348 tx_msg_ring = tx_ring_p->tx_msg_ring; 349 350 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: wr_index %d i %d", 351 sop_index, i)); 352 353 #ifdef NXGE_DEBUG 354 msgsize = msgdsize(nmp); 355 NXGE_DEBUG_MSG((nxgep, TX_CTL, 356 "==> nxge_start(1): wr_index %d i %d msgdsize %d", 357 sop_index, i, msgsize)); 358 #endif 359 /* 360 * The first 16 bytes of the premapped buffer are reserved 361 * for header. No padding will be used. 362 */ 363 pkt_len = pack_len = boff = TX_PKT_HEADER_SIZE; 364 if (nxge_tx_use_bcopy && (nxgep->niu_type != N2_NIU)) { 365 bcopy_thresh = (nxge_bcopy_thresh - TX_PKT_HEADER_SIZE); 366 } else { 367 bcopy_thresh = (TX_BCOPY_SIZE - TX_PKT_HEADER_SIZE); 368 } 369 while (nmp) { 370 good_packet = B_TRUE; 371 b_rptr = nmp->b_rptr; 372 len = MBLKL(nmp); 373 if (len <= 0) { 374 nmp = nmp->b_cont; 375 continue; 376 } 377 nmblks++; 378 379 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(1): nmblks %d " 380 "len %d pkt_len %d pack_len %d", 381 nmblks, len, pkt_len, pack_len)); 382 /* 383 * Hardware limits the transfer length to 4K for NIU and 384 * 4076 (TX_MAX_TRANSFER_LENGTH) for Neptune. But we just 385 * use TX_MAX_TRANSFER_LENGTH as the limit for both. 386 * If len is longer than the limit, then we break nmp into 387 * two chunks: Make the first chunk equal to the limit and 388 * the second chunk for the remaining data. If the second 389 * chunk is still larger than the limit, then it will be 390 * broken into two in the next pass. 391 */ 392 if (len > TX_MAX_TRANSFER_LENGTH - TX_PKT_HEADER_SIZE) { 393 if ((t_mp = dupb(nmp)) != NULL) { 394 nmp->b_wptr = nmp->b_rptr + 395 (TX_MAX_TRANSFER_LENGTH 396 - TX_PKT_HEADER_SIZE); 397 t_mp->b_rptr = nmp->b_wptr; 398 t_mp->b_cont = nmp->b_cont; 399 nmp->b_cont = t_mp; 400 len = MBLKL(nmp); 401 } else { 402 if (is_lso) { 403 NXGE_DEBUG_MSG((nxgep, TX_CTL, 404 "LSO packet: dupb failed: " 405 "channel %d", 406 tx_ring_p->tdc)); 407 mp = nmp; 408 goto nxge_start_fail_lso; 409 } else { 410 good_packet = B_FALSE; 411 goto nxge_start_fail2; 412 } 413 } 414 } 415 tx_desc.value = 0; 416 tx_desc_p = &tx_desc_ring_vp[i]; 417 #ifdef NXGE_DEBUG 418 tx_desc_pp = &tx_desc_ring_pp[i]; 419 #endif 420 tx_msg_p = &tx_msg_ring[i]; 421 #if defined(__i386) 422 npi_desc_handle.regp = (uint32_t)tx_desc_p; 423 #else 424 npi_desc_handle.regp = (uint64_t)tx_desc_p; 425 #endif 426 if (!header_set && 427 ((!nxge_tx_use_bcopy && (len > TX_BCOPY_SIZE)) || 428 (len >= bcopy_thresh))) { 429 header_set = B_TRUE; 430 bcopy_thresh += TX_PKT_HEADER_SIZE; 431 boff = 0; 432 pack_len = 0; 433 kaddr = (caddr_t)DMA_COMMON_VPTR(tx_msg_p->buf_dma); 434 hdrp = (p_tx_pkt_header_t)kaddr; 435 clen = pkt_len; 436 dma_handle = tx_msg_p->buf_dma_handle; 437 dma_ioaddr = DMA_COMMON_IOADDR(tx_msg_p->buf_dma); 438 (void) ddi_dma_sync(dma_handle, 439 i * nxge_bcopy_thresh, nxge_bcopy_thresh, 440 DDI_DMA_SYNC_FORDEV); 441 442 tx_msg_p->flags.dma_type = USE_BCOPY; 443 goto nxge_start_control_header_only; 444 } 445 446 pkt_len += len; 447 pack_len += len; 448 449 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(3): " 450 "desc entry %d " 451 "DESC IOADDR $%p " 452 "desc_vp $%p tx_desc_p $%p " 453 "desc_pp $%p tx_desc_pp $%p " 454 "len %d pkt_len %d pack_len %d", 455 i, 456 DMA_COMMON_IOADDR(desc_area), 457 tx_desc_ring_vp, tx_desc_p, 458 tx_desc_ring_pp, tx_desc_pp, 459 len, pkt_len, pack_len)); 460 461 if (len < bcopy_thresh) { 462 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(4): " 463 "USE BCOPY: ")); 464 if (nxge_tx_tiny_pack) { 465 uint32_t blst = 466 TXDMA_DESC_NEXT_INDEX(i, -1, 467 tx_ring_p->tx_wrap_mask); 468 NXGE_DEBUG_MSG((nxgep, TX_CTL, 469 "==> nxge_start(5): pack")); 470 if ((pack_len <= bcopy_thresh) && 471 (last_bidx == blst)) { 472 NXGE_DEBUG_MSG((nxgep, TX_CTL, 473 "==> nxge_start: pack(6) " 474 "(pkt_len %d pack_len %d)", 475 pkt_len, pack_len)); 476 i = blst; 477 tx_desc_p = &tx_desc_ring_vp[i]; 478 #ifdef NXGE_DEBUG 479 tx_desc_pp = &tx_desc_ring_pp[i]; 480 #endif 481 tx_msg_p = &tx_msg_ring[i]; 482 boff = pack_len - len; 483 ngathers--; 484 } else if (pack_len > bcopy_thresh && 485 header_set) { 486 pack_len = len; 487 boff = 0; 488 bcopy_thresh = nxge_bcopy_thresh; 489 NXGE_DEBUG_MSG((nxgep, TX_CTL, 490 "==> nxge_start(7): > max NEW " 491 "bcopy thresh %d " 492 "pkt_len %d pack_len %d(next)", 493 bcopy_thresh, 494 pkt_len, pack_len)); 495 } 496 last_bidx = i; 497 } 498 kaddr = (caddr_t)DMA_COMMON_VPTR(tx_msg_p->buf_dma); 499 if ((boff == TX_PKT_HEADER_SIZE) && (nmblks == 1)) { 500 hdrp = (p_tx_pkt_header_t)kaddr; 501 header_set = B_TRUE; 502 NXGE_DEBUG_MSG((nxgep, TX_CTL, 503 "==> nxge_start(7_x2): " 504 "pkt_len %d pack_len %d (new hdrp $%p)", 505 pkt_len, pack_len, hdrp)); 506 } 507 tx_msg_p->flags.dma_type = USE_BCOPY; 508 kaddr += boff; 509 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(8): " 510 "USE BCOPY: before bcopy " 511 "DESC IOADDR $%p entry %d " 512 "bcopy packets %d " 513 "bcopy kaddr $%p " 514 "bcopy ioaddr (SAD) $%p " 515 "bcopy clen %d " 516 "bcopy boff %d", 517 DMA_COMMON_IOADDR(desc_area), i, 518 tdc_stats->tx_hdr_pkts, 519 kaddr, 520 dma_ioaddr, 521 clen, 522 boff)); 523 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: " 524 "1USE BCOPY: ")); 525 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: " 526 "2USE BCOPY: ")); 527 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: " 528 "last USE BCOPY: copy from b_rptr $%p " 529 "to KADDR $%p (len %d offset %d", 530 b_rptr, kaddr, len, boff)); 531 532 bcopy(b_rptr, kaddr, len); 533 534 #ifdef NXGE_DEBUG 535 dump_len = (len > 128) ? 128: len; 536 NXGE_DEBUG_MSG((nxgep, TX_CTL, 537 "==> nxge_start: dump packets " 538 "(After BCOPY len %d)" 539 "(b_rptr $%p): %s", len, nmp->b_rptr, 540 nxge_dump_packet((char *)nmp->b_rptr, 541 dump_len))); 542 #endif 543 544 dma_handle = tx_msg_p->buf_dma_handle; 545 dma_ioaddr = DMA_COMMON_IOADDR(tx_msg_p->buf_dma); 546 (void) ddi_dma_sync(dma_handle, 547 i * nxge_bcopy_thresh, nxge_bcopy_thresh, 548 DDI_DMA_SYNC_FORDEV); 549 clen = len + boff; 550 tdc_stats->tx_hdr_pkts++; 551 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(9): " 552 "USE BCOPY: " 553 "DESC IOADDR $%p entry %d " 554 "bcopy packets %d " 555 "bcopy kaddr $%p " 556 "bcopy ioaddr (SAD) $%p " 557 "bcopy clen %d " 558 "bcopy boff %d", 559 DMA_COMMON_IOADDR(desc_area), 560 i, 561 tdc_stats->tx_hdr_pkts, 562 kaddr, 563 dma_ioaddr, 564 clen, 565 boff)); 566 } else { 567 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(12): " 568 "USE DVMA: len %d", len)); 569 tx_msg_p->flags.dma_type = USE_DMA; 570 dma_flags = DDI_DMA_WRITE; 571 if (len < nxge_dma_stream_thresh) { 572 dma_flags |= DDI_DMA_CONSISTENT; 573 } else { 574 dma_flags |= DDI_DMA_STREAMING; 575 } 576 577 dma_handle = tx_msg_p->dma_handle; 578 status = ddi_dma_addr_bind_handle(dma_handle, NULL, 579 (caddr_t)b_rptr, len, dma_flags, 580 DDI_DMA_DONTWAIT, NULL, 581 &dma_cookie, &ncookies); 582 if (status == DDI_DMA_MAPPED) { 583 dma_ioaddr = dma_cookie.dmac_laddress; 584 len = (int)dma_cookie.dmac_size; 585 clen = (uint32_t)dma_cookie.dmac_size; 586 NXGE_DEBUG_MSG((nxgep, TX_CTL, 587 "==> nxge_start(12_1): " 588 "USE DVMA: len %d clen %d " 589 "ngathers %d", 590 len, clen, 591 ngathers)); 592 #if defined(__i386) 593 npi_desc_handle.regp = (uint32_t)tx_desc_p; 594 #else 595 npi_desc_handle.regp = (uint64_t)tx_desc_p; 596 #endif 597 while (ncookies > 1) { 598 ngathers++; 599 /* 600 * this is the fix for multiple 601 * cookies, which are basically 602 * a descriptor entry, we don't set 603 * SOP bit as well as related fields 604 */ 605 606 (void) npi_txdma_desc_gather_set( 607 npi_desc_handle, 608 &tx_desc, 609 (ngathers -1), 610 mark_mode, 611 ngathers, 612 dma_ioaddr, 613 clen); 614 615 tx_msg_p->tx_msg_size = clen; 616 NXGE_DEBUG_MSG((nxgep, TX_CTL, 617 "==> nxge_start: DMA " 618 "ncookie %d " 619 "ngathers %d " 620 "dma_ioaddr $%p len %d" 621 "desc $%p descp $%p (%d)", 622 ncookies, 623 ngathers, 624 dma_ioaddr, clen, 625 *tx_desc_p, tx_desc_p, i)); 626 627 ddi_dma_nextcookie(dma_handle, 628 &dma_cookie); 629 dma_ioaddr = 630 dma_cookie.dmac_laddress; 631 632 len = (int)dma_cookie.dmac_size; 633 clen = (uint32_t)dma_cookie.dmac_size; 634 NXGE_DEBUG_MSG((nxgep, TX_CTL, 635 "==> nxge_start(12_2): " 636 "USE DVMA: len %d clen %d ", 637 len, clen)); 638 639 i = TXDMA_DESC_NEXT_INDEX(i, 1, 640 tx_ring_p->tx_wrap_mask); 641 tx_desc_p = &tx_desc_ring_vp[i]; 642 643 #if defined(__i386) 644 npi_desc_handle.regp = 645 (uint32_t)tx_desc_p; 646 #else 647 npi_desc_handle.regp = 648 (uint64_t)tx_desc_p; 649 #endif 650 tx_msg_p = &tx_msg_ring[i]; 651 tx_msg_p->flags.dma_type = USE_NONE; 652 tx_desc.value = 0; 653 654 ncookies--; 655 } 656 tdc_stats->tx_ddi_pkts++; 657 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start:" 658 "DMA: ddi packets %d", 659 tdc_stats->tx_ddi_pkts)); 660 } else { 661 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 662 "dma mapping failed for %d " 663 "bytes addr $%p flags %x (%d)", 664 len, b_rptr, status, status)); 665 good_packet = B_FALSE; 666 tdc_stats->tx_dma_bind_fail++; 667 tx_msg_p->flags.dma_type = USE_NONE; 668 if (is_lso) { 669 mp = nmp; 670 goto nxge_start_fail_lso; 671 } else { 672 goto nxge_start_fail2; 673 } 674 } 675 } /* ddi dvma */ 676 677 if (is_lso) { 678 nmp_lso_save = nmp; 679 } 680 nmp = nmp->b_cont; 681 nxge_start_control_header_only: 682 #if defined(__i386) 683 npi_desc_handle.regp = (uint32_t)tx_desc_p; 684 #else 685 npi_desc_handle.regp = (uint64_t)tx_desc_p; 686 #endif 687 ngathers++; 688 689 if (ngathers == 1) { 690 #ifdef NXGE_DEBUG 691 save_desc_p = &sop_tx_desc; 692 #endif 693 sop_tx_desc_p = &sop_tx_desc; 694 sop_tx_desc_p->value = 0; 695 sop_tx_desc_p->bits.hdw.tr_len = clen; 696 sop_tx_desc_p->bits.hdw.sad = dma_ioaddr >> 32; 697 sop_tx_desc_p->bits.ldw.sad = dma_ioaddr & 0xffffffff; 698 } else { 699 #ifdef NXGE_DEBUG 700 save_desc_p = &tx_desc; 701 #endif 702 tmp_desc_p = &tx_desc; 703 tmp_desc_p->value = 0; 704 tmp_desc_p->bits.hdw.tr_len = clen; 705 tmp_desc_p->bits.hdw.sad = dma_ioaddr >> 32; 706 tmp_desc_p->bits.ldw.sad = dma_ioaddr & 0xffffffff; 707 708 tx_desc_p->value = tmp_desc_p->value; 709 } 710 711 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(13): " 712 "Desc_entry %d ngathers %d " 713 "desc_vp $%p tx_desc_p $%p " 714 "len %d clen %d pkt_len %d pack_len %d nmblks %d " 715 "dma_ioaddr (SAD) $%p mark %d", 716 i, ngathers, 717 tx_desc_ring_vp, tx_desc_p, 718 len, clen, pkt_len, pack_len, nmblks, 719 dma_ioaddr, mark_mode)); 720 721 #ifdef NXGE_DEBUG 722 npi_desc_handle.nxgep = nxgep; 723 npi_desc_handle.function.function = nxgep->function_num; 724 npi_desc_handle.function.instance = nxgep->instance; 725 sad = (save_desc_p->value & TX_PKT_DESC_SAD_MASK); 726 xfer_len = ((save_desc_p->value & TX_PKT_DESC_TR_LEN_MASK) >> 727 TX_PKT_DESC_TR_LEN_SHIFT); 728 729 730 NXGE_DEBUG_MSG((nxgep, TX_CTL, "\n\t: value 0x%llx\n" 731 "\t\tsad $%p\ttr_len %d len %d\tnptrs %d\t" 732 "mark %d sop %d\n", 733 save_desc_p->value, 734 sad, 735 save_desc_p->bits.hdw.tr_len, 736 xfer_len, 737 save_desc_p->bits.hdw.num_ptr, 738 save_desc_p->bits.hdw.mark, 739 save_desc_p->bits.hdw.sop)); 740 741 npi_txdma_dump_desc_one(npi_desc_handle, NULL, i); 742 #endif 743 744 tx_msg_p->tx_msg_size = clen; 745 i = TXDMA_DESC_NEXT_INDEX(i, 1, tx_ring_p->tx_wrap_mask); 746 if (ngathers > nxge_tx_max_gathers) { 747 good_packet = B_FALSE; 748 hcksum_retrieve(mp, NULL, NULL, &start_offset, 749 &stuff_offset, &end_offset, &value, 750 &cksum_flags); 751 752 NXGE_DEBUG_MSG((NULL, TX_CTL, 753 "==> nxge_start(14): pull msg - " 754 "len %d pkt_len %d ngathers %d", 755 len, pkt_len, ngathers)); 756 /* Pull all message blocks from b_cont */ 757 if (is_lso) { 758 mp = nmp_lso_save; 759 goto nxge_start_fail_lso; 760 } 761 if ((msgpullup(mp, -1)) == NULL) { 762 goto nxge_start_fail2; 763 } 764 goto nxge_start_fail2; 765 } 766 } /* while (nmp) */ 767 768 tx_msg_p->tx_message = mp; 769 tx_desc_p = &tx_desc_ring_vp[sop_index]; 770 #if defined(__i386) 771 npi_desc_handle.regp = (uint32_t)tx_desc_p; 772 #else 773 npi_desc_handle.regp = (uint64_t)tx_desc_p; 774 #endif 775 776 pkthdrp = (p_tx_pkt_hdr_all_t)hdrp; 777 pkthdrp->reserved = 0; 778 hdrp->value = 0; 779 bcopy(&tmp_hdrp, hdrp, sizeof (tx_pkt_header_t)); 780 781 if (pkt_len > NXGE_MTU_DEFAULT_MAX) { 782 tdc_stats->tx_jumbo_pkts++; 783 } 784 785 min_len = (ETHERMIN + TX_PKT_HEADER_SIZE + (npads * 2)); 786 if (pkt_len < min_len) { 787 /* Assume we use bcopy to premapped buffers */ 788 kaddr = (caddr_t)DMA_COMMON_VPTR(tx_msg_p->buf_dma); 789 NXGE_DEBUG_MSG((NULL, TX_CTL, 790 "==> nxge_start(14-1): < (msg_min + 16)" 791 "len %d pkt_len %d min_len %d bzero %d ngathers %d", 792 len, pkt_len, min_len, (min_len - pkt_len), ngathers)); 793 bzero((kaddr + pkt_len), (min_len - pkt_len)); 794 pkt_len = tx_msg_p->tx_msg_size = min_len; 795 796 sop_tx_desc_p->bits.hdw.tr_len = min_len; 797 798 NXGE_MEM_PIO_WRITE64(npi_desc_handle, sop_tx_desc_p->value); 799 tx_desc_p->value = sop_tx_desc_p->value; 800 801 NXGE_DEBUG_MSG((NULL, TX_CTL, 802 "==> nxge_start(14-2): < msg_min - " 803 "len %d pkt_len %d min_len %d ngathers %d", 804 len, pkt_len, min_len, ngathers)); 805 } 806 807 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: cksum_flags 0x%x ", 808 cksum_flags)); 809 { 810 uint64_t tmp_len; 811 812 /* pkt_len already includes 16 + paddings!! */ 813 /* Update the control header length */ 814 tot_xfer_len = (pkt_len - TX_PKT_HEADER_SIZE); 815 tmp_len = hdrp->value | 816 (tot_xfer_len << TX_PKT_HEADER_TOT_XFER_LEN_SHIFT); 817 818 NXGE_DEBUG_MSG((nxgep, TX_CTL, 819 "==> nxge_start(15_x1): setting SOP " 820 "tot_xfer_len 0x%llx (%d) pkt_len %d tmp_len " 821 "0x%llx hdrp->value 0x%llx", 822 tot_xfer_len, tot_xfer_len, pkt_len, 823 tmp_len, hdrp->value)); 824 #if defined(_BIG_ENDIAN) 825 hdrp->value = ddi_swap64(tmp_len); 826 #else 827 hdrp->value = tmp_len; 828 #endif 829 NXGE_DEBUG_MSG((nxgep, 830 TX_CTL, "==> nxge_start(15_x2): setting SOP " 831 "after SWAP: tot_xfer_len 0x%llx pkt_len %d " 832 "tmp_len 0x%llx hdrp->value 0x%llx", 833 tot_xfer_len, pkt_len, 834 tmp_len, hdrp->value)); 835 } 836 837 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(15): setting SOP " 838 "wr_index %d " 839 "tot_xfer_len (%d) pkt_len %d npads %d", 840 sop_index, 841 tot_xfer_len, pkt_len, 842 npads)); 843 844 sop_tx_desc_p->bits.hdw.sop = 1; 845 sop_tx_desc_p->bits.hdw.mark = mark_mode; 846 sop_tx_desc_p->bits.hdw.num_ptr = ngathers; 847 848 NXGE_MEM_PIO_WRITE64(npi_desc_handle, sop_tx_desc_p->value); 849 850 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(16): set SOP done")); 851 852 #ifdef NXGE_DEBUG 853 npi_desc_handle.nxgep = nxgep; 854 npi_desc_handle.function.function = nxgep->function_num; 855 npi_desc_handle.function.instance = nxgep->instance; 856 857 NXGE_DEBUG_MSG((nxgep, TX_CTL, "\n\t: value 0x%llx\n" 858 "\t\tsad $%p\ttr_len %d len %d\tnptrs %d\tmark %d sop %d\n", 859 save_desc_p->value, 860 sad, 861 save_desc_p->bits.hdw.tr_len, 862 xfer_len, 863 save_desc_p->bits.hdw.num_ptr, 864 save_desc_p->bits.hdw.mark, 865 save_desc_p->bits.hdw.sop)); 866 (void) npi_txdma_dump_desc_one(npi_desc_handle, NULL, sop_index); 867 868 dump_len = (pkt_len > 128) ? 128: pkt_len; 869 NXGE_DEBUG_MSG((nxgep, TX_CTL, 870 "==> nxge_start: dump packets(17) (after sop set, len " 871 " (len/dump_len/pkt_len/tot_xfer_len) %d/%d/%d/%d):\n" 872 "ptr $%p: %s", len, dump_len, pkt_len, tot_xfer_len, 873 (char *)hdrp, 874 nxge_dump_packet((char *)hdrp, dump_len))); 875 NXGE_DEBUG_MSG((nxgep, TX_CTL, 876 "==> nxge_start(18): TX desc sync: sop_index %d", 877 sop_index)); 878 #endif 879 880 if ((ngathers == 1) || tx_ring_p->wr_index < i) { 881 (void) ddi_dma_sync(tx_desc_dma_handle, 882 sop_index * sizeof (tx_desc_t), 883 ngathers * sizeof (tx_desc_t), 884 DDI_DMA_SYNC_FORDEV); 885 886 NXGE_DEBUG_MSG((nxgep, TX_CTL, "nxge_start(19): sync 1 " 887 "cs_off = 0x%02X cs_s_off = 0x%02X " 888 "pkt_len %d ngathers %d sop_index %d\n", 889 stuff_offset, start_offset, 890 pkt_len, ngathers, sop_index)); 891 } else { /* more than one descriptor and wrap around */ 892 uint32_t nsdescs = tx_ring_p->tx_ring_size - sop_index; 893 (void) ddi_dma_sync(tx_desc_dma_handle, 894 sop_index * sizeof (tx_desc_t), 895 nsdescs * sizeof (tx_desc_t), 896 DDI_DMA_SYNC_FORDEV); 897 NXGE_DEBUG_MSG((nxgep, TX_CTL, "nxge_start(20): sync 1 " 898 "cs_off = 0x%02X cs_s_off = 0x%02X " 899 "pkt_len %d ngathers %d sop_index %d\n", 900 stuff_offset, start_offset, 901 pkt_len, ngathers, sop_index)); 902 903 (void) ddi_dma_sync(tx_desc_dma_handle, 904 0, 905 (ngathers - nsdescs) * sizeof (tx_desc_t), 906 DDI_DMA_SYNC_FORDEV); 907 NXGE_DEBUG_MSG((nxgep, TX_CTL, "nxge_start(21): sync 2 " 908 "cs_off = 0x%02X cs_s_off = 0x%02X " 909 "pkt_len %d ngathers %d sop_index %d\n", 910 stuff_offset, start_offset, 911 pkt_len, ngathers, sop_index)); 912 } 913 914 tail_index = tx_ring_p->wr_index; 915 tail_wrap = tx_ring_p->wr_index_wrap; 916 917 tx_ring_p->wr_index = i; 918 if (tx_ring_p->wr_index <= tail_index) { 919 tx_ring_p->wr_index_wrap = ((tail_wrap == B_TRUE) ? 920 B_FALSE : B_TRUE); 921 } 922 923 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: TX kick: " 924 "channel %d wr_index %d wrap %d ngathers %d desc_pend %d", 925 tx_ring_p->tdc, 926 tx_ring_p->wr_index, 927 tx_ring_p->wr_index_wrap, 928 ngathers, 929 tx_ring_p->descs_pending)); 930 931 if (is_lso) { 932 lso_ngathers += ngathers; 933 if (mp_chain != NULL) { 934 mp = mp_chain; 935 mp_chain = mp_chain->b_next; 936 mp->b_next = NULL; 937 if (nxge_lso_kick_cnt == lso_ngathers) { 938 tx_ring_p->descs_pending += lso_ngathers; 939 { 940 tx_ring_kick_t kick; 941 942 kick.value = 0; 943 kick.bits.ldw.wrap = 944 tx_ring_p->wr_index_wrap; 945 kick.bits.ldw.tail = 946 (uint16_t)tx_ring_p->wr_index; 947 948 /* Kick the Transmit kick register */ 949 TXDMA_REG_WRITE64( 950 NXGE_DEV_NPI_HANDLE(nxgep), 951 TX_RING_KICK_REG, 952 (uint8_t)tx_ring_p->tdc, 953 kick.value); 954 tdc_stats->tx_starts++; 955 956 NXGE_DEBUG_MSG((nxgep, TX_CTL, 957 "==> nxge_start: more LSO: " 958 "LSO_CNT %d", 959 lso_ngathers)); 960 } 961 lso_ngathers = 0; 962 ngathers = 0; 963 cur_index_lso = sop_index = tx_ring_p->wr_index; 964 lso_tail_wrap = tx_ring_p->wr_index_wrap; 965 } 966 NXGE_DEBUG_MSG((nxgep, TX_CTL, 967 "==> nxge_start: lso again: " 968 "lso_gathers %d ngathers %d cur_index_lso %d " 969 "wr_index %d sop_index %d", 970 lso_ngathers, ngathers, cur_index_lso, 971 tx_ring_p->wr_index, sop_index)); 972 973 NXGE_DEBUG_MSG((nxgep, TX_CTL, 974 "==> nxge_start: next : count %d", 975 lso_ngathers)); 976 lso_again = B_TRUE; 977 goto start_again; 978 } 979 ngathers = lso_ngathers; 980 } 981 982 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: TX KICKING: ")); 983 984 { 985 tx_ring_kick_t kick; 986 987 kick.value = 0; 988 kick.bits.ldw.wrap = tx_ring_p->wr_index_wrap; 989 kick.bits.ldw.tail = (uint16_t)tx_ring_p->wr_index; 990 991 /* Kick start the Transmit kick register */ 992 TXDMA_REG_WRITE64(NXGE_DEV_NPI_HANDLE(nxgep), 993 TX_RING_KICK_REG, 994 (uint8_t)tx_ring_p->tdc, 995 kick.value); 996 } 997 998 tx_ring_p->descs_pending += ngathers; 999 tdc_stats->tx_starts++; 1000 1001 if (isLDOMservice(nxgep)) { 1002 tx_ring_p->tx_ring_busy = B_FALSE; 1003 if (tx_ring_p->tx_ring_offline) { 1004 (void) atomic_swap_32(&tx_ring_p->tx_ring_offline, 1005 NXGE_TX_RING_OFFLINED); 1006 } 1007 } 1008 1009 MUTEX_EXIT(&tx_ring_p->lock); 1010 1011 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_start")); 1012 1013 return (status); 1014 1015 nxge_start_fail_lso: 1016 status = 0; 1017 good_packet = B_FALSE; 1018 if (mp != NULL) { 1019 freemsg(mp); 1020 } 1021 if (mp_chain != NULL) { 1022 freemsg(mp_chain); 1023 } 1024 if (!lso_again && !ngathers) { 1025 if (isLDOMservice(nxgep)) { 1026 tx_ring_p->tx_ring_busy = B_FALSE; 1027 if (tx_ring_p->tx_ring_offline) { 1028 (void) atomic_swap_32( 1029 &tx_ring_p->tx_ring_offline, 1030 NXGE_TX_RING_OFFLINED); 1031 } 1032 } 1033 1034 MUTEX_EXIT(&tx_ring_p->lock); 1035 NXGE_DEBUG_MSG((nxgep, TX_CTL, 1036 "==> nxge_start: lso exit (nothing changed)")); 1037 goto nxge_start_fail1; 1038 } 1039 1040 NXGE_DEBUG_MSG((nxgep, TX_CTL, 1041 "==> nxge_start (channel %d): before lso " 1042 "lso_gathers %d ngathers %d cur_index_lso %d " 1043 "wr_index %d sop_index %d lso_again %d", 1044 tx_ring_p->tdc, 1045 lso_ngathers, ngathers, cur_index_lso, 1046 tx_ring_p->wr_index, sop_index, lso_again)); 1047 1048 if (lso_again) { 1049 lso_ngathers += ngathers; 1050 ngathers = lso_ngathers; 1051 sop_index = cur_index_lso; 1052 tx_ring_p->wr_index = sop_index; 1053 tx_ring_p->wr_index_wrap = lso_tail_wrap; 1054 } 1055 1056 NXGE_DEBUG_MSG((nxgep, TX_CTL, 1057 "==> nxge_start (channel %d): after lso " 1058 "lso_gathers %d ngathers %d cur_index_lso %d " 1059 "wr_index %d sop_index %d lso_again %d", 1060 tx_ring_p->tdc, 1061 lso_ngathers, ngathers, cur_index_lso, 1062 tx_ring_p->wr_index, sop_index, lso_again)); 1063 1064 nxge_start_fail2: 1065 if (good_packet == B_FALSE) { 1066 cur_index = sop_index; 1067 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: clean up")); 1068 for (i = 0; i < ngathers; i++) { 1069 tx_desc_p = &tx_desc_ring_vp[cur_index]; 1070 #if defined(__i386) 1071 npi_handle.regp = (uint32_t)tx_desc_p; 1072 #else 1073 npi_handle.regp = (uint64_t)tx_desc_p; 1074 #endif 1075 tx_msg_p = &tx_msg_ring[cur_index]; 1076 (void) npi_txdma_desc_set_zero(npi_handle, 1); 1077 if (tx_msg_p->flags.dma_type == USE_DVMA) { 1078 NXGE_DEBUG_MSG((nxgep, TX_CTL, 1079 "tx_desc_p = %X index = %d", 1080 tx_desc_p, tx_ring_p->rd_index)); 1081 (void) dvma_unload(tx_msg_p->dvma_handle, 1082 0, -1); 1083 tx_msg_p->dvma_handle = NULL; 1084 if (tx_ring_p->dvma_wr_index == 1085 tx_ring_p->dvma_wrap_mask) 1086 tx_ring_p->dvma_wr_index = 0; 1087 else 1088 tx_ring_p->dvma_wr_index++; 1089 tx_ring_p->dvma_pending--; 1090 } else if (tx_msg_p->flags.dma_type == USE_DMA) { 1091 if (ddi_dma_unbind_handle( 1092 tx_msg_p->dma_handle)) { 1093 cmn_err(CE_WARN, "!nxge_start: " 1094 "ddi_dma_unbind_handle failed"); 1095 } 1096 } 1097 tx_msg_p->flags.dma_type = USE_NONE; 1098 cur_index = TXDMA_DESC_NEXT_INDEX(cur_index, 1, 1099 tx_ring_p->tx_wrap_mask); 1100 1101 } 1102 1103 nxgep->resched_needed = B_TRUE; 1104 } 1105 1106 if (isLDOMservice(nxgep)) { 1107 tx_ring_p->tx_ring_busy = B_FALSE; 1108 if (tx_ring_p->tx_ring_offline) { 1109 (void) atomic_swap_32(&tx_ring_p->tx_ring_offline, 1110 NXGE_TX_RING_OFFLINED); 1111 } 1112 } 1113 1114 MUTEX_EXIT(&tx_ring_p->lock); 1115 1116 nxge_start_fail1: 1117 /* Add FMA to check the access handle nxge_hregh */ 1118 1119 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_start")); 1120 1121 return (status); 1122 } 1123 1124 int 1125 nxge_serial_tx(mblk_t *mp, void *arg) 1126 { 1127 p_tx_ring_t tx_ring_p = (p_tx_ring_t)arg; 1128 p_nxge_t nxgep = tx_ring_p->nxgep; 1129 int status = 0; 1130 1131 if (isLDOMservice(nxgep)) { 1132 if (tx_ring_p->tx_ring_offline) { 1133 freemsg(mp); 1134 return (status); 1135 } 1136 } 1137 1138 status = nxge_start(nxgep, tx_ring_p, mp); 1139 return (status); 1140 } 1141 1142 boolean_t 1143 nxge_send(p_nxge_t nxgep, mblk_t *mp, p_mac_tx_hint_t hp) 1144 { 1145 p_tx_ring_t *tx_rings; 1146 uint8_t ring_index; 1147 p_tx_ring_t tx_ring_p; 1148 nxge_grp_t *group; 1149 1150 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_send")); 1151 1152 ASSERT(mp->b_next == NULL); 1153 1154 group = nxgep->tx_set.group[0]; /* The default group */ 1155 ring_index = nxge_tx_lb_ring_1(mp, group->count, hp); 1156 1157 tx_rings = nxgep->tx_rings->rings; 1158 tx_ring_p = tx_rings[group->legend[ring_index]]; 1159 1160 if (isLDOMservice(nxgep)) { 1161 if (tx_ring_p->tx_ring_offline) { 1162 /* 1163 * OFFLINE means that it is in the process of being 1164 * shared - that is, it has been claimed by the HIO 1165 * code, but hasn't been unlinked from <group> yet. 1166 * So in this case use the first TDC, which always 1167 * belongs to the service domain and can't be shared. 1168 */ 1169 ring_index = 0; 1170 tx_ring_p = tx_rings[group->legend[ring_index]]; 1171 } 1172 } 1173 1174 NXGE_DEBUG_MSG((nxgep, TX_CTL, "count %d, tx_rings[%d] = %p", 1175 (int)group->count, group->legend[ring_index], tx_ring_p)); 1176 1177 switch (nxge_tx_scheme) { 1178 case NXGE_USE_START: 1179 if (nxge_start(nxgep, tx_ring_p, mp)) { 1180 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_send: failed " 1181 "ring index %d", ring_index)); 1182 return (B_FALSE); 1183 } 1184 break; 1185 1186 case NXGE_USE_SERIAL: 1187 default: 1188 nxge_serialize_enter(tx_ring_p->serial, mp); 1189 break; 1190 } 1191 1192 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_send: ring index %d", 1193 ring_index)); 1194 1195 return (B_TRUE); 1196 } 1197 1198 /* 1199 * nxge_m_tx() - send a chain of packets 1200 */ 1201 mblk_t * 1202 nxge_m_tx(void *arg, mblk_t *mp) 1203 { 1204 p_nxge_t nxgep = (p_nxge_t)arg; 1205 mblk_t *next; 1206 mac_tx_hint_t hint; 1207 1208 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_m_tx")); 1209 1210 if ((!(nxgep->drv_state & STATE_HW_INITIALIZED)) || 1211 (nxgep->nxge_mac_state != NXGE_MAC_STARTED)) { 1212 NXGE_DEBUG_MSG((nxgep, DDI_CTL, 1213 "==> nxge_m_tx: hardware not initialized")); 1214 NXGE_DEBUG_MSG((nxgep, DDI_CTL, 1215 "<== nxge_m_tx")); 1216 freemsgchain(mp); 1217 mp = NULL; 1218 return (mp); 1219 } 1220 1221 hint.hash = NULL; 1222 hint.vid = 0; 1223 hint.sap = 0; 1224 1225 while (mp != NULL) { 1226 next = mp->b_next; 1227 mp->b_next = NULL; 1228 1229 /* 1230 * Until Nemo tx resource works, the mac driver 1231 * does the load balancing based on TCP port, 1232 * or CPU. For debugging, we use a system 1233 * configurable parameter. 1234 */ 1235 if (!nxge_send(nxgep, mp, &hint)) { 1236 mp->b_next = next; 1237 break; 1238 } 1239 1240 mp = next; 1241 1242 NXGE_DEBUG_MSG((NULL, TX_CTL, 1243 "==> nxge_m_tx: (go back to loop) mp $%p next $%p", 1244 mp, next)); 1245 } 1246 1247 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_m_tx")); 1248 return (mp); 1249 } 1250 1251 int 1252 nxge_tx_lb_ring_1(p_mblk_t mp, uint32_t maxtdcs, p_mac_tx_hint_t hp) 1253 { 1254 uint8_t ring_index = 0; 1255 uint8_t *tcp_port; 1256 p_mblk_t nmp; 1257 size_t mblk_len; 1258 size_t iph_len; 1259 size_t hdrs_size; 1260 uint8_t hdrs_buf[sizeof (struct ether_header) + 1261 IP_MAX_HDR_LENGTH + sizeof (uint32_t)]; 1262 /* 1263 * allocate space big enough to cover 1264 * the max ip header length and the first 1265 * 4 bytes of the TCP/IP header. 1266 */ 1267 1268 boolean_t qos = B_FALSE; 1269 1270 NXGE_DEBUG_MSG((NULL, TX_CTL, "==> nxge_tx_lb_ring")); 1271 1272 if (hp->vid) { 1273 qos = B_TRUE; 1274 } 1275 switch (nxge_tx_lb_policy) { 1276 case NXGE_TX_LB_TCPUDP: /* default IPv4 TCP/UDP */ 1277 default: 1278 tcp_port = mp->b_rptr; 1279 if (!nxge_no_tx_lb && !qos && 1280 (ntohs(((p_ether_header_t)tcp_port)->ether_type) 1281 == ETHERTYPE_IP)) { 1282 nmp = mp; 1283 mblk_len = MBLKL(nmp); 1284 tcp_port = NULL; 1285 if (mblk_len > sizeof (struct ether_header) + 1286 sizeof (uint8_t)) { 1287 tcp_port = nmp->b_rptr + 1288 sizeof (struct ether_header); 1289 mblk_len -= sizeof (struct ether_header); 1290 iph_len = ((*tcp_port) & 0x0f) << 2; 1291 if (mblk_len > (iph_len + sizeof (uint32_t))) { 1292 tcp_port = nmp->b_rptr; 1293 } else { 1294 tcp_port = NULL; 1295 } 1296 } 1297 if (tcp_port == NULL) { 1298 hdrs_size = 0; 1299 ((p_ether_header_t)hdrs_buf)->ether_type = 0; 1300 while ((nmp) && (hdrs_size < 1301 sizeof (hdrs_buf))) { 1302 mblk_len = MBLKL(nmp); 1303 if (mblk_len >= 1304 (sizeof (hdrs_buf) - hdrs_size)) 1305 mblk_len = sizeof (hdrs_buf) - 1306 hdrs_size; 1307 bcopy(nmp->b_rptr, 1308 &hdrs_buf[hdrs_size], mblk_len); 1309 hdrs_size += mblk_len; 1310 nmp = nmp->b_cont; 1311 } 1312 tcp_port = hdrs_buf; 1313 } 1314 tcp_port += sizeof (ether_header_t); 1315 if (!(tcp_port[6] & 0x3f) && !(tcp_port[7] & 0xff)) { 1316 switch (tcp_port[9]) { 1317 case IPPROTO_TCP: 1318 case IPPROTO_UDP: 1319 case IPPROTO_ESP: 1320 tcp_port += ((*tcp_port) & 0x0f) << 2; 1321 ring_index = 1322 ((tcp_port[0] ^ 1323 tcp_port[1] ^ 1324 tcp_port[2] ^ 1325 tcp_port[3]) % maxtdcs); 1326 break; 1327 1328 case IPPROTO_AH: 1329 /* SPI starts at the 4th byte */ 1330 tcp_port += ((*tcp_port) & 0x0f) << 2; 1331 ring_index = 1332 ((tcp_port[4] ^ 1333 tcp_port[5] ^ 1334 tcp_port[6] ^ 1335 tcp_port[7]) % maxtdcs); 1336 break; 1337 1338 default: 1339 ring_index = tcp_port[19] % maxtdcs; 1340 break; 1341 } 1342 } else { /* fragmented packet */ 1343 ring_index = tcp_port[19] % maxtdcs; 1344 } 1345 } else { 1346 ring_index = mp->b_band % maxtdcs; 1347 } 1348 break; 1349 1350 case NXGE_TX_LB_HASH: 1351 if (hp->hash) { 1352 #if defined(__i386) 1353 ring_index = ((uint32_t)(hp->hash) % maxtdcs); 1354 #else 1355 ring_index = ((uint64_t)(hp->hash) % maxtdcs); 1356 #endif 1357 } else { 1358 ring_index = mp->b_band % maxtdcs; 1359 } 1360 break; 1361 1362 case NXGE_TX_LB_DEST_MAC: /* Use destination MAC address */ 1363 tcp_port = mp->b_rptr; 1364 ring_index = tcp_port[5] % maxtdcs; 1365 break; 1366 } 1367 1368 NXGE_DEBUG_MSG((NULL, TX_CTL, "<== nxge_tx_lb_ring")); 1369 1370 return (ring_index); 1371 } 1372 1373 uint_t 1374 nxge_reschedule(caddr_t arg) 1375 { 1376 p_nxge_t nxgep; 1377 1378 nxgep = (p_nxge_t)arg; 1379 1380 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_reschedule")); 1381 1382 if (nxgep->nxge_mac_state == NXGE_MAC_STARTED && 1383 nxgep->resched_needed) { 1384 if (!isLDOMguest(nxgep)) 1385 mac_tx_update(nxgep->mach); 1386 #if defined(sun4v) 1387 else { /* isLDOMguest(nxgep) */ 1388 nxge_hio_data_t *nhd = (nxge_hio_data_t *) 1389 nxgep->nxge_hw_p->hio; 1390 nx_vio_fp_t *vio = &nhd->hio.vio; 1391 1392 /* Call back vnet. */ 1393 if (vio->cb.vio_net_tx_update) { 1394 (*vio->cb.vio_net_tx_update) 1395 (nxgep->hio_vr->vhp); 1396 } 1397 } 1398 #endif 1399 nxgep->resched_needed = B_FALSE; 1400 nxgep->resched_running = B_FALSE; 1401 } 1402 1403 NXGE_DEBUG_MSG((NULL, TX_CTL, "<== nxge_reschedule")); 1404 return (DDI_INTR_CLAIMED); 1405 } 1406 1407 1408 /* Software LSO starts here */ 1409 static void 1410 nxge_hcksum_retrieve(mblk_t *mp, 1411 uint32_t *start, uint32_t *stuff, uint32_t *end, 1412 uint32_t *value, uint32_t *flags) 1413 { 1414 if (mp->b_datap->db_type == M_DATA) { 1415 if (flags != NULL) { 1416 *flags = DB_CKSUMFLAGS(mp) & (HCK_IPV4_HDRCKSUM | 1417 HCK_PARTIALCKSUM | HCK_FULLCKSUM | 1418 HCK_FULLCKSUM_OK); 1419 if ((*flags & (HCK_PARTIALCKSUM | 1420 HCK_FULLCKSUM)) != 0) { 1421 if (value != NULL) 1422 *value = (uint32_t)DB_CKSUM16(mp); 1423 if ((*flags & HCK_PARTIALCKSUM) != 0) { 1424 if (start != NULL) 1425 *start = 1426 (uint32_t)DB_CKSUMSTART(mp); 1427 if (stuff != NULL) 1428 *stuff = 1429 (uint32_t)DB_CKSUMSTUFF(mp); 1430 if (end != NULL) 1431 *end = 1432 (uint32_t)DB_CKSUMEND(mp); 1433 } 1434 } 1435 } 1436 } 1437 } 1438 1439 static void 1440 nxge_lso_info_get(mblk_t *mp, uint32_t *mss, uint32_t *flags) 1441 { 1442 ASSERT(DB_TYPE(mp) == M_DATA); 1443 1444 *mss = 0; 1445 if (flags != NULL) { 1446 *flags = DB_CKSUMFLAGS(mp) & HW_LSO; 1447 if ((*flags != 0) && (mss != NULL)) { 1448 *mss = (uint32_t)DB_LSOMSS(mp); 1449 } 1450 NXGE_DEBUG_MSG((NULL, TX_CTL, 1451 "==> nxge_lso_info_get(flag !=NULL): mss %d *flags 0x%x", 1452 *mss, *flags)); 1453 } 1454 1455 NXGE_DEBUG_MSG((NULL, TX_CTL, 1456 "<== nxge_lso_info_get: mss %d", *mss)); 1457 } 1458 1459 /* 1460 * Do Soft LSO on the oversized packet. 1461 * 1462 * 1. Create a chain of message for headers. 1463 * 2. Fill up header messages with proper information. 1464 * 3. Copy Eithernet, IP, and TCP headers from the original message to 1465 * each new message with necessary adjustments. 1466 * * Unchange the ethernet header for DIX frames. (by default) 1467 * * IP Total Length field is updated to MSS or less(only for the last one). 1468 * * IP Identification value is incremented by one for each packet. 1469 * * TCP sequence Number is recalculated according to the payload length. 1470 * * Set FIN and/or PSH flags for the *last* packet if applied. 1471 * * TCP partial Checksum 1472 * 4. Update LSO information in the first message header. 1473 * 5. Release the original message header. 1474 */ 1475 static mblk_t * 1476 nxge_do_softlso(mblk_t *mp, uint32_t mss) 1477 { 1478 uint32_t hckflags; 1479 int pktlen; 1480 int hdrlen; 1481 int segnum; 1482 int i; 1483 struct ether_vlan_header *evh; 1484 int ehlen, iphlen, tcphlen; 1485 struct ip *oiph, *niph; 1486 struct tcphdr *otcph, *ntcph; 1487 int available, len, left; 1488 uint16_t ip_id; 1489 uint32_t tcp_seq; 1490 #ifdef __sparc 1491 uint32_t tcp_seq_tmp; 1492 #endif 1493 mblk_t *datamp; 1494 uchar_t *rptr; 1495 mblk_t *nmp; 1496 mblk_t *cmp; 1497 mblk_t *mp_chain; 1498 boolean_t do_cleanup = B_FALSE; 1499 t_uscalar_t start_offset = 0; 1500 t_uscalar_t stuff_offset = 0; 1501 t_uscalar_t value = 0; 1502 uint16_t l4_len; 1503 ipaddr_t src, dst; 1504 uint32_t cksum, sum, l4cksum; 1505 1506 NXGE_DEBUG_MSG((NULL, TX_CTL, 1507 "==> nxge_do_softlso")); 1508 /* 1509 * check the length of LSO packet payload and calculate the number of 1510 * segments to be generated. 1511 */ 1512 pktlen = msgsize(mp); 1513 evh = (struct ether_vlan_header *)mp->b_rptr; 1514 1515 /* VLAN? */ 1516 if (evh->ether_tpid == htons(ETHERTYPE_VLAN)) 1517 ehlen = sizeof (struct ether_vlan_header); 1518 else 1519 ehlen = sizeof (struct ether_header); 1520 oiph = (struct ip *)(mp->b_rptr + ehlen); 1521 iphlen = oiph->ip_hl * 4; 1522 otcph = (struct tcphdr *)(mp->b_rptr + ehlen + iphlen); 1523 tcphlen = otcph->th_off * 4; 1524 1525 l4_len = pktlen - ehlen - iphlen; 1526 1527 NXGE_DEBUG_MSG((NULL, TX_CTL, 1528 "==> nxge_do_softlso: mss %d oiph $%p " 1529 "original ip_sum oiph->ip_sum 0x%x " 1530 "original tcp_sum otcph->th_sum 0x%x " 1531 "oiph->ip_len %d pktlen %d ehlen %d " 1532 "l4_len %d (0x%x) ip_len - iphlen %d ", 1533 mss, 1534 oiph, 1535 oiph->ip_sum, 1536 otcph->th_sum, 1537 ntohs(oiph->ip_len), pktlen, 1538 ehlen, 1539 l4_len, 1540 l4_len, 1541 ntohs(oiph->ip_len) - iphlen)); 1542 1543 /* IPv4 + TCP */ 1544 if (!(oiph->ip_v == IPV4_VERSION)) { 1545 NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL, 1546 "<== nxge_do_softlso: not IPV4 " 1547 "oiph->ip_len %d pktlen %d ehlen %d tcphlen %d", 1548 ntohs(oiph->ip_len), pktlen, ehlen, 1549 tcphlen)); 1550 freemsg(mp); 1551 return (NULL); 1552 } 1553 1554 if (!(oiph->ip_p == IPPROTO_TCP)) { 1555 NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL, 1556 "<== nxge_do_softlso: not TCP " 1557 "oiph->ip_len %d pktlen %d ehlen %d tcphlen %d", 1558 ntohs(oiph->ip_len), pktlen, ehlen, 1559 tcphlen)); 1560 freemsg(mp); 1561 return (NULL); 1562 } 1563 1564 if (!(ntohs(oiph->ip_len) == pktlen - ehlen)) { 1565 NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL, 1566 "<== nxge_do_softlso: len not matched " 1567 "oiph->ip_len %d pktlen %d ehlen %d tcphlen %d", 1568 ntohs(oiph->ip_len), pktlen, ehlen, 1569 tcphlen)); 1570 freemsg(mp); 1571 return (NULL); 1572 } 1573 1574 otcph = (struct tcphdr *)(mp->b_rptr + ehlen + iphlen); 1575 tcphlen = otcph->th_off * 4; 1576 1577 /* TCP flags can not include URG, RST, or SYN */ 1578 VERIFY((otcph->th_flags & (TH_SYN | TH_RST | TH_URG)) == 0); 1579 1580 hdrlen = ehlen + iphlen + tcphlen; 1581 1582 VERIFY(MBLKL(mp) >= hdrlen); 1583 1584 if (MBLKL(mp) > hdrlen) { 1585 datamp = mp; 1586 rptr = mp->b_rptr + hdrlen; 1587 } else { /* = */ 1588 datamp = mp->b_cont; 1589 rptr = datamp->b_rptr; 1590 } 1591 1592 NXGE_DEBUG_MSG((NULL, TX_CTL, 1593 "nxge_do_softlso: otcph $%p pktlen: %d, " 1594 "hdrlen %d ehlen %d iphlen %d tcphlen %d " 1595 "mblkl(mp): %d, mblkl(datamp): %d", 1596 otcph, 1597 pktlen, hdrlen, ehlen, iphlen, tcphlen, 1598 (int)MBLKL(mp), (int)MBLKL(datamp))); 1599 1600 hckflags = 0; 1601 nxge_hcksum_retrieve(mp, 1602 &start_offset, &stuff_offset, &value, NULL, &hckflags); 1603 1604 dst = oiph->ip_dst.s_addr; 1605 src = oiph->ip_src.s_addr; 1606 1607 cksum = (dst >> 16) + (dst & 0xFFFF) + 1608 (src >> 16) + (src & 0xFFFF); 1609 l4cksum = cksum + IP_TCP_CSUM_COMP; 1610 1611 sum = l4_len + l4cksum; 1612 sum = (sum & 0xFFFF) + (sum >> 16); 1613 1614 NXGE_DEBUG_MSG((NULL, TX_CTL, 1615 "==> nxge_do_softlso: dst 0x%x src 0x%x sum 0x%x ~new 0x%x " 1616 "hckflags 0x%x start_offset %d stuff_offset %d " 1617 "value (original) 0x%x th_sum 0x%x " 1618 "pktlen %d l4_len %d (0x%x) " 1619 "MBLKL(mp): %d, MBLKL(datamp): %d dump header %s", 1620 dst, src, 1621 (sum & 0xffff), (~sum & 0xffff), 1622 hckflags, start_offset, stuff_offset, 1623 value, otcph->th_sum, 1624 pktlen, 1625 l4_len, 1626 l4_len, 1627 ntohs(oiph->ip_len) - (int)MBLKL(mp), 1628 (int)MBLKL(datamp), 1629 nxge_dump_packet((char *)evh, 12))); 1630 1631 /* 1632 * Start to process. 1633 */ 1634 available = pktlen - hdrlen; 1635 segnum = (available - 1) / mss + 1; 1636 1637 NXGE_DEBUG_MSG((NULL, TX_CTL, 1638 "==> nxge_do_softlso: pktlen %d " 1639 "MBLKL(mp): %d, MBLKL(datamp): %d " 1640 "available %d mss %d segnum %d", 1641 pktlen, (int)MBLKL(mp), (int)MBLKL(datamp), 1642 available, 1643 mss, 1644 segnum)); 1645 1646 VERIFY(segnum >= 2); 1647 1648 /* 1649 * Try to pre-allocate all header messages 1650 */ 1651 mp_chain = NULL; 1652 for (i = 0; i < segnum; i++) { 1653 if ((nmp = allocb(hdrlen, 0)) == NULL) { 1654 /* Clean up the mp_chain */ 1655 while (mp_chain != NULL) { 1656 nmp = mp_chain; 1657 mp_chain = mp_chain->b_next; 1658 freemsg(nmp); 1659 } 1660 NXGE_DEBUG_MSG((NULL, TX_CTL, 1661 "<== nxge_do_softlso: " 1662 "Could not allocate enough messages for headers!")); 1663 freemsg(mp); 1664 return (NULL); 1665 } 1666 nmp->b_next = mp_chain; 1667 mp_chain = nmp; 1668 1669 NXGE_DEBUG_MSG((NULL, TX_CTL, 1670 "==> nxge_do_softlso: " 1671 "mp $%p nmp $%p mp_chain $%p mp_chain->b_next $%p", 1672 mp, nmp, mp_chain, mp_chain->b_next)); 1673 } 1674 1675 NXGE_DEBUG_MSG((NULL, TX_CTL, 1676 "==> nxge_do_softlso: mp $%p nmp $%p mp_chain $%p", 1677 mp, nmp, mp_chain)); 1678 1679 /* 1680 * Associate payload with new packets 1681 */ 1682 cmp = mp_chain; 1683 left = available; 1684 while (cmp != NULL) { 1685 nmp = dupb(datamp); 1686 if (nmp == NULL) { 1687 do_cleanup = B_TRUE; 1688 NXGE_DEBUG_MSG((NULL, TX_CTL, 1689 "==>nxge_do_softlso: " 1690 "Can not dupb(datamp), have to do clean up")); 1691 goto cleanup_allocated_msgs; 1692 } 1693 1694 NXGE_DEBUG_MSG((NULL, TX_CTL, 1695 "==> nxge_do_softlso: (loop) before mp $%p cmp $%p " 1696 "dupb nmp $%p len %d left %d msd %d ", 1697 mp, cmp, nmp, len, left, mss)); 1698 1699 cmp->b_cont = nmp; 1700 nmp->b_rptr = rptr; 1701 len = (left < mss) ? left : mss; 1702 left -= len; 1703 1704 NXGE_DEBUG_MSG((NULL, TX_CTL, 1705 "==> nxge_do_softlso: (loop) after mp $%p cmp $%p " 1706 "dupb nmp $%p len %d left %d mss %d ", 1707 mp, cmp, nmp, len, left, mss)); 1708 NXGE_DEBUG_MSG((NULL, TX_CTL, 1709 "nxge_do_softlso: before available: %d, " 1710 "left: %d, len: %d, segnum: %d MBLK(nmp): %d", 1711 available, left, len, segnum, (int)MBLKL(nmp))); 1712 1713 len -= MBLKL(nmp); 1714 NXGE_DEBUG_MSG((NULL, TX_CTL, 1715 "nxge_do_softlso: after available: %d, " 1716 "left: %d, len: %d, segnum: %d MBLK(nmp): %d", 1717 available, left, len, segnum, (int)MBLKL(nmp))); 1718 1719 while (len > 0) { 1720 mblk_t *mmp = NULL; 1721 1722 NXGE_DEBUG_MSG((NULL, TX_CTL, 1723 "nxge_do_softlso: (4) len > 0 available: %d, " 1724 "left: %d, len: %d, segnum: %d MBLK(nmp): %d", 1725 available, left, len, segnum, (int)MBLKL(nmp))); 1726 1727 if (datamp->b_cont != NULL) { 1728 datamp = datamp->b_cont; 1729 rptr = datamp->b_rptr; 1730 mmp = dupb(datamp); 1731 if (mmp == NULL) { 1732 do_cleanup = B_TRUE; 1733 NXGE_DEBUG_MSG((NULL, TX_CTL, 1734 "==> nxge_do_softlso: " 1735 "Can not dupb(datamp) (1), :" 1736 "have to do clean up")); 1737 NXGE_DEBUG_MSG((NULL, TX_CTL, 1738 "==> nxge_do_softlso: " 1739 "available: %d, left: %d, " 1740 "len: %d, MBLKL(nmp): %d", 1741 available, left, len, 1742 (int)MBLKL(nmp))); 1743 goto cleanup_allocated_msgs; 1744 } 1745 } else { 1746 NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL, 1747 "==> nxge_do_softlso: " 1748 "(1)available: %d, left: %d, " 1749 "len: %d, MBLKL(nmp): %d", 1750 available, left, len, 1751 (int)MBLKL(nmp))); 1752 cmn_err(CE_PANIC, 1753 "==> nxge_do_softlso: " 1754 "Pointers must have been corrupted!\n" 1755 "datamp: $%p, nmp: $%p, rptr: $%p", 1756 (void *)datamp, 1757 (void *)nmp, 1758 (void *)rptr); 1759 } 1760 nmp->b_cont = mmp; 1761 nmp = mmp; 1762 len -= MBLKL(nmp); 1763 } 1764 if (len < 0) { 1765 nmp->b_wptr += len; 1766 rptr = nmp->b_wptr; 1767 NXGE_DEBUG_MSG((NULL, TX_CTL, 1768 "(5) len < 0 (less than 0)" 1769 "available: %d, left: %d, len: %d, MBLKL(nmp): %d", 1770 available, left, len, (int)MBLKL(nmp))); 1771 1772 } else if (len == 0) { 1773 if (datamp->b_cont != NULL) { 1774 NXGE_DEBUG_MSG((NULL, TX_CTL, 1775 "(5) len == 0" 1776 "available: %d, left: %d, len: %d, " 1777 "MBLKL(nmp): %d", 1778 available, left, len, (int)MBLKL(nmp))); 1779 datamp = datamp->b_cont; 1780 rptr = datamp->b_rptr; 1781 } else { 1782 NXGE_DEBUG_MSG((NULL, TX_CTL, 1783 "(6)available b_cont == NULL : %d, " 1784 "left: %d, len: %d, MBLKL(nmp): %d", 1785 available, left, len, (int)MBLKL(nmp))); 1786 1787 VERIFY(cmp->b_next == NULL); 1788 VERIFY(left == 0); 1789 break; /* Done! */ 1790 } 1791 } 1792 cmp = cmp->b_next; 1793 1794 NXGE_DEBUG_MSG((NULL, TX_CTL, 1795 "(7) do_softlso: " 1796 "next mp in mp_chain available len != 0 : %d, " 1797 "left: %d, len: %d, MBLKL(nmp): %d", 1798 available, left, len, (int)MBLKL(nmp))); 1799 } 1800 1801 /* 1802 * From now, start to fill up all headers for the first message 1803 * Hardware checksum flags need to be updated separately for FULLCKSUM 1804 * and PARTIALCKSUM cases. For full checksum, copy the original flags 1805 * into every new packet is enough. But for HCK_PARTIALCKSUM, all 1806 * required fields need to be updated properly. 1807 */ 1808 nmp = mp_chain; 1809 bcopy(mp->b_rptr, nmp->b_rptr, hdrlen); 1810 nmp->b_wptr = nmp->b_rptr + hdrlen; 1811 niph = (struct ip *)(nmp->b_rptr + ehlen); 1812 niph->ip_len = htons(mss + iphlen + tcphlen); 1813 ip_id = ntohs(niph->ip_id); 1814 ntcph = (struct tcphdr *)(nmp->b_rptr + ehlen + iphlen); 1815 #ifdef __sparc 1816 bcopy((char *)&ntcph->th_seq, &tcp_seq_tmp, 4); 1817 tcp_seq = ntohl(tcp_seq_tmp); 1818 #else 1819 tcp_seq = ntohl(ntcph->th_seq); 1820 #endif 1821 1822 ntcph->th_flags &= ~(TH_FIN | TH_PUSH | TH_RST); 1823 1824 DB_CKSUMFLAGS(nmp) = (uint16_t)hckflags; 1825 DB_CKSUMSTART(nmp) = start_offset; 1826 DB_CKSUMSTUFF(nmp) = stuff_offset; 1827 1828 /* calculate IP checksum and TCP pseudo header checksum */ 1829 niph->ip_sum = 0; 1830 niph->ip_sum = (uint16_t)nxge_csgen((uint16_t *)niph, iphlen); 1831 1832 l4_len = mss + tcphlen; 1833 sum = htons(l4_len) + l4cksum; 1834 sum = (sum & 0xFFFF) + (sum >> 16); 1835 ntcph->th_sum = (sum & 0xffff); 1836 1837 NXGE_DEBUG_MSG((NULL, TX_CTL, 1838 "==> nxge_do_softlso: first mp $%p (mp_chain $%p) " 1839 "mss %d pktlen %d l4_len %d (0x%x) " 1840 "MBLKL(mp): %d, MBLKL(datamp): %d " 1841 "ip_sum 0x%x " 1842 "th_sum 0x%x sum 0x%x ) " 1843 "dump first ip->tcp %s", 1844 nmp, mp_chain, 1845 mss, 1846 pktlen, 1847 l4_len, 1848 l4_len, 1849 (int)MBLKL(mp), (int)MBLKL(datamp), 1850 niph->ip_sum, 1851 ntcph->th_sum, 1852 sum, 1853 nxge_dump_packet((char *)niph, 52))); 1854 1855 cmp = nmp; 1856 while ((nmp = nmp->b_next)->b_next != NULL) { 1857 NXGE_DEBUG_MSG((NULL, TX_CTL, 1858 "==>nxge_do_softlso: middle l4_len %d ", l4_len)); 1859 bcopy(cmp->b_rptr, nmp->b_rptr, hdrlen); 1860 nmp->b_wptr = nmp->b_rptr + hdrlen; 1861 niph = (struct ip *)(nmp->b_rptr + ehlen); 1862 niph->ip_id = htons(++ip_id); 1863 niph->ip_len = htons(mss + iphlen + tcphlen); 1864 ntcph = (struct tcphdr *)(nmp->b_rptr + ehlen + iphlen); 1865 tcp_seq += mss; 1866 1867 ntcph->th_flags &= ~(TH_FIN | TH_PUSH | TH_RST | TH_URG); 1868 1869 #ifdef __sparc 1870 tcp_seq_tmp = htonl(tcp_seq); 1871 bcopy(&tcp_seq_tmp, (char *)&ntcph->th_seq, 4); 1872 #else 1873 ntcph->th_seq = htonl(tcp_seq); 1874 #endif 1875 DB_CKSUMFLAGS(nmp) = (uint16_t)hckflags; 1876 DB_CKSUMSTART(nmp) = start_offset; 1877 DB_CKSUMSTUFF(nmp) = stuff_offset; 1878 1879 /* calculate IP checksum and TCP pseudo header checksum */ 1880 niph->ip_sum = 0; 1881 niph->ip_sum = (uint16_t)nxge_csgen((uint16_t *)niph, iphlen); 1882 ntcph->th_sum = (sum & 0xffff); 1883 1884 NXGE_DEBUG_MSG((NULL, TX_CTL, 1885 "==> nxge_do_softlso: middle ip_sum 0x%x " 1886 "th_sum 0x%x " 1887 " mp $%p (mp_chain $%p) pktlen %d " 1888 "MBLKL(mp): %d, MBLKL(datamp): %d ", 1889 niph->ip_sum, 1890 ntcph->th_sum, 1891 nmp, mp_chain, 1892 pktlen, (int)MBLKL(mp), (int)MBLKL(datamp))); 1893 } 1894 1895 /* Last segment */ 1896 /* 1897 * Set FIN and/or PSH flags if present only in the last packet. 1898 * The ip_len could be different from prior packets. 1899 */ 1900 bcopy(cmp->b_rptr, nmp->b_rptr, hdrlen); 1901 nmp->b_wptr = nmp->b_rptr + hdrlen; 1902 niph = (struct ip *)(nmp->b_rptr + ehlen); 1903 niph->ip_id = htons(++ip_id); 1904 niph->ip_len = htons(msgsize(nmp->b_cont) + iphlen + tcphlen); 1905 ntcph = (struct tcphdr *)(nmp->b_rptr + ehlen + iphlen); 1906 tcp_seq += mss; 1907 #ifdef __sparc 1908 tcp_seq_tmp = htonl(tcp_seq); 1909 bcopy(&tcp_seq_tmp, (char *)&ntcph->th_seq, 4); 1910 #else 1911 ntcph->th_seq = htonl(tcp_seq); 1912 #endif 1913 ntcph->th_flags = (otcph->th_flags & ~TH_URG); 1914 1915 DB_CKSUMFLAGS(nmp) = (uint16_t)hckflags; 1916 DB_CKSUMSTART(nmp) = start_offset; 1917 DB_CKSUMSTUFF(nmp) = stuff_offset; 1918 1919 /* calculate IP checksum and TCP pseudo header checksum */ 1920 niph->ip_sum = 0; 1921 niph->ip_sum = (uint16_t)nxge_csgen((uint16_t *)niph, iphlen); 1922 1923 l4_len = ntohs(niph->ip_len) - iphlen; 1924 sum = htons(l4_len) + l4cksum; 1925 sum = (sum & 0xFFFF) + (sum >> 16); 1926 ntcph->th_sum = (sum & 0xffff); 1927 1928 NXGE_DEBUG_MSG((NULL, TX_CTL, 1929 "==> nxge_do_softlso: last next " 1930 "niph->ip_sum 0x%x " 1931 "ntcph->th_sum 0x%x sum 0x%x " 1932 "dump last ip->tcp %s " 1933 "cmp $%p mp $%p (mp_chain $%p) pktlen %d (0x%x) " 1934 "l4_len %d (0x%x) " 1935 "MBLKL(mp): %d, MBLKL(datamp): %d ", 1936 niph->ip_sum, 1937 ntcph->th_sum, sum, 1938 nxge_dump_packet((char *)niph, 52), 1939 cmp, nmp, mp_chain, 1940 pktlen, pktlen, 1941 l4_len, 1942 l4_len, 1943 (int)MBLKL(mp), (int)MBLKL(datamp))); 1944 1945 cleanup_allocated_msgs: 1946 if (do_cleanup) { 1947 NXGE_DEBUG_MSG((NULL, TX_CTL, 1948 "==> nxge_do_softlso: " 1949 "Failed allocating messages, " 1950 "have to clean up and fail!")); 1951 while (mp_chain != NULL) { 1952 nmp = mp_chain; 1953 mp_chain = mp_chain->b_next; 1954 freemsg(nmp); 1955 } 1956 } 1957 /* 1958 * We're done here, so just free the original message and return the 1959 * new message chain, that could be NULL if failed, back to the caller. 1960 */ 1961 freemsg(mp); 1962 1963 NXGE_DEBUG_MSG((NULL, TX_CTL, 1964 "<== nxge_do_softlso:mp_chain $%p", mp_chain)); 1965 return (mp_chain); 1966 } 1967 1968 /* 1969 * Will be called before NIC driver do further operation on the message. 1970 * The input message may include LSO information, if so, go to softlso logic 1971 * to eliminate the oversized LSO packet for the incapable underlying h/w. 1972 * The return could be the same non-LSO message or a message chain for LSO case. 1973 * 1974 * The driver needs to call this function per packet and process the whole chain 1975 * if applied. 1976 */ 1977 static mblk_t * 1978 nxge_lso_eliminate(mblk_t *mp) 1979 { 1980 uint32_t lsoflags; 1981 uint32_t mss; 1982 1983 NXGE_DEBUG_MSG((NULL, TX_CTL, 1984 "==>nxge_lso_eliminate:")); 1985 nxge_lso_info_get(mp, &mss, &lsoflags); 1986 1987 if (lsoflags & HW_LSO) { 1988 mblk_t *nmp; 1989 1990 NXGE_DEBUG_MSG((NULL, TX_CTL, 1991 "==>nxge_lso_eliminate:" 1992 "HW_LSO:mss %d mp $%p", 1993 mss, mp)); 1994 if ((nmp = nxge_do_softlso(mp, mss)) != NULL) { 1995 NXGE_DEBUG_MSG((NULL, TX_CTL, 1996 "<== nxge_lso_eliminate: " 1997 "LSO: nmp not NULL nmp $%p mss %d mp $%p", 1998 nmp, mss, mp)); 1999 return (nmp); 2000 } else { 2001 NXGE_DEBUG_MSG((NULL, TX_CTL, 2002 "<== nxge_lso_eliminate_ " 2003 "LSO: failed nmp NULL nmp $%p mss %d mp $%p", 2004 nmp, mss, mp)); 2005 return (NULL); 2006 } 2007 } 2008 2009 NXGE_DEBUG_MSG((NULL, TX_CTL, 2010 "<== nxge_lso_eliminate")); 2011 return (mp); 2012 } 2013 2014 static uint32_t 2015 nxge_csgen(uint16_t *adr, int len) 2016 { 2017 int i, odd; 2018 uint32_t sum = 0; 2019 uint32_t c = 0; 2020 2021 odd = len % 2; 2022 for (i = 0; i < (len / 2); i++) { 2023 sum += (adr[i] & 0xffff); 2024 } 2025 if (odd) { 2026 sum += adr[len / 2] & 0xff00; 2027 } 2028 while ((c = ((sum & 0xffff0000) >> 16)) != 0) { 2029 sum &= 0xffff; 2030 sum += c; 2031 } 2032 return (~sum & 0xffff); 2033 } 2034