1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _NPI_H 27 #define _NPI_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 #include <nxge_common_impl.h> 36 37 typedef uint32_t npi_status_t; 38 39 /* Common Block ID */ 40 41 #define MAC_BLK_ID 0x1 42 #define TXMAC_BLK_ID 0x2 43 #define RXMAC_BLK_ID 0x3 44 #define MIF_BLK_ID 0x4 45 #define IPP_BLK_ID 0x5 46 #define TXC_BLK_ID 0x6 47 #define TXDMA_BLK_ID 0x7 48 #define RXDMA_BLK_ID 0x8 49 #define ZCP_BLK_ID 0x9 50 #define ESPC_BLK_ID 0xa 51 #define FFLP_BLK_ID 0xb 52 #define PHY_BLK_ID 0xc 53 #define ETHER_SERDES_BLK_ID 0xd 54 #define PCIE_SERDES_BLK_ID 0xe 55 #define VIR_BLK_ID 0xf 56 57 /* Common HW error code */ 58 /* HW unable to exit from reset state. */ 59 #define RESET_FAILED 0x81 60 61 /* Write operation failed on indirect write. */ 62 #define WRITE_FAILED 0x82 63 /* Read operation failed on indirect read. */ 64 #define READ_FAILED 0x83 65 66 /* Error code boundary */ 67 68 #define COMMON_SW_ERR_START 0x40 69 #define COMMON_SW_ERR_END 0x4f 70 #define BLK_SPEC_SW_ERR_START 0x50 71 #define BLK_SPEC_SW_ERR_END 0x7f 72 #define COMMON_HW_ERR_START 0x80 73 #define COMMON_HW_ERR_END 0x8f 74 #define BLK_SPEC_HW_ERR_START 0x90 75 #define BLK_SPEC_HW_ERR_END 0xbf 76 77 #define IS_PORT 0x00100000 78 #define IS_CHAN 0x00200000 79 80 /* Common SW errors code */ 81 82 #define PORT_INVALID 0x41 /* Invalid port number */ 83 #define CHANNEL_INVALID 0x42 /* Invalid dma channel number */ 84 #define OPCODE_INVALID 0x43 /* Invalid opcode */ 85 #define REGISTER_INVALID 0x44 /* Invalid register number */ 86 #define COUNTER_INVALID 0x45 /* Invalid counter number */ 87 #define CONFIG_INVALID 0x46 /* Invalid config input */ 88 #define LOGICAL_PAGE_INVALID 0x47 /* Invalid logical page # */ 89 #define VLAN_INVALID 0x48 /* Invalid Vlan ID */ 90 #define RDC_TAB_INVALID 0x49 /* Invalid RDC Group Number */ 91 #define LOCATION_INVALID 0x4a /* Invalid Entry Location */ 92 93 #define NPI_SUCCESS 0 /* Operation succeed */ 94 #define NPI_FAILURE 0x80000000 /* Operation failed */ 95 96 #define NPI_CNT_CLR_VAL 0 97 98 /* 99 * Block identifier starts at bit 8. 100 */ 101 #define NPI_BLOCK_ID_SHIFT 8 102 103 /* 104 * Port, channel and misc. information starts at bit 12. 105 */ 106 #define NPI_PORT_CHAN_SHIFT 12 107 108 /* 109 * Software Block specific error codes start at 0x50. 110 */ 111 #define NPI_BK_ERROR_START 0x50 112 113 /* 114 * Hardware block specific error codes start at 0x90. 115 */ 116 #define NPI_BK_HW_ER_START 0x90 117 118 /* Structures for register tracing */ 119 120 typedef struct _rt_buf { 121 uint32_t ctl_addr; 122 uint32_t val_l32; 123 uint32_t val_h32; 124 } rt_buf_t; 125 126 /* 127 * Control Address field format 128 * 129 * Bit 0 - 23: Address 130 * Bit 24 - 25: Function Number 131 * Bit 26 - 29: Instance Number 132 * Bit 30: Read/Write Direction bit 133 * Bit 31: Invalid bit 134 */ 135 136 #define MAX_RTRACE_ENTRIES 1024 137 #define MAX_RTRACE_IOC_ENTRIES 64 138 #define TRACE_ADDR_MASK 0x00FFFFFF 139 #define TRACE_FUNC_MASK 0x03000000 140 #define TRACE_INST_MASK 0x3C000000 141 #define TRACE_CTL_WR 0x40000000 142 #define TRACE_CTL_INVALID 0x80000000 143 #define TRACE_FUNC_SHIFT 24 144 #define TRACE_INST_SHIFT 26 145 #define MSG_BUF_SIZE 1024 146 147 148 typedef struct _rtrace { 149 uint16_t next_idx; 150 uint16_t last_idx; 151 boolean_t wrapped; 152 rt_buf_t buf[MAX_RTRACE_ENTRIES]; 153 } rtrace_t; 154 155 typedef struct _err_inject { 156 uint8_t blk_id; 157 uint8_t chan; 158 uint32_t err_id; 159 uint32_t control; 160 } err_inject_t; 161 162 /* Configuration options */ 163 typedef enum config_op { 164 DISABLE = 0, 165 ENABLE, 166 INIT 167 } config_op_t; 168 169 /* I/O options */ 170 typedef enum io_op { 171 OP_SET = 0, 172 OP_GET, 173 OP_UPDATE, 174 OP_CLEAR 175 } io_op_t; 176 177 /* Counter options */ 178 typedef enum counter_op { 179 SNAP_STICKY = 0, 180 SNAP_ACCUMULATE, 181 CLEAR 182 } counter_op_t; 183 184 /* NPI attribute */ 185 typedef struct _npi_attr_t { 186 uint32_t type; 187 uint32_t idata[16]; 188 uint32_t odata[16]; 189 } npi_attr_t; 190 191 /* NPI Handle */ 192 typedef struct _npi_handle_function { 193 uint16_t instance; 194 uint16_t function; 195 } npi_handle_function_t; 196 197 /* NPI Handle */ 198 typedef struct _npi_handle { 199 npi_reg_handle_t regh; 200 npi_reg_ptr_t regp; 201 boolean_t is_vraddr; /* virtualization region address */ 202 npi_handle_function_t function; 203 void * nxgep; 204 } npi_handle_t; 205 206 /* NPI Counter */ 207 typedef struct _npi_counter_t { 208 uint32_t id; 209 char *name; 210 uint32_t val; 211 } npi_counter_t; 212 213 /* 214 * Commmon definitions for NPI RXDMA and TXDMA functions. 215 */ 216 typedef struct _dma_log_page { 217 uint8_t page_num; 218 boolean_t valid; 219 uint8_t func_num; 220 uint64_t mask; 221 uint64_t value; 222 uint64_t reloc; 223 } dma_log_page_t, *p_dma_log_page_t; 224 225 extern rtrace_t npi_rtracebuf; 226 void npi_rtrace_buf_init(rtrace_t *); 227 void npi_rtrace_update(npi_handle_t, boolean_t, rtrace_t *, 228 uint32_t, uint64_t); 229 void npi_rtrace_buf_init(rtrace_t *); 230 231 void npi_debug_msg(npi_handle_function_t, uint64_t, 232 char *, ...); 233 234 #ifdef NPI_DEBUG 235 #define NPI_DEBUG_MSG(params) npi_debug_msg params 236 #else 237 #define NPI_DEBUG_MSG(params) 238 #endif 239 240 #define NPI_ERROR_MSG(params) npi_debug_msg params 241 #define NPI_REG_DUMP_MSG(params) npi_debug_msg params 242 243 #ifdef __cplusplus 244 } 245 #endif 246 247 #endif /* _NPI_H */ 248