1*bdb9230aSGarrett D'Amore /* 2*bdb9230aSGarrett D'Amore * CDDL HEADER START 3*bdb9230aSGarrett D'Amore * 4*bdb9230aSGarrett D'Amore * The contents of this file are subject to the terms of the 5*bdb9230aSGarrett D'Amore * Common Development and Distribution License (the "License"). 6*bdb9230aSGarrett D'Amore * You may not use this file except in compliance with the License. 7*bdb9230aSGarrett D'Amore * 8*bdb9230aSGarrett D'Amore * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*bdb9230aSGarrett D'Amore * or http://www.opensolaris.org/os/licensing. 10*bdb9230aSGarrett D'Amore * See the License for the specific language governing permissions 11*bdb9230aSGarrett D'Amore * and limitations under the License. 12*bdb9230aSGarrett D'Amore * 13*bdb9230aSGarrett D'Amore * When distributing Covered Code, include this CDDL HEADER in each 14*bdb9230aSGarrett D'Amore * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*bdb9230aSGarrett D'Amore * If applicable, add the following below this CDDL HEADER, with the 16*bdb9230aSGarrett D'Amore * fields enclosed by brackets "[]" replaced with your own identifying 17*bdb9230aSGarrett D'Amore * information: Portions Copyright [yyyy] [name of copyright owner] 18*bdb9230aSGarrett D'Amore * 19*bdb9230aSGarrett D'Amore * CDDL HEADER END 20*bdb9230aSGarrett D'Amore */ 21*bdb9230aSGarrett D'Amore /* 22*bdb9230aSGarrett D'Amore * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23*bdb9230aSGarrett D'Amore * Use is subject to license terms. 24*bdb9230aSGarrett D'Amore */ 25*bdb9230aSGarrett D'Amore 26*bdb9230aSGarrett D'Amore /* 27*bdb9230aSGarrett D'Amore * MII overrides for Intel PHYs. 28*bdb9230aSGarrett D'Amore */ 29*bdb9230aSGarrett D'Amore 30*bdb9230aSGarrett D'Amore #include <sys/types.h> 31*bdb9230aSGarrett D'Amore #include <sys/ddi.h> 32*bdb9230aSGarrett D'Amore #include <sys/sunddi.h> 33*bdb9230aSGarrett D'Amore #include <sys/cmn_err.h> 34*bdb9230aSGarrett D'Amore #include <sys/note.h> 35*bdb9230aSGarrett D'Amore #include <sys/mii.h> 36*bdb9230aSGarrett D'Amore #include <sys/miiregs.h> 37*bdb9230aSGarrett D'Amore #include "miipriv.h" 38*bdb9230aSGarrett D'Amore 39*bdb9230aSGarrett D'Amore #define MII_82555_SPCL_CONTROL MII_VENDOR(1) 40*bdb9230aSGarrett D'Amore #define I82555_AUTOPOL_DIS (1<<4) 41*bdb9230aSGarrett D'Amore 42*bdb9230aSGarrett D'Amore /* 43*bdb9230aSGarrett D'Amore * The older 82555 code in iprb had a bunch of workarounds to deal 44*bdb9230aSGarrett D'Amore * with chip errata surrounding (I believe) autonegotiation problems 45*bdb9230aSGarrett D'Amore * with the 82555 and long cables. 46*bdb9230aSGarrett D'Amore * 47*bdb9230aSGarrett D'Amore * I can't find any evidence in current Linux, NetBSD, or FreeBSD 48*bdb9230aSGarrett D'Amore * sources for the same kinds of workarounds for this PHY, so I'm 49*bdb9230aSGarrett D'Amore * going to operate on the belief that these workarounds are simply 50*bdb9230aSGarrett D'Amore * not necessary. Without access to the errata for these parts, as 51*bdb9230aSGarrett D'Amore * well as parts that exhibit the problems, I can't be certain that 52*bdb9230aSGarrett D'Amore * such workarounds will work properly. So I'm leaving them out for 53*bdb9230aSGarrett D'Amore * now. I believe that the errata were mostly problems for 10 Mbps 54*bdb9230aSGarrett D'Amore * links which are very hard to find anymore, anyway. 55*bdb9230aSGarrett D'Amore */ 56*bdb9230aSGarrett D'Amore 57*bdb9230aSGarrett D'Amore static int 58*bdb9230aSGarrett D'Amore i82555_start(phy_handle_t *ph) 59*bdb9230aSGarrett D'Amore { 60*bdb9230aSGarrett D'Amore int rv; 61*bdb9230aSGarrett D'Amore 62*bdb9230aSGarrett D'Amore if ((rv = phy_start(ph)) != DDI_SUCCESS) { 63*bdb9230aSGarrett D'Amore return (rv); 64*bdb9230aSGarrett D'Amore } 65*bdb9230aSGarrett D'Amore 66*bdb9230aSGarrett D'Amore /* 67*bdb9230aSGarrett D'Amore * Apparently some devices have problem with 10 Mbps polarity and 68*bdb9230aSGarrett D'Amore * short cable lengths. However, these days everyone should be using 69*bdb9230aSGarrett D'Amore * 100 Mbps, and rather than retain the extra legacy complexity 70*bdb9230aSGarrett D'Amore * here, I'm going to simply offer the choice to disable auto polarity. 71*bdb9230aSGarrett D'Amore * 72*bdb9230aSGarrett D'Amore * If autopolarity doesn't work for you, you have several choices: 73*bdb9230aSGarrett D'Amore * 74*bdb9230aSGarrett D'Amore * 1) Find a longer cable. 75*bdb9230aSGarrett D'Amore * 2) Upgrade to 100Mbps. 76*bdb9230aSGarrett D'Amore * 3) Disable the polarity check by setting AutoPolarity to 0. 77*bdb9230aSGarrett D'Amore * 78*bdb9230aSGarrett D'Amore * We also believe that 10BASE-T autopolarity may be harmful (because 79*bdb9230aSGarrett D'Amore * when used it can prevent use of a superior 100Mbps mode), so we 80*bdb9230aSGarrett D'Amore * disable autopolarity by default. 81*bdb9230aSGarrett D'Amore */ 82*bdb9230aSGarrett D'Amore if (phy_get_prop(ph, "AutoPolarity", 0) == 0) { 83*bdb9230aSGarrett D'Amore /* disable autopolarity */ 84*bdb9230aSGarrett D'Amore PHY_SET(ph, MII_82555_SPCL_CONTROL, I82555_AUTOPOL_DIS); 85*bdb9230aSGarrett D'Amore } else { 86*bdb9230aSGarrett D'Amore /* enable basic autopolarity */ 87*bdb9230aSGarrett D'Amore PHY_CLR(ph, MII_82555_SPCL_CONTROL, I82555_AUTOPOL_DIS); 88*bdb9230aSGarrett D'Amore } 89*bdb9230aSGarrett D'Amore 90*bdb9230aSGarrett D'Amore return (rv); 91*bdb9230aSGarrett D'Amore } 92*bdb9230aSGarrett D'Amore 93*bdb9230aSGarrett D'Amore boolean_t 94*bdb9230aSGarrett D'Amore phy_intel_probe(phy_handle_t *ph) 95*bdb9230aSGarrett D'Amore { 96*bdb9230aSGarrett D'Amore const char *model; 97*bdb9230aSGarrett D'Amore 98*bdb9230aSGarrett D'Amore if (MII_PHY_MFG(ph->phy_id) != MII_OUI_INTEL) { 99*bdb9230aSGarrett D'Amore return (B_FALSE); 100*bdb9230aSGarrett D'Amore } 101*bdb9230aSGarrett D'Amore 102*bdb9230aSGarrett D'Amore switch (MII_PHY_MODEL(ph->phy_id)) { 103*bdb9230aSGarrett D'Amore case MII_MODEL_INTEL_82553_CSTEP: 104*bdb9230aSGarrett D'Amore model = "82553 C-step"; 105*bdb9230aSGarrett D'Amore break; 106*bdb9230aSGarrett D'Amore case MII_MODEL_INTEL_82555: 107*bdb9230aSGarrett D'Amore ph->phy_start = i82555_start; 108*bdb9230aSGarrett D'Amore model = "82555"; 109*bdb9230aSGarrett D'Amore break; 110*bdb9230aSGarrett D'Amore case MII_MODEL_INTEL_82562_EH: 111*bdb9230aSGarrett D'Amore model = "Intel 82562 EH"; 112*bdb9230aSGarrett D'Amore break; 113*bdb9230aSGarrett D'Amore case MII_MODEL_INTEL_82562_ET: 114*bdb9230aSGarrett D'Amore model = "Intel 82562 ET"; 115*bdb9230aSGarrett D'Amore break; 116*bdb9230aSGarrett D'Amore case MII_MODEL_INTEL_82562_EM: 117*bdb9230aSGarrett D'Amore model = "Intel 82562 EM"; 118*bdb9230aSGarrett D'Amore break; 119*bdb9230aSGarrett D'Amore default: 120*bdb9230aSGarrett D'Amore return (B_FALSE); 121*bdb9230aSGarrett D'Amore } 122*bdb9230aSGarrett D'Amore 123*bdb9230aSGarrett D'Amore ph->phy_vendor = "Intel"; 124*bdb9230aSGarrett D'Amore ph->phy_model = model; 125*bdb9230aSGarrett D'Amore 126*bdb9230aSGarrett D'Amore return (B_TRUE); 127*bdb9230aSGarrett D'Amore } 128