1 /* 2 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* 7 * Copyright (c) 2007, Intel Corporation 8 * All rights reserved. 9 */ 10 11 /* 12 * For the avoidance of doubt, except that if any license choice other 13 * than GPL or LGPL is available it will apply instead, Sun elects to 14 * use only the General Public License version 2 (GPLv2) at this time 15 * for any software where a choice of GPL license versions is made 16 * available with the language indicating that GPLv2 or any later 17 * version may be used, or where a choice of which version of the GPL 18 * is applied is otherwise unspecified. 19 */ 20 21 /* 22 * This file is provided under a dual BSD/GPLv2 license. When using or 23 * redistributing this file, you may do so under either license. 24 * 25 * GPL LICENSE SUMMARY 26 * 27 * Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved. 28 * 29 * This program is free software; you can redistribute it and/or modify 30 * it under the terms of version 2 of the GNU Geeral Public License as 31 * published by the Free Software Foundation. 32 * 33 * This program is distributed in the hope that it will be useful, but 34 * WITHOUT ANY WARRANTY; without even the implied warranty of 35 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 36 * General Public License for more details. 37 * 38 * You should have received a copy of the GNU General Public License 39 * along with this program; if not, write to the Free Software 40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 41 * USA 42 * 43 * The full GNU General Public License is included in this distribution 44 * in the file called LICENSE.GPL. 45 * 46 * Contact Information: 47 * James P. Ketrenos <ipw2100-admin@linux.intel.com> 48 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 49 * 50 * BSD LICENSE 51 * 52 * Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved. 53 * All rights reserved. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 59 * * Redistributions of source code must retain the above copyright 60 * notice, this list of conditions and the following disclaimer. 61 * * Redistributions in binary form must reproduce the above copyright 62 * notice, this list of conditions and the following disclaimer in 63 * the documentation and/or other materials provided with the 64 * distribution. 65 * * Neither the name Intel Corporation nor the names of its 66 * contributors may be used to endorse or promote products derived 67 * from this software without specific prior written permission. 68 * 69 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 70 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 71 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 72 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 73 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 74 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 75 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 76 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 77 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 78 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 79 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 80 */ 81 82 #ifndef _IWK_EEPROM_H_ 83 #define _IWK_EEPROM_H_ 84 85 #pragma ident "%Z%%M% %I% %E% SMI" 86 87 /* 88 * This file defines EEPROM related constants, enums, and inline functions. 89 */ 90 91 /* 92 * EEPROM field values 93 */ 94 #define ANTENNA_SWITCH_NORMAL 0 95 #define ANTENNA_SWITCH_INVERSE 1 96 97 enum { 98 EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */ 99 EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */ 100 /* Bit 2 Reserved */ 101 EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */ 102 EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */ 103 EEPROM_CHANNEL_WIDE = (1 << 5), 104 EEPROM_CHANNEL_NARROW = (1 << 6), 105 EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */ 106 }; 107 108 /* 109 * EEPROM field lengths 110 */ 111 #define EEPROM_BOARD_PBA_NUMBER_LENGTH 11 112 113 /* 114 * EEPROM field lengths 115 */ 116 #define EEPROM_BOARD_PBA_NUMBER_LENGTH 11 117 #define EEPROM_REGULATORY_SKU_ID_LENGTH 4 118 #define EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH 14 119 #define EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH 13 120 #define EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH 12 121 #define EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH 11 122 #define EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH 6 123 124 125 #define EEPROM_REGULATORY_NUMBER_OF_BANDS 5 126 127 /* 128 * SKU Capabilities 129 */ 130 #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0) 131 #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1) 132 #define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7) 133 134 /* 135 * *regulatory* channel data from eeprom, one for each channel 136 */ 137 struct iwl_eeprom_channel { 138 uint8_t flags; /* flags copied from EEPROM */ 139 int8_t max_power_avg; /* max power (dBm) on this chnl, limit 31 */ 140 }; 141 142 /* 143 * Mapping of a Tx power level, at factory calibration temperature, 144 * to a radio/DSP gain table index. 145 * One for each of 5 "sample" power levels in each band. 146 * v_det is measured at the factory, using the 3945's built-in power amplifier 147 * (PA) output voltage detector. This same detector is used during Tx of 148 * long packets in normal operation to provide feedback as to proper output 149 * level. 150 * Data copied from EEPROM. 151 */ 152 struct iwl_eeprom_txpower_sample { 153 uint8_t gain_index; /* index into power (gain) setup table ... */ 154 int8_t power; /* ... for this pwr level for this chnl group */ 155 uint16_t v_det; /* PA output voltage */ 156 }; 157 158 /* 159 * Mappings of Tx power levels -> nominal radio/DSP gain table indexes. 160 * One for each channel group (a.k.a. "band") (1 for BG, 4 for A). 161 * Tx power setup code interpolates between the 5 "sample" power levels 162 * to determine the nominal setup for a requested power level. 163 * Data copied from EEPROM. 164 * DO NOT ALTER THIS STRUCTURE!!! 165 */ 166 struct iwl_eeprom_txpower_group { 167 /* 5 power levels */ 168 struct iwl_eeprom_txpower_sample samples[5]; 169 /* coefficients for voltage->power formula (signed) */ 170 uint32_t a, b, c, d, e; 171 /* these modify coeffs based on frequency (signed) */ 172 uint32_t Fa, Fb, Fc, Fd, Fe; 173 /* highest power possible by h/w in this * band */ 174 int8_t saturation_power; 175 /* "representative" channel # in this band */ 176 uint8_t group_channel; 177 /* h/w temperature at factory calib this band (signed) */ 178 uint16_t temperature; 179 }; 180 181 /* 182 * Temperature-based Tx-power compensation data, not band-specific. 183 * These coefficients are use to modify a/b/c/d/e coeffs based on 184 * difference between current temperature and factory calib temperature. 185 * Data copied from EEPROM. 186 */ 187 struct iwl_eeprom_temperature_corr { 188 uint32_t Ta; 189 uint32_t Tb; 190 uint32_t Tc; 191 uint32_t Td; 192 uint32_t Te; 193 }; 194 195 #define EEP_TX_POWER_TX_CHAINS (2) 196 #define EEP_TX_POWER_BANDS (8) 197 #define EEP_TX_POWER_MEASURE (3) 198 #define EEP_TX_POWER_VERSION (2) 199 #define EEP_TX_POWER_VERSION_NEW (5) 200 201 struct iwk_eep_calib_measure { 202 uint8_t temperature; 203 uint8_t gain_idx; 204 uint8_t actual_pow; 205 int8_t pa_det; 206 }; 207 208 struct iwk_eep_calib_channel_info { 209 uint8_t ch_num; 210 struct iwk_eep_calib_measure 211 measure[EEP_TX_POWER_TX_CHAINS][EEP_TX_POWER_MEASURE]; 212 }; 213 214 struct iwk_eep_calib_subband_info { 215 uint8_t ch_from; 216 uint8_t ch_to; 217 struct iwk_eep_calib_channel_info ch1; 218 struct iwk_eep_calib_channel_info ch2; 219 }; 220 221 struct iwk_eep_calib_info { 222 uint8_t saturation_power24; 223 uint8_t saturation_power52; 224 uint16_t voltage; 225 struct iwk_eep_calib_subband_info band_info_tbl[EEP_TX_POWER_BANDS]; 226 }; 227 228 struct iwk_eep_channel { 229 uint8_t flags; 230 int8_t max_power_avg; /* each channel's maximum power, 31 as limit */ 231 }; 232 233 /* 234 * eeprom map 235 */ 236 struct iwk_eep { 237 uint8_t reser0[16]; 238 uint16_t device_id; 239 uint8_t reser1[2]; 240 uint16_t pmc; 241 uint8_t reser2[20]; 242 uint8_t mac_address[6]; 243 uint8_t reser3[58]; 244 uint16_t board_revision; 245 uint8_t reser4[11]; 246 uint8_t board_pba_number[9]; 247 uint8_t reser5[8]; 248 uint16_t version; 249 uint8_t sku_cap; 250 uint8_t leds_mode; 251 uint16_t oem_mode; 252 uint16_t wowlan_mode; 253 uint16_t leds_times_interval; 254 uint8_t leds_off_time; 255 uint8_t leds_on_time; 256 uint8_t almgor_m_version; 257 uint8_t antenna_switch_type; 258 uint8_t reser6[8]; 259 uint16_t board_revision_4965; 260 uint8_t reser7[13]; 261 uint8_t board_pba_number_4965[9]; 262 uint8_t reser8[10]; 263 uint8_t sku_id[4]; 264 uint16_t band_1_count; 265 struct iwk_eep_channel band_1_channels[14]; 266 uint16_t band_2_count; 267 struct iwk_eep_channel band_2_channels[13]; 268 uint16_t band_3_count; 269 struct iwk_eep_channel band_3_channels[12]; 270 uint16_t band_4_count; 271 struct iwk_eep_channel band_4_channels[11]; 272 uint16_t band_5_count; 273 struct iwk_eep_channel band_5_channels[6]; 274 uint8_t reser10[2]; 275 struct iwk_eep_channel band_24_channels[7]; 276 uint8_t reser11[2]; 277 struct iwk_eep_channel band_52_channels[11]; 278 uint8_t reser12[6]; 279 uint16_t calib_version; 280 uint8_t reser13[2]; 281 uint16_t satruation_power; 282 uint8_t reser14[94]; 283 struct iwk_eep_calib_info calib_info; 284 uint8_t reser15[140]; 285 }; 286 287 #define CSR_EEPROM_REG (CSR_BASE+0x02c) 288 #define CSR_EEPROM_GP (CSR_BASE+0x030) 289 #define CSR_EEPROM_GP_VALID_MSK 0x00000007 290 #define CSR_EEPROM_GP_BAD_SIGNATURE 0x00000000 291 292 293 294 #endif /* _IWK_EEPROM_H_ */ 295