1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #include <hxge_impl.h> 27 #include <inet/mi.h> 28 #include <sys/cmn_err.h> 29 30 #define RDC_NAME_FORMAT1 "RDC_" 31 #define TDC_NAME_FORMAT1 "TDC_" 32 #define CH_NAME_FORMAT "%d" 33 34 void 35 hxge_init_statsp(p_hxge_t hxgep) 36 { 37 size_t stats_size; 38 39 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_init_statsp")); 40 41 stats_size = sizeof (hxge_stats_t); 42 hxgep->statsp = KMEM_ZALLOC(stats_size, KM_SLEEP); 43 hxgep->statsp->stats_size = stats_size; 44 45 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_init_statsp")); 46 } 47 48 typedef struct { 49 uint8_t index; 50 uint8_t type; 51 char *name; 52 } hxge_kstat_index_t; 53 54 typedef enum { 55 RDC_STAT_PACKETS = 0, 56 RDC_STAT_BYTES, 57 RDC_STAT_ERRORS, 58 RDC_STAT_JUMBO_PKTS, 59 RDC_STAT_RCR_UNKNOWN_ERR, 60 RDC_STAT_RCR_SHA_PAR_ERR, 61 RDC_STAT_RBR_PRE_PAR_ERR, 62 RDC_STAT_RBR_PRE_EMTY, 63 RDC_STAT_RCR_SHADOW_FULL, 64 RDC_STAT_RBR_TMOUT, 65 RDC_STAT_PEU_RESP_ERR, 66 RDC_STAT_CTRL_FIFO_ECC_ERR, 67 RDC_STAT_DATA_FIFO_ECC_ERR, 68 RDC_STAT_RCRFULL, 69 RDC_STAT_RBR_EMPTY, 70 RDC_STAT_RBR_FULL, 71 RDC_STAT_RCR_INVALIDS, 72 RDC_STAT_RCRTO, 73 RDC_STAT_RCRTHRES, 74 RDC_STAT_END 75 } hxge_rdc_stat_index_t; 76 77 hxge_kstat_index_t hxge_rdc_stats[] = { 78 {RDC_STAT_PACKETS, KSTAT_DATA_UINT64, "rdc_packets"}, 79 {RDC_STAT_BYTES, KSTAT_DATA_UINT64, "rdc_bytes"}, 80 {RDC_STAT_ERRORS, KSTAT_DATA_ULONG, "rdc_errors"}, 81 {RDC_STAT_JUMBO_PKTS, KSTAT_DATA_ULONG, "rdc_jumbo_pkts"}, 82 {RDC_STAT_RCR_UNKNOWN_ERR, KSTAT_DATA_ULONG, "rdc_rcr_unknown_err"}, 83 {RDC_STAT_RCR_SHA_PAR_ERR, KSTAT_DATA_ULONG, "rdc_rcr_sha_par_err"}, 84 {RDC_STAT_RBR_PRE_PAR_ERR, KSTAT_DATA_ULONG, "rdc_rbr_pre_par_err"}, 85 {RDC_STAT_RBR_PRE_EMTY, KSTAT_DATA_ULONG, "rdc_rbr_pre_empty"}, 86 {RDC_STAT_RCR_SHADOW_FULL, KSTAT_DATA_ULONG, "rdc_rcr_shadow_full"}, 87 {RDC_STAT_RBR_TMOUT, KSTAT_DATA_ULONG, "rdc_rbr_tmout"}, 88 {RDC_STAT_PEU_RESP_ERR, KSTAT_DATA_ULONG, "peu_resp_err"}, 89 {RDC_STAT_CTRL_FIFO_ECC_ERR, KSTAT_DATA_ULONG, "ctrl_fifo_ecc_err"}, 90 {RDC_STAT_DATA_FIFO_ECC_ERR, KSTAT_DATA_ULONG, "data_fifo_ecc_err"}, 91 {RDC_STAT_RCRFULL, KSTAT_DATA_ULONG, "rdc_rcrfull"}, 92 {RDC_STAT_RBR_EMPTY, KSTAT_DATA_ULONG, "rdc_rbr_empty"}, 93 {RDC_STAT_RBR_FULL, KSTAT_DATA_ULONG, "rdc_rbrfull"}, 94 {RDC_STAT_RCR_INVALIDS, KSTAT_DATA_ULONG, "rdc_rcr_invalids"}, 95 {RDC_STAT_RCRTO, KSTAT_DATA_ULONG, "rdc_rcrto"}, 96 {RDC_STAT_RCRTHRES, KSTAT_DATA_ULONG, "rdc_rcrthres"}, 97 {RDC_STAT_END, NULL, NULL} 98 }; 99 100 typedef enum { 101 RDC_SYS_STAT_CTRL_FIFO_SEC = 0, 102 RDC_SYS_STAT_CTRL_FIFO_DED, 103 RDC_SYS_STAT_DATA_FIFO_SEC, 104 RDC_SYS_STAT_DATA_FIFO_DED, 105 RDC_SYS_STAT_END 106 } hxge_rdc_sys_stat_idx_t; 107 108 hxge_kstat_index_t hxge_rdc_sys_stats[] = { 109 {RDC_SYS_STAT_CTRL_FIFO_SEC, KSTAT_DATA_UINT64, "rdc_ctrl_fifo_sec"}, 110 {RDC_SYS_STAT_CTRL_FIFO_DED, KSTAT_DATA_UINT64, "rdc_ctrl_fifo_ded"}, 111 {RDC_SYS_STAT_DATA_FIFO_SEC, KSTAT_DATA_UINT64, "rdc_data_fifo_sec"}, 112 {RDC_SYS_STAT_DATA_FIFO_DED, KSTAT_DATA_UINT64, "tdc_data_fifo_ded"}, 113 {RDC_SYS_STAT_END, NULL, NULL} 114 }; 115 116 typedef enum { 117 TDC_STAT_PACKETS = 0, 118 TDC_STAT_BYTES, 119 TDC_STAT_BYTES_WITH_PAD, 120 TDC_STAT_ERRORS, 121 TDC_STAT_TX_INITS, 122 TDC_STAT_TX_NO_BUF, 123 TDC_STAT_PEU_RESP_ERR, 124 TDC_STAT_PKT_SIZE_ERR, 125 TDC_STAT_TX_RNG_OFLOW, 126 TDC_STAT_PKT_SIZE_HDR_ERR, 127 TDC_STAT_RUNT_PKT_DROP_ERR, 128 TDC_STAT_PREF_PAR_ERR, 129 TDC_STAT_TDR_PREF_CPL_TO, 130 TDC_STAT_PKT_CPL_TO, 131 TDC_STAT_INVALID_SOP, 132 TDC_STAT_UNEXPECTED_SOP, 133 TDC_STAT_COUNT_HDR_SIZE_ERR, 134 TDC_STAT_COUNT_RUNT, 135 TDC_STAT_COUNT_ABORT, 136 TDC_STAT_TX_STARTS, 137 TDC_STAT_TX_NO_DESC, 138 TDC_STAT_TX_DMA_BIND_FAIL, 139 TDC_STAT_TX_HDR_PKTS, 140 TDC_STAT_TX_DDI_PKTS, 141 TDC_STAT_TX_JUMBO_PKTS, 142 TDC_STAT_TX_MAX_PEND, 143 TDC_STAT_TX_MARKS, 144 TDC_STAT_END 145 } hxge_tdc_stats_index_t; 146 147 hxge_kstat_index_t hxge_tdc_stats[] = { 148 {TDC_STAT_PACKETS, KSTAT_DATA_UINT64, "tdc_packets"}, 149 {TDC_STAT_BYTES, KSTAT_DATA_UINT64, "tdc_bytes"}, 150 {TDC_STAT_BYTES_WITH_PAD, KSTAT_DATA_UINT64, "tdc_bytes_with_pad"}, 151 {TDC_STAT_ERRORS, KSTAT_DATA_UINT64, "tdc_errors"}, 152 {TDC_STAT_TX_INITS, KSTAT_DATA_ULONG, "tdc_tx_inits"}, 153 {TDC_STAT_TX_NO_BUF, KSTAT_DATA_ULONG, "tdc_tx_no_buf"}, 154 155 {TDC_STAT_PEU_RESP_ERR, KSTAT_DATA_ULONG, "tdc_peu_resp_err"}, 156 {TDC_STAT_PKT_SIZE_ERR, KSTAT_DATA_ULONG, "tdc_pkt_size_err"}, 157 {TDC_STAT_TX_RNG_OFLOW, KSTAT_DATA_ULONG, "tdc_tx_rng_oflow"}, 158 {TDC_STAT_PKT_SIZE_HDR_ERR, KSTAT_DATA_ULONG, "tdc_pkt_size_hdr_err"}, 159 {TDC_STAT_RUNT_PKT_DROP_ERR, KSTAT_DATA_ULONG, "tdc_runt_pkt_drop_err"}, 160 {TDC_STAT_PREF_PAR_ERR, KSTAT_DATA_ULONG, "tdc_pref_par_err"}, 161 {TDC_STAT_TDR_PREF_CPL_TO, KSTAT_DATA_ULONG, "tdc_tdr_pref_cpl_to"}, 162 {TDC_STAT_PKT_CPL_TO, KSTAT_DATA_ULONG, "tdc_pkt_cpl_to"}, 163 {TDC_STAT_INVALID_SOP, KSTAT_DATA_ULONG, "tdc_invalid_sop"}, 164 {TDC_STAT_UNEXPECTED_SOP, KSTAT_DATA_ULONG, "tdc_unexpected_sop"}, 165 166 {TDC_STAT_COUNT_HDR_SIZE_ERR, KSTAT_DATA_ULONG, 167 "tdc_count_hdr_size_err"}, 168 {TDC_STAT_COUNT_RUNT, KSTAT_DATA_ULONG, "tdc_count_runt"}, 169 {TDC_STAT_COUNT_ABORT, KSTAT_DATA_ULONG, "tdc_count_abort"}, 170 171 {TDC_STAT_TX_STARTS, KSTAT_DATA_ULONG, "tdc_tx_starts"}, 172 {TDC_STAT_TX_NO_DESC, KSTAT_DATA_ULONG, "tdc_tx_no_desc"}, 173 {TDC_STAT_TX_DMA_BIND_FAIL, KSTAT_DATA_ULONG, "tdc_tx_dma_bind_fail"}, 174 {TDC_STAT_TX_HDR_PKTS, KSTAT_DATA_ULONG, "tdc_tx_hdr_pkts"}, 175 {TDC_STAT_TX_DDI_PKTS, KSTAT_DATA_ULONG, "tdc_tx_ddi_pkts"}, 176 {TDC_STAT_TX_JUMBO_PKTS, KSTAT_DATA_ULONG, "tdc_tx_jumbo_pkts"}, 177 {TDC_STAT_TX_MAX_PEND, KSTAT_DATA_ULONG, "tdc_tx_max_pend"}, 178 {TDC_STAT_TX_MARKS, KSTAT_DATA_ULONG, "tdc_tx_marks"}, 179 {TDC_STAT_END, NULL, NULL} 180 }; 181 182 typedef enum { 183 REORD_TBL_PAR_ERR = 0, 184 REORD_BUF_DED_ERR, 185 REORD_BUF_SEC_ERR, 186 TDC_SYS_STAT_END 187 } hxge_tdc_sys_stat_idx_t; 188 189 hxge_kstat_index_t hxge_tdc_sys_stats[] = { 190 {REORD_TBL_PAR_ERR, KSTAT_DATA_UINT64, "reord_tbl_par_err"}, 191 {REORD_BUF_DED_ERR, KSTAT_DATA_UINT64, "reord_buf_ded_err"}, 192 {REORD_BUF_SEC_ERR, KSTAT_DATA_UINT64, "reord_buf_sec_err"}, 193 {TDC_SYS_STAT_END, NULL, NULL} 194 }; 195 196 typedef enum { 197 VMAC_STAT_TX_FRAME_CNT, /* vmac_tx_frame_cnt_t */ 198 VMAC_STAT_TX_BYTE_CNT, /* vmac_tx_byte_cnt_t */ 199 200 VMAC_STAT_RX_FRAME_CNT, /* vmac_rx_frame_cnt_t */ 201 VMAC_STAT_RX_BYTE_CNT, /* vmac_rx_byte_cnt_t */ 202 VMAC_STAT_RX_DROP_FRAME_CNT, /* vmac_rx_drop_fr_cnt_t */ 203 VMAC_STAT_RX_DROP_BYTE_CNT, /* vmac_rx_drop_byte_cnt_t */ 204 VMAC_STAT_RX_CRC_CNT, /* vmac_rx_crc_cnt_t */ 205 VMAC_STAT_RX_PAUSE_CNT, /* vmac_rx_pause_cnt_t */ 206 VMAC_STAT_RX_BCAST_FR_CNT, /* vmac_rx_bcast_fr_cnt_t */ 207 VMAC_STAT_RX_MCAST_FR_CNT, /* vmac_rx_mcast_fr_cnt_t */ 208 VMAC_STAT_END 209 } hxge_vmac_stat_index_t; 210 211 hxge_kstat_index_t hxge_vmac_stats[] = { 212 {VMAC_STAT_TX_FRAME_CNT, KSTAT_DATA_UINT64, "vmac_tx_frame_cnt"}, 213 {VMAC_STAT_TX_BYTE_CNT, KSTAT_DATA_UINT64, "vmac_tx_byte_cnt"}, 214 215 {VMAC_STAT_RX_FRAME_CNT, KSTAT_DATA_UINT64, "vmac_rx_frame_cnt"}, 216 {VMAC_STAT_RX_BYTE_CNT, KSTAT_DATA_UINT64, "vmac_rx_byte_cnt"}, 217 {VMAC_STAT_RX_DROP_FRAME_CNT, KSTAT_DATA_UINT64, 218 "vmac_rx_drop_frame_cnt"}, 219 {VMAC_STAT_RX_DROP_BYTE_CNT, KSTAT_DATA_UINT64, 220 "vmac_rx_drop_byte_cnt"}, 221 {VMAC_STAT_RX_CRC_CNT, KSTAT_DATA_UINT64, "vmac_rx_crc_cnt"}, 222 {VMAC_STAT_RX_PAUSE_CNT, KSTAT_DATA_UINT64, "vmac_rx_pause_cnt"}, 223 {VMAC_STAT_RX_BCAST_FR_CNT, KSTAT_DATA_UINT64, "vmac_rx_bcast_fr_cnt"}, 224 {VMAC_STAT_RX_MCAST_FR_CNT, KSTAT_DATA_UINT64, "vmac_rx_mcast_fr_cnt"}, 225 {VMAC_STAT_END, NULL, NULL} 226 }; 227 228 typedef enum { 229 PFC_STAT_PKT_DROP, 230 PFC_STAT_TCAM_PARITY_ERR, 231 PFC_STAT_VLAN_PARITY_ERR, 232 PFC_STAT_BAD_CS_COUNT, 233 PFC_STAT_DROP_COUNT, 234 PFC_STAT_TCP_CTRL_DROP, 235 PFC_STAT_L2_ADDR_DROP, 236 PFC_STAT_CLASS_CODE_DROP, 237 PFC_STAT_TCAM_DROP, 238 PFC_STAT_VLAN_DROP, 239 PFC_STAT_END 240 } hxge_pfc_stat_index_t; 241 242 hxge_kstat_index_t hxge_pfc_stats[] = { 243 {PFC_STAT_PKT_DROP, KSTAT_DATA_ULONG, "pfc_pkt_drop"}, 244 {PFC_STAT_TCAM_PARITY_ERR, KSTAT_DATA_ULONG, "pfc_tcam_parity_err"}, 245 {PFC_STAT_VLAN_PARITY_ERR, KSTAT_DATA_ULONG, "pfc_vlan_parity_err"}, 246 {PFC_STAT_BAD_CS_COUNT, KSTAT_DATA_ULONG, "pfc_bad_cs_count"}, 247 {PFC_STAT_DROP_COUNT, KSTAT_DATA_ULONG, "pfc_drop_count"}, 248 {PFC_STAT_TCP_CTRL_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_tcp_ctrl"}, 249 {PFC_STAT_L2_ADDR_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_l2_addr"}, 250 {PFC_STAT_CLASS_CODE_DROP, KSTAT_DATA_ULONG, 251 " pfc_pkt_drop_class_code"}, 252 {PFC_STAT_TCAM_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_tcam"}, 253 {PFC_STAT_VLAN_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_vlan"}, 254 {PFC_STAT_END, NULL, NULL} 255 }; 256 257 typedef enum { 258 MMAC_MAX_ADDR, 259 MMAC_AVAIL_ADDR, 260 MMAC_ADDR_POOL1, 261 MMAC_ADDR_POOL2, 262 MMAC_ADDR_POOL3, 263 MMAC_ADDR_POOL4, 264 MMAC_ADDR_POOL5, 265 MMAC_ADDR_POOL6, 266 MMAC_ADDR_POOL7, 267 MMAC_ADDR_POOL8, 268 MMAC_ADDR_POOL9, 269 MMAC_ADDR_POOL10, 270 MMAC_ADDR_POOL11, 271 MMAC_ADDR_POOL12, 272 MMAC_ADDR_POOL13, 273 MMAC_ADDR_POOL14, 274 MMAC_ADDR_POOL15, 275 MMAC_ADDR_POOL16, 276 MMAC_STATS_END 277 } hxge_mmac_stat_index_t; 278 279 hxge_kstat_index_t hxge_mmac_stats[] = { 280 {MMAC_MAX_ADDR, KSTAT_DATA_UINT64, "max_mmac_addr"}, 281 {MMAC_AVAIL_ADDR, KSTAT_DATA_UINT64, "avail_mmac_addr"}, 282 {MMAC_ADDR_POOL1, KSTAT_DATA_UINT64, "mmac_addr_1"}, 283 {MMAC_ADDR_POOL2, KSTAT_DATA_UINT64, "mmac_addr_2"}, 284 {MMAC_ADDR_POOL3, KSTAT_DATA_UINT64, "mmac_addr_3"}, 285 {MMAC_ADDR_POOL4, KSTAT_DATA_UINT64, "mmac_addr_4"}, 286 {MMAC_ADDR_POOL5, KSTAT_DATA_UINT64, "mmac_addr_5"}, 287 {MMAC_ADDR_POOL6, KSTAT_DATA_UINT64, "mmac_addr_6"}, 288 {MMAC_ADDR_POOL7, KSTAT_DATA_UINT64, "mmac_addr_7"}, 289 {MMAC_ADDR_POOL8, KSTAT_DATA_UINT64, "mmac_addr_8"}, 290 {MMAC_ADDR_POOL9, KSTAT_DATA_UINT64, "mmac_addr_9"}, 291 {MMAC_ADDR_POOL10, KSTAT_DATA_UINT64, "mmac_addr_10"}, 292 {MMAC_ADDR_POOL11, KSTAT_DATA_UINT64, "mmac_addr_11"}, 293 {MMAC_ADDR_POOL12, KSTAT_DATA_UINT64, "mmac_addr_12"}, 294 {MMAC_ADDR_POOL13, KSTAT_DATA_UINT64, "mmac_addr_13"}, 295 {MMAC_ADDR_POOL14, KSTAT_DATA_UINT64, "mmac_addr_14"}, 296 {MMAC_ADDR_POOL15, KSTAT_DATA_UINT64, "mmac_addr_15"}, 297 {MMAC_ADDR_POOL16, KSTAT_DATA_UINT64, "mmac_addr_16"}, 298 {MMAC_STATS_END, NULL, NULL}, 299 }; 300 301 typedef enum { 302 SPC_ACC_ERR = 0, 303 TDC_PIOACC_ERR, 304 RDC_PIOACC_ERR, 305 PFC_PIOACC_ERR, 306 VMAC_PIOACC_ERR, 307 CPL_HDRQ_PARERR, 308 CPL_DATAQ_PARERR, 309 RETRYRAM_XDLH_PARERR, 310 RETRYSOTRAM_XDLH_PARERR, 311 P_HDRQ_PARERR, 312 P_DATAQ_PARERR, 313 NP_HDRQ_PARERR, 314 NP_DATAQ_PARERR, 315 EIC_MSIX_PARERR, 316 HCR_PARERR, 317 PEU_SYS_STAT_END 318 } hxge_peu_sys_stat_idx_t; 319 320 hxge_kstat_index_t hxge_peu_sys_stats[] = { 321 {SPC_ACC_ERR, KSTAT_DATA_UINT64, "spc_acc_err"}, 322 {TDC_PIOACC_ERR, KSTAT_DATA_UINT64, "tdc_pioacc_err"}, 323 {RDC_PIOACC_ERR, KSTAT_DATA_UINT64, "rdc_pioacc_err"}, 324 {PFC_PIOACC_ERR, KSTAT_DATA_UINT64, "pfc_pioacc_err"}, 325 {VMAC_PIOACC_ERR, KSTAT_DATA_UINT64, "vmac_pioacc_err"}, 326 {CPL_HDRQ_PARERR, KSTAT_DATA_UINT64, "cpl_hdrq_parerr"}, 327 {CPL_DATAQ_PARERR, KSTAT_DATA_UINT64, "cpl_dataq_parerr"}, 328 {RETRYRAM_XDLH_PARERR, KSTAT_DATA_UINT64, "retryram_xdlh_parerr"}, 329 {RETRYSOTRAM_XDLH_PARERR, KSTAT_DATA_UINT64, "retrysotram_xdlh_parerr"}, 330 {P_HDRQ_PARERR, KSTAT_DATA_UINT64, "p_hdrq_parerr"}, 331 {P_DATAQ_PARERR, KSTAT_DATA_UINT64, "p_dataq_parerr"}, 332 {NP_HDRQ_PARERR, KSTAT_DATA_UINT64, "np_hdrq_parerr"}, 333 {NP_DATAQ_PARERR, KSTAT_DATA_UINT64, "np_dataq_parerr"}, 334 {EIC_MSIX_PARERR, KSTAT_DATA_UINT64, "eic_msix_parerr"}, 335 {HCR_PARERR, KSTAT_DATA_UINT64, "hcr_parerr"}, 336 {TDC_SYS_STAT_END, NULL, NULL} 337 }; 338 339 /* ARGSUSED */ 340 int 341 hxge_tdc_stat_update(kstat_t *ksp, int rw) 342 { 343 p_hxge_t hxgep; 344 p_hxge_tdc_kstat_t tdc_kstatsp; 345 p_hxge_tx_ring_stats_t statsp; 346 int channel; 347 char *ch_name, *end; 348 349 hxgep = (p_hxge_t)ksp->ks_private; 350 if (hxgep == NULL) 351 return (-1); 352 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rxstat_update")); 353 354 ch_name = ksp->ks_name; 355 ch_name += strlen(TDC_NAME_FORMAT1); 356 channel = mi_strtol(ch_name, &end, 10); 357 358 tdc_kstatsp = (p_hxge_tdc_kstat_t)ksp->ks_data; 359 statsp = (p_hxge_tx_ring_stats_t)&hxgep->statsp->tdc_stats[channel]; 360 361 HXGE_DEBUG_MSG((hxgep, KST_CTL, 362 "hxge_tdc_stat_update data $%p statsp $%p channel %d", 363 ksp->ks_data, statsp, channel)); 364 365 tdc_kstatsp->opackets.value.ull = statsp->opackets; 366 tdc_kstatsp->obytes.value.ull = statsp->obytes; 367 tdc_kstatsp->obytes_with_pad.value.ull = statsp->obytes_with_pad; 368 tdc_kstatsp->oerrors.value.ull = statsp->oerrors; 369 tdc_kstatsp->tx_hdr_pkts.value.ull = statsp->tx_hdr_pkts; 370 tdc_kstatsp->tx_ddi_pkts.value.ull = statsp->tx_ddi_pkts; 371 tdc_kstatsp->tx_jumbo_pkts.value.ull = statsp->tx_jumbo_pkts; 372 tdc_kstatsp->tx_max_pend.value.ull = statsp->tx_max_pend; 373 tdc_kstatsp->peu_resp_err.value.ul = statsp->peu_resp_err; 374 tdc_kstatsp->pkt_size_err.value.ul = statsp->pkt_size_err; 375 tdc_kstatsp->tx_rng_oflow.value.ul = statsp->tx_rng_oflow; 376 tdc_kstatsp->pkt_size_hdr_err.value.ul = statsp->pkt_size_hdr_err; 377 tdc_kstatsp->runt_pkt_drop_err.value.ul = statsp->runt_pkt_drop_err; 378 tdc_kstatsp->pref_par_err.value.ul = statsp->pref_par_err; 379 tdc_kstatsp->tdr_pref_cpl_to.value.ul = statsp->tdr_pref_cpl_to; 380 tdc_kstatsp->pkt_cpl_to.value.ul = statsp->pkt_cpl_to; 381 tdc_kstatsp->invalid_sop.value.ul = statsp->invalid_sop; 382 tdc_kstatsp->unexpected_sop.value.ul = statsp->unexpected_sop; 383 tdc_kstatsp->tx_starts.value.ul = statsp->tx_starts; 384 tdc_kstatsp->tx_no_desc.value.ul = statsp->tx_no_desc; 385 tdc_kstatsp->tx_dma_bind_fail.value.ul = statsp->tx_dma_bind_fail; 386 387 tdc_kstatsp->count_hdr_size_err.value.ul = 388 statsp->count_hdr_size_err; 389 tdc_kstatsp->count_runt.value.ul = statsp->count_runt; 390 tdc_kstatsp->count_abort.value.ul = statsp->count_abort; 391 tdc_kstatsp->tx_marks.value.ul = statsp->tx_marks; 392 393 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_tdc_stat_update")); 394 return (0); 395 } 396 397 /* ARGSUSED */ 398 int 399 hxge_tdc_sys_stat_update(kstat_t *ksp, int rw) 400 { 401 p_hxge_t hxgep; 402 p_hxge_tdc_sys_kstat_t tdc_sys_kstatsp; 403 p_hxge_tdc_sys_stats_t statsp; 404 405 hxgep = (p_hxge_t)ksp->ks_private; 406 if (hxgep == NULL) 407 return (-1); 408 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_tdc_sys_stat_update")); 409 410 tdc_sys_kstatsp = (p_hxge_tdc_sys_kstat_t)ksp->ks_data; 411 statsp = (p_hxge_tdc_sys_stats_t)&hxgep->statsp->tdc_sys_stats; 412 413 HXGE_DEBUG_MSG((hxgep, KST_CTL, "hxge_tdc_sys_stat_update %llx", 414 ksp->ks_data)); 415 416 tdc_sys_kstatsp->reord_tbl_par_err.value.ul = 417 statsp->reord_tbl_par_err; 418 tdc_sys_kstatsp->reord_buf_ded_err.value.ul = 419 statsp->reord_buf_ded_err; 420 tdc_sys_kstatsp->reord_buf_sec_err.value.ul = 421 statsp->reord_buf_sec_err; 422 423 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_tdc_sys_stat_update")); 424 return (0); 425 } 426 427 /* ARGSUSED */ 428 int 429 hxge_rdc_stat_update(kstat_t *ksp, int rw) 430 { 431 p_hxge_t hxgep; 432 p_hxge_rdc_kstat_t rdc_kstatsp; 433 p_hxge_rx_ring_stats_t statsp; 434 int channel; 435 char *ch_name, *end; 436 437 hxgep = (p_hxge_t)ksp->ks_private; 438 if (hxgep == NULL) 439 return (-1); 440 441 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rdc_stat_update")); 442 443 ch_name = ksp->ks_name; 444 ch_name += strlen(RDC_NAME_FORMAT1); 445 channel = mi_strtol(ch_name, &end, 10); 446 447 rdc_kstatsp = (p_hxge_rdc_kstat_t)ksp->ks_data; 448 statsp = (p_hxge_rx_ring_stats_t)&hxgep->statsp->rdc_stats[channel]; 449 450 HXGE_DEBUG_MSG((hxgep, KST_CTL, 451 "hxge_rdc_stat_update $%p statsp $%p channel %d", 452 ksp->ks_data, statsp, channel)); 453 454 rdc_kstatsp->ipackets.value.ull = statsp->ipackets; 455 rdc_kstatsp->rbytes.value.ull = statsp->ibytes; 456 rdc_kstatsp->jumbo_pkts.value.ul = statsp->jumbo_pkts; 457 rdc_kstatsp->rcr_unknown_err.value.ul = statsp->rcr_unknown_err; 458 rdc_kstatsp->errors.value.ul = statsp->ierrors; 459 rdc_kstatsp->rcr_sha_par_err.value.ul = statsp->rcr_sha_par; 460 rdc_kstatsp->rbr_pre_par_err.value.ul = statsp->rbr_pre_par; 461 rdc_kstatsp->rbr_pre_emty.value.ul = statsp->rbr_pre_empty; 462 rdc_kstatsp->rcr_shadow_full.value.ul = statsp->rcr_shadow_full; 463 rdc_kstatsp->rbr_tmout.value.ul = statsp->rbr_tmout; 464 rdc_kstatsp->peu_resp_err.value.ul = statsp->peu_resp_err; 465 rdc_kstatsp->ctrl_fifo_ecc_err.value.ul = statsp->ctrl_fifo_ecc_err; 466 rdc_kstatsp->data_fifo_ecc_err.value.ul = statsp->data_fifo_ecc_err; 467 rdc_kstatsp->rcrfull.value.ul = statsp->rcrfull; 468 rdc_kstatsp->rbr_empty.value.ul = statsp->rbr_empty; 469 rdc_kstatsp->rbrfull.value.ul = statsp->rbrfull; 470 rdc_kstatsp->rcr_invalids.value.ul = statsp->rcr_invalids; 471 rdc_kstatsp->rcr_to.value.ul = statsp->rcr_to; 472 rdc_kstatsp->rcr_thresh.value.ul = statsp->rcr_thres; 473 474 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_rdc_stat_update")); 475 return (0); 476 } 477 478 /* ARGSUSED */ 479 int 480 hxge_rdc_sys_stat_update(kstat_t *ksp, int rw) 481 { 482 p_hxge_t hxgep; 483 p_hxge_rdc_sys_kstat_t rdc_sys_kstatsp; 484 p_hxge_rdc_sys_stats_t statsp; 485 486 hxgep = (p_hxge_t)ksp->ks_private; 487 if (hxgep == NULL) 488 return (-1); 489 490 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rdc_sys_stat_update")); 491 492 rdc_sys_kstatsp = (p_hxge_rdc_sys_kstat_t)ksp->ks_data; 493 statsp = (p_hxge_rdc_sys_stats_t)&hxgep->statsp->rdc_sys_stats; 494 495 HXGE_DEBUG_MSG((hxgep, KST_CTL, "hxge_rdc_sys_stat_update %llx", 496 ksp->ks_data)); 497 498 rdc_sys_kstatsp->ctrl_fifo_sec.value.ul = statsp->ctrl_fifo_sec; 499 rdc_sys_kstatsp->ctrl_fifo_ded.value.ul = statsp->ctrl_fifo_ded; 500 rdc_sys_kstatsp->data_fifo_sec.value.ul = statsp->data_fifo_sec; 501 rdc_sys_kstatsp->data_fifo_ded.value.ul = statsp->data_fifo_ded; 502 503 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_rdc_sys_stat_update")); 504 return (0); 505 } 506 507 /* ARGSUSED */ 508 int 509 hxge_vmac_stat_update(kstat_t *ksp, int rw) 510 { 511 p_hxge_t hxgep; 512 p_hxge_vmac_kstat_t vmac_kstatsp; 513 p_hxge_vmac_stats_t statsp; 514 515 hxgep = (p_hxge_t)ksp->ks_private; 516 if (hxgep == NULL) 517 return (-1); 518 519 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_vmac_stat_update")); 520 521 hxge_save_cntrs(hxgep); 522 523 vmac_kstatsp = (p_hxge_vmac_kstat_t)ksp->ks_data; 524 statsp = (p_hxge_vmac_stats_t)&hxgep->statsp->vmac_stats; 525 526 vmac_kstatsp->tx_frame_cnt.value.ul = statsp->tx_frame_cnt; 527 vmac_kstatsp->tx_byte_cnt.value.ul = statsp->tx_byte_cnt; 528 529 vmac_kstatsp->rx_frame_cnt.value.ul = statsp->rx_frame_cnt; 530 vmac_kstatsp->rx_byte_cnt.value.ul = statsp->rx_byte_cnt; 531 vmac_kstatsp->rx_drop_frame_cnt.value.ul = statsp->rx_drop_frame_cnt; 532 vmac_kstatsp->rx_drop_byte_cnt.value.ul = statsp->rx_drop_byte_cnt; 533 vmac_kstatsp->rx_crc_cnt.value.ul = statsp->rx_crc_cnt; 534 vmac_kstatsp->rx_pause_cnt.value.ul = statsp->rx_pause_cnt; 535 vmac_kstatsp->rx_bcast_fr_cnt.value.ul = statsp->rx_bcast_fr_cnt; 536 vmac_kstatsp->rx_mcast_fr_cnt.value.ul = statsp->rx_mcast_fr_cnt; 537 538 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_vmac_stat_update")); 539 return (0); 540 } 541 542 /* ARGSUSED */ 543 int 544 hxge_pfc_stat_update(kstat_t *ksp, int rw) 545 { 546 p_hxge_t hxgep; 547 p_hxge_pfc_kstat_t kstatsp; 548 p_hxge_pfc_stats_t statsp; 549 550 hxgep = (p_hxge_t)ksp->ks_private; 551 if (hxgep == NULL) 552 return (-1); 553 554 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_pfc_stat_update")); 555 556 kstatsp = (p_hxge_pfc_kstat_t)ksp->ks_data; 557 statsp = (p_hxge_pfc_stats_t)&hxgep->statsp->pfc_stats; 558 559 kstatsp->pfc_pkt_drop.value.ul = statsp->pkt_drop; 560 kstatsp->pfc_tcam_parity_err.value.ul = statsp->tcam_parity_err; 561 kstatsp->pfc_vlan_parity_err.value.ul = statsp->vlan_parity_err; 562 kstatsp->pfc_bad_cs_count.value.ul = statsp->bad_cs_count; 563 kstatsp->pfc_drop_count.value.ul = statsp->drop_count; 564 kstatsp->pfc_tcp_ctrl_drop.value.ul = statsp->errlog.tcp_ctrl_drop; 565 kstatsp->pfc_l2_addr_drop.value.ul = statsp->errlog.l2_addr_drop; 566 kstatsp->pfc_class_code_drop.value.ul = statsp->errlog.class_code_drop; 567 kstatsp->pfc_tcam_drop.value.ul = statsp->errlog.tcam_drop; 568 kstatsp->pfc_vlan_drop.value.ul = statsp->errlog.vlan_drop; 569 570 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_pfc_stat_update")); 571 return (0); 572 } 573 574 static uint64_t 575 hxge_mac_octet_to_u64(struct ether_addr addr) 576 { 577 int i; 578 uint64_t addr64 = 0; 579 580 for (i = ETHERADDRL - 1; i >= 0; i--) { 581 addr64 <<= 8; 582 addr64 |= addr.ether_addr_octet[i]; 583 } 584 return (addr64); 585 } 586 587 /* ARGSUSED */ 588 int 589 hxge_mmac_stat_update(kstat_t *ksp, int rw) 590 { 591 p_hxge_t hxgep; 592 p_hxge_mmac_kstat_t mmac_kstatsp; 593 p_hxge_mmac_stats_t statsp; 594 595 hxgep = (p_hxge_t)ksp->ks_private; 596 if (hxgep == NULL) 597 return (-1); 598 599 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_mmac_stat_update")); 600 601 mmac_kstatsp = (p_hxge_mmac_kstat_t)ksp->ks_data; 602 statsp = (p_hxge_mmac_stats_t)&hxgep->statsp->mmac_stats; 603 604 mmac_kstatsp->mmac_max_addr_cnt.value.ul = statsp->mmac_max_cnt; 605 mmac_kstatsp->mmac_avail_addr_cnt.value.ul = statsp->mmac_avail_cnt; 606 mmac_kstatsp->mmac_addr1.value.ul = 607 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[0]); 608 mmac_kstatsp->mmac_addr2.value.ul = 609 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[1]); 610 mmac_kstatsp->mmac_addr3.value.ul = 611 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[2]); 612 mmac_kstatsp->mmac_addr4.value.ul = 613 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[3]); 614 mmac_kstatsp->mmac_addr5.value.ul = 615 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[4]); 616 mmac_kstatsp->mmac_addr6.value.ul = 617 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[5]); 618 mmac_kstatsp->mmac_addr7.value.ul = 619 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[6]); 620 mmac_kstatsp->mmac_addr8.value.ul = 621 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[7]); 622 mmac_kstatsp->mmac_addr9.value.ul = 623 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[8]); 624 mmac_kstatsp->mmac_addr10.value.ul = 625 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[9]); 626 mmac_kstatsp->mmac_addr11.value.ul = 627 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[10]); 628 mmac_kstatsp->mmac_addr12.value.ul = 629 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[11]); 630 mmac_kstatsp->mmac_addr13.value.ul = 631 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[12]); 632 mmac_kstatsp->mmac_addr14.value.ul = 633 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[13]); 634 mmac_kstatsp->mmac_addr15.value.ul = 635 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[14]); 636 mmac_kstatsp->mmac_addr16.value.ul = 637 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[15]); 638 639 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_mmac_stat_update")); 640 return (0); 641 } 642 643 /* ARGSUSED */ 644 int 645 hxge_peu_sys_stat_update(kstat_t *ksp, int rw) 646 { 647 p_hxge_t hxgep; 648 p_hxge_peu_sys_kstat_t peu_kstatsp; 649 p_hxge_peu_sys_stats_t statsp; 650 651 hxgep = (p_hxge_t)ksp->ks_private; 652 if (hxgep == NULL) 653 return (-1); 654 655 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_peu_sys_stat_update")); 656 657 peu_kstatsp = (p_hxge_peu_sys_kstat_t)ksp->ks_data; 658 statsp = (p_hxge_peu_sys_stats_t)&hxgep->statsp->peu_sys_stats; 659 660 peu_kstatsp->spc_acc_err.value.ul = statsp->spc_acc_err; 661 peu_kstatsp->tdc_pioacc_err.value.ul = statsp->tdc_pioacc_err; 662 peu_kstatsp->rdc_pioacc_err.value.ul = statsp->rdc_pioacc_err; 663 peu_kstatsp->pfc_pioacc_err.value.ul = statsp->pfc_pioacc_err; 664 peu_kstatsp->vmac_pioacc_err.value.ul = statsp->vmac_pioacc_err; 665 peu_kstatsp->cpl_hdrq_parerr.value.ul = statsp->cpl_hdrq_parerr; 666 peu_kstatsp->cpl_dataq_parerr.value.ul = statsp->cpl_dataq_parerr; 667 peu_kstatsp->retryram_xdlh_parerr.value.ul = 668 statsp->retryram_xdlh_parerr; 669 peu_kstatsp->retrysotram_xdlh_parerr.value.ul = 670 statsp->retrysotram_xdlh_parerr; 671 peu_kstatsp->p_hdrq_parerr.value.ul = statsp->p_hdrq_parerr; 672 peu_kstatsp->p_dataq_parerr.value.ul = statsp->p_dataq_parerr; 673 peu_kstatsp->np_hdrq_parerr.value.ul = statsp->np_hdrq_parerr; 674 peu_kstatsp->np_dataq_parerr.value.ul = statsp->np_dataq_parerr; 675 peu_kstatsp->eic_msix_parerr.value.ul = statsp->eic_msix_parerr; 676 peu_kstatsp->hcr_parerr.value.ul = statsp->hcr_parerr; 677 678 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_peu_sys_stat_update")); 679 return (0); 680 } 681 682 static kstat_t * 683 hxge_setup_local_kstat(p_hxge_t hxgep, int instance, char *name, 684 const hxge_kstat_index_t *ksip, size_t count, 685 int (*update) (kstat_t *, int)) 686 { 687 kstat_t *ksp; 688 kstat_named_t *knp; 689 int i; 690 691 ksp = kstat_create(HXGE_DRIVER_NAME, instance, name, "net", 692 KSTAT_TYPE_NAMED, count, 0); 693 if (ksp == NULL) 694 return (NULL); 695 696 ksp->ks_private = (void *) hxgep; 697 ksp->ks_update = update; 698 knp = ksp->ks_data; 699 700 for (i = 0; ksip[i].name != NULL; i++) { 701 kstat_named_init(&knp[i], ksip[i].name, ksip[i].type); 702 } 703 704 kstat_install(ksp); 705 706 return (ksp); 707 } 708 709 void 710 hxge_setup_kstats(p_hxge_t hxgep) 711 { 712 struct kstat *ksp; 713 p_hxge_port_kstat_t hxgekp; 714 size_t hxge_kstat_sz; 715 char stat_name[64]; 716 char mmac_name[64]; 717 int i; 718 719 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_setup_kstats")); 720 721 /* Setup RDC statistics */ 722 for (i = 0; i < hxgep->nrdc; i++) { 723 (void) sprintf(stat_name, "%s"CH_NAME_FORMAT, 724 RDC_NAME_FORMAT1, i); 725 hxgep->statsp->rdc_ksp[i] = hxge_setup_local_kstat(hxgep, 726 hxgep->instance, stat_name, &hxge_rdc_stats[0], 727 RDC_STAT_END, hxge_rdc_stat_update); 728 if (hxgep->statsp->rdc_ksp[i] == NULL) 729 cmn_err(CE_WARN, 730 "kstat_create failed for rdc channel %d", i); 731 } 732 733 /* Setup RDC System statistics */ 734 hxgep->statsp->rdc_sys_ksp = hxge_setup_local_kstat(hxgep, 735 hxgep->instance, "RDC_system", &hxge_rdc_sys_stats[0], 736 RDC_SYS_STAT_END, hxge_rdc_sys_stat_update); 737 if (hxgep->statsp->rdc_sys_ksp == NULL) 738 cmn_err(CE_WARN, "kstat_create failed for rdc_sys_ksp"); 739 740 /* Setup TDC statistics */ 741 for (i = 0; i < hxgep->ntdc; i++) { 742 (void) sprintf(stat_name, "%s"CH_NAME_FORMAT, 743 TDC_NAME_FORMAT1, i); 744 hxgep->statsp->tdc_ksp[i] = hxge_setup_local_kstat(hxgep, 745 hxgep->instance, stat_name, &hxge_tdc_stats[0], 746 TDC_STAT_END, hxge_tdc_stat_update); 747 if (hxgep->statsp->tdc_ksp[i] == NULL) 748 cmn_err(CE_WARN, 749 "kstat_create failed for tdc channel %d", i); 750 } 751 752 /* Setup TDC System statistics */ 753 hxgep->statsp->tdc_sys_ksp = hxge_setup_local_kstat(hxgep, 754 hxgep->instance, "TDC_system", &hxge_tdc_sys_stats[0], 755 RDC_SYS_STAT_END, hxge_tdc_sys_stat_update); 756 if (hxgep->statsp->tdc_sys_ksp == NULL) 757 cmn_err(CE_WARN, "kstat_create failed for tdc_sys_ksp"); 758 759 /* Setup PFC statistics */ 760 hxgep->statsp->pfc_ksp = hxge_setup_local_kstat(hxgep, 761 hxgep->instance, "PFC", &hxge_pfc_stats[0], 762 PFC_STAT_END, hxge_pfc_stat_update); 763 if (hxgep->statsp->pfc_ksp == NULL) 764 cmn_err(CE_WARN, "kstat_create failed for pfc"); 765 766 /* Setup VMAC statistics */ 767 hxgep->statsp->vmac_ksp = hxge_setup_local_kstat(hxgep, 768 hxgep->instance, "VMAC", &hxge_vmac_stats[0], 769 VMAC_STAT_END, hxge_vmac_stat_update); 770 if (hxgep->statsp->vmac_ksp == NULL) 771 cmn_err(CE_WARN, "kstat_create failed for vmac"); 772 773 /* Setup MMAC statistics */ 774 (void) sprintf(mmac_name, "MMAC Stats%d", hxgep->instance); 775 hxgep->statsp->mmac_ksp = hxge_setup_local_kstat(hxgep, 776 hxgep->instance, "MMAC", 777 &hxge_mmac_stats[0], MMAC_STATS_END, hxge_mmac_stat_update); 778 if (hxgep->statsp->mmac_ksp == NULL) 779 cmn_err(CE_WARN, "kstat_create failed for mmac"); 780 781 /* Setup PEU System statistics */ 782 hxgep->statsp->peu_sys_ksp = hxge_setup_local_kstat(hxgep, 783 hxgep->instance, "PEU", &hxge_peu_sys_stats[0], 784 PEU_SYS_STAT_END, hxge_peu_sys_stat_update); 785 if (hxgep->statsp->peu_sys_ksp == NULL) 786 cmn_err(CE_WARN, "kstat_create failed for peu sys"); 787 788 /* Port stats */ 789 hxge_kstat_sz = sizeof (hxge_port_kstat_t); 790 791 if ((ksp = kstat_create(HXGE_DRIVER_NAME, hxgep->instance, 792 "Port", "net", KSTAT_TYPE_NAMED, 793 hxge_kstat_sz / sizeof (kstat_named_t), 0)) == NULL) { 794 cmn_err(CE_WARN, "kstat_create failed for port stat"); 795 return; 796 } 797 798 hxgekp = (p_hxge_port_kstat_t)ksp->ks_data; 799 800 kstat_named_init(&hxgekp->cap_10gfdx, "cap_10gfdx", KSTAT_DATA_ULONG); 801 802 /* 803 * Link partner capabilities. 804 */ 805 kstat_named_init(&hxgekp->lp_cap_10gfdx, "lp_cap_10gfdx", 806 KSTAT_DATA_ULONG); 807 808 /* 809 * Shared link setup. 810 */ 811 kstat_named_init(&hxgekp->link_speed, "link_speed", KSTAT_DATA_ULONG); 812 kstat_named_init(&hxgekp->link_duplex, "link_duplex", KSTAT_DATA_CHAR); 813 kstat_named_init(&hxgekp->link_up, "link_up", KSTAT_DATA_ULONG); 814 815 /* 816 * Loopback statistics. 817 */ 818 kstat_named_init(&hxgekp->lb_mode, "lb_mode", KSTAT_DATA_ULONG); 819 820 /* General MAC statistics */ 821 822 kstat_named_init(&hxgekp->ifspeed, "ifspeed", KSTAT_DATA_UINT64); 823 kstat_named_init(&hxgekp->promisc, "promisc", KSTAT_DATA_CHAR); 824 825 ksp->ks_update = hxge_port_kstat_update; 826 ksp->ks_private = (void *) hxgep; 827 kstat_install(ksp); 828 hxgep->statsp->port_ksp = ksp; 829 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_setup_kstats")); 830 } 831 832 void 833 hxge_destroy_kstats(p_hxge_t hxgep) 834 { 835 int channel; 836 p_hxge_dma_pt_cfg_t p_dma_cfgp; 837 p_hxge_hw_pt_cfg_t p_cfgp; 838 839 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_destroy_kstats")); 840 if (hxgep->statsp == NULL) 841 return; 842 843 if (hxgep->statsp->ksp) 844 kstat_delete(hxgep->statsp->ksp); 845 846 p_dma_cfgp = (p_hxge_dma_pt_cfg_t)&hxgep->pt_config; 847 p_cfgp = (p_hxge_hw_pt_cfg_t)&p_dma_cfgp->hw_config; 848 849 for (channel = 0; channel < p_cfgp->max_rdcs; channel++) { 850 if (hxgep->statsp->rdc_ksp[channel]) { 851 kstat_delete(hxgep->statsp->rdc_ksp[channel]); 852 } 853 } 854 855 for (channel = 0; channel < p_cfgp->max_tdcs; channel++) { 856 if (hxgep->statsp->tdc_ksp[channel]) { 857 kstat_delete(hxgep->statsp->tdc_ksp[channel]); 858 } 859 } 860 861 if (hxgep->statsp->rdc_sys_ksp) 862 kstat_delete(hxgep->statsp->rdc_sys_ksp); 863 864 if (hxgep->statsp->tdc_sys_ksp) 865 kstat_delete(hxgep->statsp->tdc_sys_ksp); 866 867 if (hxgep->statsp->peu_sys_ksp) 868 kstat_delete(hxgep->statsp->peu_sys_ksp); 869 870 if (hxgep->statsp->mmac_ksp) 871 kstat_delete(hxgep->statsp->mmac_ksp); 872 873 if (hxgep->statsp->pfc_ksp) 874 kstat_delete(hxgep->statsp->pfc_ksp); 875 876 if (hxgep->statsp->vmac_ksp) 877 kstat_delete(hxgep->statsp->vmac_ksp); 878 879 if (hxgep->statsp->port_ksp) 880 kstat_delete(hxgep->statsp->port_ksp); 881 882 if (hxgep->statsp) 883 KMEM_FREE(hxgep->statsp, hxgep->statsp->stats_size); 884 885 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_destroy_kstats")); 886 } 887 888 /* ARGSUSED */ 889 int 890 hxge_port_kstat_update(kstat_t *ksp, int rw) 891 { 892 p_hxge_t hxgep; 893 p_hxge_stats_t statsp; 894 p_hxge_port_kstat_t hxgekp; 895 p_hxge_port_stats_t psp; 896 897 hxgep = (p_hxge_t)ksp->ks_private; 898 if (hxgep == NULL) 899 return (-1); 900 901 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_port_kstat_update")); 902 statsp = (p_hxge_stats_t)hxgep->statsp; 903 hxgekp = (p_hxge_port_kstat_t)ksp->ks_data; 904 psp = &statsp->port_stats; 905 906 if (hxgep->filter.all_phys_cnt) 907 (void) strcpy(hxgekp->promisc.value.c, "phys"); 908 else if (hxgep->filter.all_multicast_cnt) 909 (void) strcpy(hxgekp->promisc.value.c, "multi"); 910 else 911 (void) strcpy(hxgekp->promisc.value.c, "off"); 912 hxgekp->ifspeed.value.ul = statsp->mac_stats.link_speed * 1000000ULL; 913 914 /* 915 * transceiver state informations. 916 */ 917 hxgekp->cap_10gfdx.value.ul = statsp->mac_stats.cap_10gfdx; 918 919 /* 920 * Link partner capabilities. 921 */ 922 hxgekp->lp_cap_10gfdx.value.ul = statsp->mac_stats.lp_cap_10gfdx; 923 924 /* 925 * Physical link statistics. 926 */ 927 hxgekp->link_speed.value.ul = statsp->mac_stats.link_speed; 928 if (statsp->mac_stats.link_duplex == 2) 929 (void) strcpy(hxgekp->link_duplex.value.c, "full"); 930 else 931 (void) strcpy(hxgekp->link_duplex.value.c, "unknown"); 932 hxgekp->link_up.value.ul = statsp->mac_stats.link_up; 933 934 /* 935 * Loopback statistics. 936 */ 937 hxgekp->lb_mode.value.ul = psp->lb_mode; 938 939 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_port_kstat_update")); 940 return (0); 941 } 942 943 int 944 hxge_m_stat(void *arg, uint_t stat, uint64_t *value) 945 { 946 p_hxge_t hxgep = (p_hxge_t)arg; 947 p_hxge_stats_t statsp; 948 hxge_tx_ring_stats_t *tx_stats; 949 uint64_t val = 0; 950 int channel; 951 952 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_m_stat")); 953 statsp = (p_hxge_stats_t)hxgep->statsp; 954 955 switch (stat) { 956 case MAC_STAT_IFSPEED: 957 val = statsp->mac_stats.link_speed * 1000000ull; 958 break; 959 960 case MAC_STAT_MULTIRCV: 961 val = 0; 962 break; 963 964 case MAC_STAT_BRDCSTRCV: 965 val = 0; 966 break; 967 968 case MAC_STAT_MULTIXMT: 969 val = 0; 970 break; 971 972 case MAC_STAT_BRDCSTXMT: 973 val = 0; 974 break; 975 976 case MAC_STAT_NORCVBUF: 977 val = 0; 978 break; 979 980 case MAC_STAT_IERRORS: 981 case ETHER_STAT_MACRCV_ERRORS: 982 val = 0; 983 for (channel = 0; channel < hxgep->nrdc; channel++) { 984 val += statsp->rdc_stats[channel].ierrors; 985 } 986 break; 987 988 case MAC_STAT_NOXMTBUF: 989 val = 0; 990 break; 991 992 case MAC_STAT_OERRORS: 993 for (channel = 0; channel < hxgep->ntdc; channel++) { 994 val += statsp->tdc_stats[channel].oerrors; 995 } 996 break; 997 998 case MAC_STAT_COLLISIONS: 999 val = 0; 1000 break; 1001 1002 case MAC_STAT_RBYTES: 1003 for (channel = 0; channel < hxgep->nrdc; channel++) { 1004 val += statsp->rdc_stats[channel].ibytes; 1005 } 1006 break; 1007 1008 case MAC_STAT_IPACKETS: 1009 for (channel = 0; channel < hxgep->nrdc; channel++) { 1010 val += statsp->rdc_stats[channel].ipackets; 1011 } 1012 break; 1013 1014 case MAC_STAT_OBYTES: 1015 for (channel = 0; channel < hxgep->ntdc; channel++) { 1016 val += statsp->tdc_stats[channel].obytes; 1017 } 1018 break; 1019 1020 case MAC_STAT_OPACKETS: 1021 for (channel = 0; channel < hxgep->ntdc; channel++) { 1022 val += statsp->tdc_stats[channel].opackets; 1023 } 1024 break; 1025 1026 case MAC_STAT_UNKNOWNS: 1027 val = 0; 1028 break; 1029 1030 case MAC_STAT_UNDERFLOWS: 1031 val = 0; 1032 break; 1033 1034 case MAC_STAT_OVERFLOWS: 1035 val = 0; 1036 break; 1037 1038 case MAC_STAT_LINK_STATE: 1039 val = statsp->mac_stats.link_duplex; 1040 break; 1041 case MAC_STAT_LINK_UP: 1042 val = statsp->mac_stats.link_up; 1043 break; 1044 case MAC_STAT_PROMISC: 1045 val = statsp->mac_stats.promisc; 1046 break; 1047 case ETHER_STAT_SQE_ERRORS: 1048 val = 0; 1049 break; 1050 1051 case ETHER_STAT_ALIGN_ERRORS: 1052 /* 1053 * No similar error in Hydra receive channels 1054 */ 1055 val = 0; 1056 break; 1057 1058 case ETHER_STAT_FCS_ERRORS: 1059 /* 1060 * No similar error in Hydra receive channels 1061 */ 1062 val = 0; 1063 break; 1064 1065 case ETHER_STAT_FIRST_COLLISIONS: 1066 val = 0; 1067 break; 1068 1069 case ETHER_STAT_MULTI_COLLISIONS: 1070 val = 0; 1071 break; 1072 1073 case ETHER_STAT_TX_LATE_COLLISIONS: 1074 val = 0; 1075 break; 1076 1077 case ETHER_STAT_EX_COLLISIONS: 1078 val = 0; 1079 break; 1080 1081 case ETHER_STAT_DEFER_XMTS: 1082 val = 0; 1083 break; 1084 1085 case ETHER_STAT_MACXMT_ERRORS: 1086 /* 1087 * A count of frames for which transmission on a 1088 * particular interface fails due to an internal 1089 * MAC sublayer transmit error 1090 */ 1091 for (channel = 0; channel < hxgep->ntdc; channel++) { 1092 tx_stats = &statsp->tdc_stats[channel]; 1093 val += tx_stats->pkt_size_hdr_err + 1094 tx_stats->pkt_size_err + 1095 tx_stats->tx_rng_oflow + 1096 tx_stats->peu_resp_err + 1097 tx_stats->runt_pkt_drop_err + 1098 tx_stats->pref_par_err + 1099 tx_stats->tdr_pref_cpl_to + 1100 tx_stats->pkt_cpl_to + 1101 tx_stats->invalid_sop + 1102 tx_stats->unexpected_sop; 1103 } 1104 break; 1105 1106 case ETHER_STAT_CARRIER_ERRORS: 1107 /* 1108 * The number of times that the carrier sense 1109 * condition was lost or never asserted when 1110 * attempting to transmit a frame on a particular interface 1111 */ 1112 for (channel = 0; channel < hxgep->ntdc; channel++) { 1113 tx_stats = &statsp->tdc_stats[channel]; 1114 val += tx_stats->tdr_pref_cpl_to + tx_stats->pkt_cpl_to; 1115 } 1116 break; 1117 1118 case ETHER_STAT_TOOLONG_ERRORS: 1119 /* 1120 * A count of frames received on a particular 1121 * interface that exceed the maximum permitted frame size 1122 */ 1123 for (channel = 0; channel < hxgep->ntdc; channel++) { 1124 tx_stats = &statsp->tdc_stats[channel]; 1125 val += tx_stats->pkt_size_err; 1126 } 1127 break; 1128 1129 case ETHER_STAT_XCVR_ADDR: 1130 val = 0; 1131 break; 1132 case ETHER_STAT_XCVR_ID: 1133 val = 0; 1134 break; 1135 1136 case ETHER_STAT_XCVR_INUSE: 1137 val = 0; 1138 break; 1139 1140 case ETHER_STAT_CAP_1000FDX: 1141 val = 0; 1142 break; 1143 1144 case ETHER_STAT_CAP_1000HDX: 1145 val = 0; 1146 break; 1147 1148 case ETHER_STAT_CAP_100FDX: 1149 val = 0; 1150 break; 1151 1152 case ETHER_STAT_CAP_100HDX: 1153 val = 0; 1154 break; 1155 1156 case ETHER_STAT_CAP_10FDX: 1157 val = 0; 1158 break; 1159 1160 case ETHER_STAT_CAP_10HDX: 1161 val = 0; 1162 break; 1163 1164 case ETHER_STAT_CAP_ASMPAUSE: 1165 val = 0; 1166 break; 1167 1168 case ETHER_STAT_CAP_PAUSE: 1169 val = 0; 1170 break; 1171 1172 case ETHER_STAT_CAP_AUTONEG: 1173 val = 0; 1174 break; 1175 1176 case ETHER_STAT_ADV_CAP_1000FDX: 1177 val = 0; 1178 break; 1179 1180 case ETHER_STAT_ADV_CAP_1000HDX: 1181 val = 0; 1182 break; 1183 1184 case ETHER_STAT_ADV_CAP_100FDX: 1185 val = 0; 1186 break; 1187 1188 case ETHER_STAT_ADV_CAP_100HDX: 1189 val = 0; 1190 break; 1191 1192 case ETHER_STAT_ADV_CAP_10FDX: 1193 val = 0; 1194 break; 1195 1196 case ETHER_STAT_ADV_CAP_10HDX: 1197 val = 0; 1198 break; 1199 1200 case ETHER_STAT_ADV_CAP_ASMPAUSE: 1201 val = 0; 1202 break; 1203 1204 case ETHER_STAT_ADV_CAP_PAUSE: 1205 val = 0; 1206 break; 1207 1208 case ETHER_STAT_ADV_CAP_AUTONEG: 1209 val = 0; 1210 break; 1211 1212 case ETHER_STAT_LP_CAP_1000FDX: 1213 val = 0; 1214 break; 1215 1216 case ETHER_STAT_LP_CAP_1000HDX: 1217 val = 0; 1218 break; 1219 1220 case ETHER_STAT_LP_CAP_100FDX: 1221 val = 0; 1222 break; 1223 1224 case ETHER_STAT_LP_CAP_100HDX: 1225 val = 0; 1226 break; 1227 1228 case ETHER_STAT_LP_CAP_10FDX: 1229 val = 0; 1230 break; 1231 1232 case ETHER_STAT_LP_CAP_10HDX: 1233 val = 0; 1234 break; 1235 1236 case ETHER_STAT_LP_CAP_ASMPAUSE: 1237 val = 0; 1238 break; 1239 1240 case ETHER_STAT_LP_CAP_PAUSE: 1241 val = 0; 1242 break; 1243 1244 case ETHER_STAT_LP_CAP_AUTONEG: 1245 val = 0; 1246 break; 1247 1248 case ETHER_STAT_LINK_ASMPAUSE: 1249 val = 0; 1250 break; 1251 1252 case ETHER_STAT_LINK_PAUSE: 1253 val = 0; 1254 break; 1255 1256 case ETHER_STAT_LINK_AUTONEG: 1257 val = 0; 1258 break; 1259 1260 case ETHER_STAT_LINK_DUPLEX: 1261 val = statsp->mac_stats.link_duplex; 1262 break; 1263 1264 case ETHER_STAT_TOOSHORT_ERRORS: 1265 val = 0; 1266 break; 1267 1268 case ETHER_STAT_CAP_REMFAULT: 1269 val = 0; 1270 break; 1271 1272 case ETHER_STAT_ADV_REMFAULT: 1273 val = 0; 1274 break; 1275 1276 case ETHER_STAT_LP_REMFAULT: 1277 val = 0; 1278 break; 1279 1280 case ETHER_STAT_JABBER_ERRORS: 1281 val = 0; 1282 break; 1283 1284 case ETHER_STAT_CAP_100T4: 1285 val = 0; 1286 break; 1287 1288 case ETHER_STAT_ADV_CAP_100T4: 1289 val = 0; 1290 break; 1291 1292 case ETHER_STAT_LP_CAP_100T4: 1293 val = 0; 1294 break; 1295 1296 default: 1297 /* 1298 * Shouldn't reach here... 1299 */ 1300 cmn_err(CE_WARN, 1301 "hxge_m_stat: unrecognized parameter value = 0x%x", stat); 1302 1303 return (ENOTSUP); 1304 } 1305 *value = val; 1306 return (0); 1307 } 1308