xref: /titanic_51/usr/src/uts/common/io/hxge/hpi_vir.h (revision a512c5d1f2908d965887ad5494954ba2cf904bd2)
13dec9fcdSqs148142 /*
23dec9fcdSqs148142  * CDDL HEADER START
33dec9fcdSqs148142  *
43dec9fcdSqs148142  * The contents of this file are subject to the terms of the
53dec9fcdSqs148142  * Common Development and Distribution License (the "License").
63dec9fcdSqs148142  * You may not use this file except in compliance with the License.
73dec9fcdSqs148142  *
83dec9fcdSqs148142  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
93dec9fcdSqs148142  * or http://www.opensolaris.org/os/licensing.
103dec9fcdSqs148142  * See the License for the specific language governing permissions
113dec9fcdSqs148142  * and limitations under the License.
123dec9fcdSqs148142  *
133dec9fcdSqs148142  * When distributing Covered Code, include this CDDL HEADER in each
143dec9fcdSqs148142  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
153dec9fcdSqs148142  * If applicable, add the following below this CDDL HEADER, with the
163dec9fcdSqs148142  * fields enclosed by brackets "[]" replaced with your own identifying
173dec9fcdSqs148142  * information: Portions Copyright [yyyy] [name of copyright owner]
183dec9fcdSqs148142  *
193dec9fcdSqs148142  * CDDL HEADER END
203dec9fcdSqs148142  */
213dec9fcdSqs148142 /*
223dec9fcdSqs148142  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
233dec9fcdSqs148142  * Use is subject to license terms.
243dec9fcdSqs148142  */
253dec9fcdSqs148142 
263dec9fcdSqs148142 #ifndef _HPI_VIR_H
273dec9fcdSqs148142 #define	_HPI_VIR_H
283dec9fcdSqs148142 
293dec9fcdSqs148142 #ifdef	__cplusplus
303dec9fcdSqs148142 extern "C" {
313dec9fcdSqs148142 #endif
323dec9fcdSqs148142 
333dec9fcdSqs148142 #include <hpi.h>
343dec9fcdSqs148142 #include <hxge_peu_hw.h>
353dec9fcdSqs148142 
363dec9fcdSqs148142 /*
373dec9fcdSqs148142  * Virtualization and Logical devices HPI error codes
383dec9fcdSqs148142  */
393dec9fcdSqs148142 #define	VIR_ERR_ST		(VIR_BLK_ID << HPI_BLOCK_ID_SHIFT)
403dec9fcdSqs148142 #define	VIR_ID_SHIFT(n)		(n << HPI_PORT_CHAN_SHIFT)
413dec9fcdSqs148142 
423dec9fcdSqs148142 #define	VIR_LD_INVALID		(HPI_BK_ERROR_START | 0x30)
433dec9fcdSqs148142 #define	VIR_LDG_INVALID		(HPI_BK_ERROR_START | 0x31)
443dec9fcdSqs148142 #define	VIR_LDSV_INVALID	(HPI_BK_ERROR_START | 0x32)
453dec9fcdSqs148142 
463dec9fcdSqs148142 #define	VIR_INTM_TM_INVALID	(HPI_BK_ERROR_START | 0x33)
473dec9fcdSqs148142 #define	VIR_TM_RES_INVALID	(HPI_BK_ERROR_START | 0x34)
483dec9fcdSqs148142 #define	VIR_SID_VEC_INVALID	(HPI_BK_ERROR_START | 0x35)
493dec9fcdSqs148142 
503dec9fcdSqs148142 /*
513dec9fcdSqs148142  * Error codes of logical devices and groups functions.
523dec9fcdSqs148142  */
533dec9fcdSqs148142 #define	HPI_VIR_LD_INVALID(n) 	(VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_LD_INVALID)
543dec9fcdSqs148142 #define	HPI_VIR_LDG_INVALID(n)	(VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_LDG_INVALID)
553dec9fcdSqs148142 #define	HPI_VIR_LDSV_INVALID(n) (VIR_ID_SHIFT(n) | \
563dec9fcdSqs148142 					VIR_ERR_ST | VIR_LDSV_INVALID)
573dec9fcdSqs148142 #define	HPI_VIR_INTM_TM_INVALID(n)	(VIR_ID_SHIFT(n) | \
583dec9fcdSqs148142 					VIR_ERR_ST | VIR_INTM_TM_INVALID)
593dec9fcdSqs148142 #define	HPI_VIR_TM_RES_INVALID		(VIR_ERR_ST | VIR_TM_RES_INVALID)
603dec9fcdSqs148142 #define	HPI_VIR_SID_VEC_INVALID(n)	(VIR_ID_SHIFT(n) | \
613dec9fcdSqs148142 						VIR_ERR_ST | VIR_TM_RES_INVALID)
623dec9fcdSqs148142 
633dec9fcdSqs148142 /*
643dec9fcdSqs148142  * Logical device definitions.
653dec9fcdSqs148142  */
663dec9fcdSqs148142 #define	LDG_NUM_STEP		4
673dec9fcdSqs148142 #define	LD_NUM_OFFSET(ld)	(ld * LDG_NUM_STEP)
683dec9fcdSqs148142 
693dec9fcdSqs148142 #define	LDSV_STEP		8192
703dec9fcdSqs148142 #define	LDSVG_OFFSET(ldg)	(ldg * LDSV_STEP)
713dec9fcdSqs148142 #define	LDSV_OFFSET(ldv)	(ldv * LDSV_STEP)
723dec9fcdSqs148142 #define	LDSV_OFFSET_MASK(ld)	(LD_INTR_MASK + LDSV_OFFSET(ld))
733dec9fcdSqs148142 
743dec9fcdSqs148142 #define	LDG_SID_STEP		8192
753dec9fcdSqs148142 #define	LDG_SID_OFFSET(ldg)	(ldg * LDG_SID_STEP)
763dec9fcdSqs148142 
773dec9fcdSqs148142 typedef enum {
783dec9fcdSqs148142 	VECTOR0,
79*a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States 	VECTOR1
803dec9fcdSqs148142 } ldsv_type_t;
813dec9fcdSqs148142 
823dec9fcdSqs148142 /*
833dec9fcdSqs148142  * Definitions for the system interrupt data.
843dec9fcdSqs148142  */
853dec9fcdSqs148142 typedef struct _fzc_sid {
863dec9fcdSqs148142 	uint8_t		ldg;
873dec9fcdSqs148142 	uint8_t		vector;
883dec9fcdSqs148142 } fzc_sid_t, *p_fzc_sid_t;
893dec9fcdSqs148142 
903dec9fcdSqs148142 /*
913dec9fcdSqs148142  * Virtualization and Interrupt Prototypes.
923dec9fcdSqs148142  */
933dec9fcdSqs148142 hpi_status_t hpi_fzc_ldg_num_set(hpi_handle_t handle, uint8_t ld, uint8_t ldg);
943dec9fcdSqs148142 hpi_status_t hpi_ldsv_ldfs_get(hpi_handle_t handle, uint8_t ldg,
953dec9fcdSqs148142     uint32_t *vector0_p, uint32_t *vecto1_p);
963dec9fcdSqs148142 hpi_status_t hpi_ldsv_get(hpi_handle_t handle, uint8_t ldg, ldsv_type_t vector,
973dec9fcdSqs148142     uint32_t *ldf_p);
983dec9fcdSqs148142 hpi_status_t hpi_intr_mask_set(hpi_handle_t handle, uint8_t ld,
993dec9fcdSqs148142     uint8_t ldf_mask);
1003dec9fcdSqs148142 hpi_status_t hpi_intr_ldg_mgmt_set(hpi_handle_t handle, uint8_t ldg,
1013dec9fcdSqs148142     boolean_t arm, uint8_t timer);
1023dec9fcdSqs148142 hpi_status_t hpi_fzc_ldg_timer_res_set(hpi_handle_t handle, uint32_t res);
1033dec9fcdSqs148142 hpi_status_t hpi_fzc_sid_set(hpi_handle_t handle, fzc_sid_t sid);
1043dec9fcdSqs148142 hpi_status_t hpi_fzc_sys_err_mask_set(hpi_handle_t handle, boolean_t mask);
1053dec9fcdSqs148142 hpi_status_t hpi_fzc_sys_err_stat_get(hpi_handle_t handle,
1063dec9fcdSqs148142     dev_err_stat_t *statp);
1073dec9fcdSqs148142 
1083dec9fcdSqs148142 #ifdef	__cplusplus
1093dec9fcdSqs148142 }
1103dec9fcdSqs148142 #endif
1113dec9fcdSqs148142 
1123dec9fcdSqs148142 #endif	/* _HPI_VIR_H */
113