1 /* 2 * This file is provided under a CDDLv1 license. When using or 3 * redistributing this file, you may do so under this license. 4 * In redistributing this file this license must be included 5 * and no other modification of this header file is permitted. 6 * 7 * CDDL LICENSE SUMMARY 8 * 9 * Copyright(c) 1999 - 2008 Intel Corporation. All rights reserved. 10 * 11 * The contents of this file are subject to the terms of Version 12 * 1.0 of the Common Development and Distribution License (the "License"). 13 * 14 * You should have received a copy of the License with this software. 15 * You can obtain a copy of the License at 16 * http://www.opensolaris.org/os/licensing. 17 * See the License for the specific language governing permissions 18 * and limitations under the License. 19 */ 20 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms of the CDDLv1. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 /* 29 * ********************************************************************** 30 * * 31 * Module Name: * 32 * e1000g_rx.c * 33 * * 34 * Abstract: * 35 * This file contains some routines that take care of Receive * 36 * interrupt and also for the received packets it sends up to * 37 * upper layer. * 38 * It tries to do a zero copy if free buffers are available in * 39 * the pool. * 40 * * 41 * ********************************************************************** 42 */ 43 44 #include "e1000g_sw.h" 45 #include "e1000g_debug.h" 46 47 static p_rx_sw_packet_t e1000g_get_buf(e1000g_rx_ring_t *rx_ring); 48 #pragma inline(e1000g_get_buf) 49 static void e1000g_priv_devi_list_clean(); 50 51 /* 52 * e1000g_rxfree_func - the call-back function to reclaim rx buffer 53 * 54 * This function is called when an mp is freed by the user thru 55 * freeb call (Only for mp constructed through desballoc call) 56 * It returns back the freed buffer to the freelist 57 */ 58 void 59 e1000g_rxfree_func(p_rx_sw_packet_t packet) 60 { 61 struct e1000g *Adapter; 62 e1000g_rx_ring_t *rx_ring; 63 64 rx_ring = (e1000g_rx_ring_t *)packet->rx_ring; 65 Adapter = rx_ring->adapter; 66 67 /* 68 * Here the rx recycling processes different rx packets in different 69 * threads, so we protect it with RW_READER to ensure it won't block 70 * other rx recycling threads. 71 */ 72 rw_enter(&e1000g_rx_detach_lock, RW_READER); 73 74 if (packet->flag == E1000G_RX_SW_FREE) { 75 rw_exit(&e1000g_rx_detach_lock); 76 return; 77 } 78 79 if (packet->flag == E1000G_RX_SW_STOP) { 80 packet->flag = E1000G_RX_SW_FREE; 81 rw_exit(&e1000g_rx_detach_lock); 82 83 rw_enter(&e1000g_rx_detach_lock, RW_WRITER); 84 rx_ring->pending_count--; 85 e1000g_mblks_pending--; 86 87 if (rx_ring->pending_count == 0) { 88 while (rx_ring->pending_list != NULL) { 89 packet = rx_ring->pending_list; 90 rx_ring->pending_list = 91 rx_ring->pending_list->next; 92 93 ASSERT(packet->mp == NULL); 94 e1000g_free_rx_sw_packet(packet); 95 } 96 } 97 98 /* 99 * If e1000g_force_detach is enabled, we need to clean up 100 * the idle priv_dip entries in the private dip list while 101 * e1000g_mblks_pending is zero. 102 */ 103 if (e1000g_force_detach && (e1000g_mblks_pending == 0)) 104 e1000g_priv_devi_list_clean(); 105 rw_exit(&e1000g_rx_detach_lock); 106 return; 107 } 108 109 if (packet->flag == E1000G_RX_SW_DETACH) { 110 packet->flag = E1000G_RX_SW_FREE; 111 rw_exit(&e1000g_rx_detach_lock); 112 113 ASSERT(packet->mp == NULL); 114 e1000g_free_rx_sw_packet(packet); 115 116 /* 117 * Here the e1000g_mblks_pending may be modified by different 118 * rx recycling threads simultaneously, so we need to protect 119 * it with RW_WRITER. 120 */ 121 rw_enter(&e1000g_rx_detach_lock, RW_WRITER); 122 e1000g_mblks_pending--; 123 124 /* 125 * If e1000g_force_detach is enabled, we need to clean up 126 * the idle priv_dip entries in the private dip list while 127 * e1000g_mblks_pending is zero. 128 */ 129 if (e1000g_force_detach && (e1000g_mblks_pending == 0)) 130 e1000g_priv_devi_list_clean(); 131 rw_exit(&e1000g_rx_detach_lock); 132 return; 133 } 134 135 packet->flag = E1000G_RX_SW_FREE; 136 137 if (packet->mp == NULL) { 138 /* 139 * Allocate a mblk that binds to the data buffer 140 */ 141 packet->mp = desballoc((unsigned char *) 142 packet->rx_buf->address - E1000G_IPALIGNROOM, 143 packet->rx_buf->size + E1000G_IPALIGNROOM, 144 BPRI_MED, &packet->free_rtn); 145 146 if (packet->mp != NULL) { 147 packet->mp->b_rptr += E1000G_IPALIGNROOM; 148 packet->mp->b_wptr += E1000G_IPALIGNROOM; 149 } else { 150 E1000G_STAT(rx_ring->stat_esballoc_fail); 151 } 152 } 153 154 mutex_enter(&rx_ring->freelist_lock); 155 QUEUE_PUSH_TAIL(&rx_ring->free_list, &packet->Link); 156 rx_ring->avail_freepkt++; 157 mutex_exit(&rx_ring->freelist_lock); 158 159 rw_exit(&e1000g_rx_detach_lock); 160 } 161 162 /* 163 * e1000g_priv_devi_list_clean - clean up e1000g_private_devi_list 164 * 165 * We will walk the e1000g_private_devi_list to free the entry marked 166 * with the E1000G_PRIV_DEVI_DETACH flag. 167 */ 168 static void 169 e1000g_priv_devi_list_clean() 170 { 171 private_devi_list_t *devi_node, *devi_del; 172 173 if (e1000g_private_devi_list == NULL) 174 return; 175 176 devi_node = e1000g_private_devi_list; 177 while ((devi_node != NULL) && 178 (devi_node->flag == E1000G_PRIV_DEVI_DETACH)) { 179 e1000g_private_devi_list = devi_node->next; 180 kmem_free(devi_node->priv_dip, 181 sizeof (struct dev_info)); 182 kmem_free(devi_node, 183 sizeof (private_devi_list_t)); 184 devi_node = e1000g_private_devi_list; 185 } 186 if (e1000g_private_devi_list == NULL) 187 return; 188 while (devi_node->next != NULL) { 189 if (devi_node->next->flag == E1000G_PRIV_DEVI_DETACH) { 190 devi_del = devi_node->next; 191 devi_node->next = devi_del->next; 192 kmem_free(devi_del->priv_dip, 193 sizeof (struct dev_info)); 194 kmem_free(devi_del, 195 sizeof (private_devi_list_t)); 196 } else { 197 devi_node = devi_node->next; 198 } 199 } 200 } 201 202 /* 203 * e1000g_rx_setup - setup rx data structures 204 * 205 * This routine initializes all of the receive related 206 * structures. This includes the receive descriptors, the 207 * actual receive buffers, and the rx_sw_packet software 208 * structures. 209 */ 210 void 211 e1000g_rx_setup(struct e1000g *Adapter) 212 { 213 struct e1000_hw *hw; 214 p_rx_sw_packet_t packet; 215 struct e1000_rx_desc *descriptor; 216 uint32_t buf_low; 217 uint32_t buf_high; 218 uint32_t reg_val; 219 int i; 220 int size; 221 e1000g_rx_ring_t *rx_ring; 222 223 hw = &Adapter->shared; 224 rx_ring = Adapter->rx_ring; 225 226 /* 227 * zero out all of the receive buffer descriptor memory 228 * assures any previous data or status is erased 229 */ 230 bzero(rx_ring->rbd_area, 231 sizeof (struct e1000_rx_desc) * Adapter->rx_desc_num); 232 233 if (!Adapter->rx_buffer_setup) { 234 /* Init the list of "Receive Buffer" */ 235 QUEUE_INIT_LIST(&rx_ring->recv_list); 236 237 /* Init the list of "Free Receive Buffer" */ 238 QUEUE_INIT_LIST(&rx_ring->free_list); 239 240 /* 241 * Setup Receive list and the Free list. Note that 242 * the both were allocated in one packet area. 243 */ 244 packet = rx_ring->packet_area; 245 descriptor = rx_ring->rbd_first; 246 247 for (i = 0; i < Adapter->rx_desc_num; 248 i++, packet = packet->next, descriptor++) { 249 ASSERT(packet != NULL); 250 ASSERT(descriptor != NULL); 251 descriptor->buffer_addr = 252 packet->rx_buf->dma_address; 253 254 /* Add this rx_sw_packet to the receive list */ 255 QUEUE_PUSH_TAIL(&rx_ring->recv_list, 256 &packet->Link); 257 } 258 259 for (i = 0; i < Adapter->rx_freelist_num; 260 i++, packet = packet->next) { 261 ASSERT(packet != NULL); 262 /* Add this rx_sw_packet to the free list */ 263 QUEUE_PUSH_TAIL(&rx_ring->free_list, 264 &packet->Link); 265 } 266 rx_ring->avail_freepkt = Adapter->rx_freelist_num; 267 268 Adapter->rx_buffer_setup = B_TRUE; 269 } else { 270 /* Setup the initial pointer to the first rx descriptor */ 271 packet = (p_rx_sw_packet_t) 272 QUEUE_GET_HEAD(&rx_ring->recv_list); 273 descriptor = rx_ring->rbd_first; 274 275 for (i = 0; i < Adapter->rx_desc_num; i++) { 276 ASSERT(packet != NULL); 277 ASSERT(descriptor != NULL); 278 descriptor->buffer_addr = 279 packet->rx_buf->dma_address; 280 281 /* Get next rx_sw_packet */ 282 packet = (p_rx_sw_packet_t) 283 QUEUE_GET_NEXT(&rx_ring->recv_list, &packet->Link); 284 descriptor++; 285 } 286 } 287 288 E1000_WRITE_REG(&Adapter->shared, E1000_RDTR, Adapter->rx_intr_delay); 289 E1000G_DEBUGLOG_1(Adapter, E1000G_INFO_LEVEL, 290 "E1000_RDTR: 0x%x\n", Adapter->rx_intr_delay); 291 if (hw->mac.type >= e1000_82540) { 292 E1000_WRITE_REG(&Adapter->shared, E1000_RADV, 293 Adapter->rx_intr_abs_delay); 294 E1000G_DEBUGLOG_1(Adapter, E1000G_INFO_LEVEL, 295 "E1000_RADV: 0x%x\n", Adapter->rx_intr_abs_delay); 296 } 297 298 /* 299 * Setup our descriptor pointers 300 */ 301 rx_ring->rbd_next = rx_ring->rbd_first; 302 303 size = Adapter->rx_desc_num * sizeof (struct e1000_rx_desc); 304 E1000_WRITE_REG(hw, E1000_RDLEN, size); 305 size = E1000_READ_REG(hw, E1000_RDLEN); 306 307 /* To get lower order bits */ 308 buf_low = (uint32_t)rx_ring->rbd_dma_addr; 309 /* To get the higher order bits */ 310 buf_high = (uint32_t)(rx_ring->rbd_dma_addr >> 32); 311 312 E1000_WRITE_REG(hw, E1000_RDBAH, buf_high); 313 E1000_WRITE_REG(hw, E1000_RDBAL, buf_low); 314 315 /* 316 * Setup our HW Rx Head & Tail descriptor pointers 317 */ 318 E1000_WRITE_REG(hw, E1000_RDT, 319 (uint32_t)(rx_ring->rbd_last - rx_ring->rbd_first)); 320 E1000_WRITE_REG(hw, E1000_RDH, 0); 321 322 /* 323 * Setup the Receive Control Register (RCTL), and ENABLE the 324 * receiver. The initial configuration is to: Enable the receiver, 325 * accept broadcasts, discard bad packets (and long packets), 326 * disable VLAN filter checking, set the receive descriptor 327 * minimum threshold size to 1/2, and the receive buffer size to 328 * 2k. 329 */ 330 reg_val = E1000_RCTL_EN | /* Enable Receive Unit */ 331 E1000_RCTL_BAM | /* Accept Broadcast Packets */ 332 E1000_RCTL_LPE | /* Large Packet Enable bit */ 333 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT) | 334 E1000_RCTL_RDMTS_HALF | 335 E1000_RCTL_LBM_NO; /* Loopback Mode = none */ 336 337 if (Adapter->strip_crc) 338 reg_val |= E1000_RCTL_SECRC; /* Strip Ethernet CRC */ 339 340 switch (hw->mac.max_frame_size) { 341 case ETHERMAX: 342 reg_val |= E1000_RCTL_SZ_2048; 343 break; 344 case FRAME_SIZE_UPTO_4K: 345 reg_val |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX; 346 break; 347 case FRAME_SIZE_UPTO_8K: 348 reg_val |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX; 349 break; 350 case FRAME_SIZE_UPTO_9K: 351 case FRAME_SIZE_UPTO_16K: 352 reg_val |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX; 353 break; 354 default: 355 reg_val |= E1000_RCTL_SZ_2048; 356 break; 357 } 358 359 if (e1000_tbi_sbp_enabled_82543(hw)) 360 reg_val |= E1000_RCTL_SBP; 361 362 /* 363 * Enable early receives on supported devices, only takes effect when 364 * packet size is equal or larger than the specified value (in 8 byte 365 * units), e.g. using jumbo frames when setting to E1000_ERT_2048 366 */ 367 if ((hw->mac.type == e1000_82573) || (hw->mac.type == e1000_ich9lan)) 368 E1000_WRITE_REG(hw, E1000_ERT, E1000_ERT_2048); 369 370 E1000_WRITE_REG(hw, E1000_RCTL, reg_val); 371 372 reg_val = 373 E1000_RXCSUM_TUOFL | /* TCP/UDP checksum offload Enable */ 374 E1000_RXCSUM_IPOFL; /* IP checksum offload Enable */ 375 376 E1000_WRITE_REG(hw, E1000_RXCSUM, reg_val); 377 } 378 379 /* 380 * e1000g_get_buf - get an rx sw packet from the free_list 381 */ 382 static p_rx_sw_packet_t 383 e1000g_get_buf(e1000g_rx_ring_t *rx_ring) 384 { 385 struct e1000g *Adapter; 386 p_rx_sw_packet_t packet; 387 388 Adapter = rx_ring->adapter; 389 390 mutex_enter(&rx_ring->freelist_lock); 391 packet = (p_rx_sw_packet_t) 392 QUEUE_POP_HEAD(&rx_ring->free_list); 393 if (packet != NULL) 394 rx_ring->avail_freepkt--; 395 mutex_exit(&rx_ring->freelist_lock); 396 397 return (packet); 398 } 399 400 /* 401 * e1000g_receive - main receive routine 402 * 403 * This routine will process packets received in an interrupt 404 */ 405 mblk_t * 406 e1000g_receive(struct e1000g *Adapter) 407 { 408 struct e1000_hw *hw; 409 mblk_t *nmp; 410 mblk_t *ret_mp; 411 mblk_t *ret_nmp; 412 struct e1000_rx_desc *current_desc; 413 struct e1000_rx_desc *last_desc; 414 p_rx_sw_packet_t packet; 415 p_rx_sw_packet_t newpkt; 416 USHORT length; 417 uint32_t pkt_count; 418 uint32_t desc_count; 419 boolean_t accept_frame; 420 boolean_t end_of_packet; 421 boolean_t need_copy; 422 e1000g_rx_ring_t *rx_ring; 423 dma_buffer_t *rx_buf; 424 uint16_t cksumflags; 425 426 ret_mp = NULL; 427 ret_nmp = NULL; 428 pkt_count = 0; 429 desc_count = 0; 430 cksumflags = 0; 431 432 hw = &Adapter->shared; 433 rx_ring = Adapter->rx_ring; 434 435 /* Sync the Rx descriptor DMA buffers */ 436 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 437 0, 0, DDI_DMA_SYNC_FORKERNEL); 438 439 if (e1000g_check_dma_handle(rx_ring->rbd_dma_handle) != DDI_FM_OK) { 440 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 441 Adapter->chip_state = E1000G_ERROR; 442 } 443 444 current_desc = rx_ring->rbd_next; 445 if (!(current_desc->status & E1000_RXD_STAT_DD)) { 446 /* 447 * don't send anything up. just clear the RFD 448 */ 449 E1000G_DEBUG_STAT(rx_ring->stat_none); 450 return (ret_mp); 451 } 452 453 /* 454 * Loop through the receive descriptors starting at the last known 455 * descriptor owned by the hardware that begins a packet. 456 */ 457 while ((current_desc->status & E1000_RXD_STAT_DD) && 458 (pkt_count < Adapter->rx_limit_onintr)) { 459 460 desc_count++; 461 /* 462 * Now this can happen in Jumbo frame situation. 463 */ 464 if (current_desc->status & E1000_RXD_STAT_EOP) { 465 /* packet has EOP set */ 466 end_of_packet = B_TRUE; 467 } else { 468 /* 469 * If this received buffer does not have the 470 * End-Of-Packet bit set, the received packet 471 * will consume multiple buffers. We won't send this 472 * packet upstack till we get all the related buffers. 473 */ 474 end_of_packet = B_FALSE; 475 } 476 477 /* 478 * Get a pointer to the actual receive buffer 479 * The mp->b_rptr is mapped to The CurrentDescriptor 480 * Buffer Address. 481 */ 482 packet = 483 (p_rx_sw_packet_t)QUEUE_GET_HEAD(&rx_ring->recv_list); 484 ASSERT(packet != NULL); 485 486 rx_buf = packet->rx_buf; 487 488 length = current_desc->length; 489 490 #ifdef __sparc 491 if (packet->dma_type == USE_DVMA) 492 dvma_sync(rx_buf->dma_handle, 0, 493 DDI_DMA_SYNC_FORKERNEL); 494 else 495 (void) ddi_dma_sync(rx_buf->dma_handle, 496 E1000G_IPALIGNROOM, length, 497 DDI_DMA_SYNC_FORKERNEL); 498 #else 499 (void) ddi_dma_sync(rx_buf->dma_handle, 500 E1000G_IPALIGNROOM, length, 501 DDI_DMA_SYNC_FORKERNEL); 502 #endif 503 504 if (e1000g_check_dma_handle( 505 rx_buf->dma_handle) != DDI_FM_OK) { 506 ddi_fm_service_impact(Adapter->dip, 507 DDI_SERVICE_DEGRADED); 508 Adapter->chip_state = E1000G_ERROR; 509 } 510 511 accept_frame = (current_desc->errors == 0) || 512 ((current_desc->errors & 513 (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) != 0); 514 515 if (hw->mac.type == e1000_82543) { 516 unsigned char last_byte; 517 518 last_byte = 519 *((unsigned char *)rx_buf->address + length - 1); 520 521 if (TBI_ACCEPT(hw, 522 current_desc->status, current_desc->errors, 523 current_desc->length, last_byte)) { 524 525 e1000_tbi_adjust_stats(Adapter, 526 length, hw->mac.addr); 527 528 length--; 529 accept_frame = B_TRUE; 530 } else if (e1000_tbi_sbp_enabled_82543(hw) && 531 (current_desc->errors == E1000_RXD_ERR_CE)) { 532 accept_frame = B_TRUE; 533 } 534 } 535 536 /* 537 * Indicate the packet to the NOS if it was good. 538 * Normally, hardware will discard bad packets for us. 539 * Check for the packet to be a valid Ethernet packet 540 */ 541 if (!accept_frame) { 542 /* 543 * error in incoming packet, either the packet is not a 544 * ethernet size packet, or the packet has an error. In 545 * either case, the packet will simply be discarded. 546 */ 547 E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL, 548 "Process Receive Interrupts: Error in Packet\n"); 549 550 E1000G_STAT(rx_ring->stat_error); 551 /* 552 * Returning here as we are done here. There is 553 * no point in waiting for while loop to elapse 554 * and the things which were done. More efficient 555 * and less error prone... 556 */ 557 goto rx_drop; 558 } 559 560 /* 561 * If the Ethernet CRC is not stripped by the hardware, 562 * we need to strip it before sending it up to the stack. 563 */ 564 if (end_of_packet && !Adapter->strip_crc) { 565 if (length > CRC_LENGTH) { 566 length -= CRC_LENGTH; 567 } else { 568 /* 569 * If the fragment is smaller than the CRC, 570 * drop this fragment, do the processing of 571 * the end of the packet. 572 */ 573 ASSERT(rx_ring->rx_mblk_tail != NULL); 574 rx_ring->rx_mblk_tail->b_wptr -= 575 CRC_LENGTH - length; 576 rx_ring->rx_mblk_len -= 577 CRC_LENGTH - length; 578 579 QUEUE_POP_HEAD(&rx_ring->recv_list); 580 581 goto rx_end_of_packet; 582 } 583 } 584 585 need_copy = B_TRUE; 586 587 if (length <= Adapter->rx_bcopy_thresh) 588 goto rx_copy; 589 590 /* 591 * Get the pre-constructed mblk that was associated 592 * to the receive data buffer. 593 */ 594 if (packet->mp == NULL) { 595 packet->mp = desballoc((unsigned char *) 596 rx_buf->address - E1000G_IPALIGNROOM, 597 length + E1000G_IPALIGNROOM, 598 BPRI_MED, &packet->free_rtn); 599 600 if (packet->mp != NULL) { 601 packet->mp->b_rptr += E1000G_IPALIGNROOM; 602 packet->mp->b_wptr += E1000G_IPALIGNROOM; 603 } else { 604 E1000G_STAT(rx_ring->stat_esballoc_fail); 605 } 606 } 607 608 if (packet->mp != NULL) { 609 /* 610 * We have two sets of buffer pool. One associated with 611 * the Rxdescriptors and other a freelist buffer pool. 612 * Each time we get a good packet, Try to get a buffer 613 * from the freelist pool using e1000g_get_buf. If we 614 * get free buffer, then replace the descriptor buffer 615 * address with the free buffer we just got, and pass 616 * the pre-constructed mblk upstack. (note no copying) 617 * 618 * If we failed to get a free buffer, then try to 619 * allocate a new buffer(mp) and copy the recv buffer 620 * content to our newly allocated buffer(mp). Don't 621 * disturb the desriptor buffer address. (note copying) 622 */ 623 newpkt = e1000g_get_buf(rx_ring); 624 625 if (newpkt != NULL) { 626 /* 627 * Get the mblk associated to the data, 628 * and strip it off the sw packet. 629 */ 630 nmp = packet->mp; 631 packet->mp = NULL; 632 packet->flag = E1000G_RX_SW_SENDUP; 633 634 /* 635 * Now replace old buffer with the new 636 * one we got from free list 637 * Both the RxSwPacket as well as the 638 * Receive Buffer Descriptor will now 639 * point to this new packet. 640 */ 641 packet = newpkt; 642 643 current_desc->buffer_addr = 644 newpkt->rx_buf->dma_address; 645 646 need_copy = B_FALSE; 647 } else { 648 E1000G_DEBUG_STAT(rx_ring->stat_no_freepkt); 649 } 650 } 651 652 rx_copy: 653 if (need_copy) { 654 /* 655 * No buffers available on free list, 656 * bcopy the data from the buffer and 657 * keep the original buffer. Dont want to 658 * do this.. Yack but no other way 659 */ 660 if ((nmp = allocb(length + E1000G_IPALIGNROOM, 661 BPRI_MED)) == NULL) { 662 /* 663 * The system has no buffers available 664 * to send up the incoming packet, hence 665 * the packet will have to be processed 666 * when there're more buffers available. 667 */ 668 E1000G_STAT(rx_ring->stat_allocb_fail); 669 goto rx_drop; 670 } 671 nmp->b_rptr += E1000G_IPALIGNROOM; 672 nmp->b_wptr += E1000G_IPALIGNROOM; 673 /* 674 * The free list did not have any buffers 675 * available, so, the received packet will 676 * have to be copied into a mp and the original 677 * buffer will have to be retained for future 678 * packet reception. 679 */ 680 bcopy(rx_buf->address, nmp->b_wptr, length); 681 } 682 683 /* 684 * The rx_sw_packet MUST be popped off the 685 * RxSwPacketList before either a putnext or freemsg 686 * is done on the mp that has now been created by the 687 * desballoc. If not, it is possible that the free 688 * routine will get called from the interrupt context 689 * and try to put this packet on the free list 690 */ 691 (p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list); 692 693 ASSERT(nmp != NULL); 694 nmp->b_wptr += length; 695 696 if (rx_ring->rx_mblk == NULL) { 697 /* 698 * TCP/UDP checksum offload and 699 * IP checksum offload 700 */ 701 if (!(current_desc->status & E1000_RXD_STAT_IXSM)) { 702 /* 703 * Check TCP/UDP checksum 704 */ 705 if ((current_desc->status & 706 E1000_RXD_STAT_TCPCS) && 707 !(current_desc->errors & 708 E1000_RXD_ERR_TCPE)) 709 cksumflags |= HCK_FULLCKSUM | 710 HCK_FULLCKSUM_OK; 711 /* 712 * Check IP Checksum 713 */ 714 if ((current_desc->status & 715 E1000_RXD_STAT_IPCS) && 716 !(current_desc->errors & 717 E1000_RXD_ERR_IPE)) 718 cksumflags |= HCK_IPV4_HDRCKSUM; 719 } 720 } 721 722 /* 723 * We need to maintain our packet chain in the global 724 * Adapter structure, for the Rx processing can end 725 * with a fragment that has no EOP set. 726 */ 727 if (rx_ring->rx_mblk == NULL) { 728 /* Get the head of the message chain */ 729 rx_ring->rx_mblk = nmp; 730 rx_ring->rx_mblk_tail = nmp; 731 rx_ring->rx_mblk_len = length; 732 } else { /* Not the first packet */ 733 /* Continue adding buffers */ 734 rx_ring->rx_mblk_tail->b_cont = nmp; 735 rx_ring->rx_mblk_tail = nmp; 736 rx_ring->rx_mblk_len += length; 737 } 738 ASSERT(rx_ring->rx_mblk != NULL); 739 ASSERT(rx_ring->rx_mblk_tail != NULL); 740 ASSERT(rx_ring->rx_mblk_tail->b_cont == NULL); 741 742 /* 743 * Now this MP is ready to travel upwards but some more 744 * fragments are coming. 745 * We will send packet upwards as soon as we get EOP 746 * set on the packet. 747 */ 748 if (!end_of_packet) { 749 /* 750 * continue to get the next descriptor, 751 * Tail would be advanced at the end 752 */ 753 goto rx_next_desc; 754 } 755 756 rx_end_of_packet: 757 /* 758 * Found packet with EOP 759 * Process the last fragment. 760 */ 761 if (cksumflags != 0) { 762 (void) hcksum_assoc(rx_ring->rx_mblk, 763 NULL, NULL, 0, 0, 0, 0, cksumflags, 0); 764 cksumflags = 0; 765 } 766 767 /* 768 * Count packets that span multi-descriptors 769 */ 770 E1000G_DEBUG_STAT_COND(rx_ring->stat_multi_desc, 771 (rx_ring->rx_mblk->b_cont != NULL)); 772 773 /* 774 * Append to list to send upstream 775 */ 776 if (ret_mp == NULL) { 777 ret_mp = ret_nmp = rx_ring->rx_mblk; 778 } else { 779 ret_nmp->b_next = rx_ring->rx_mblk; 780 ret_nmp = rx_ring->rx_mblk; 781 } 782 ret_nmp->b_next = NULL; 783 784 rx_ring->rx_mblk = NULL; 785 rx_ring->rx_mblk_tail = NULL; 786 rx_ring->rx_mblk_len = 0; 787 788 pkt_count++; 789 790 rx_next_desc: 791 /* 792 * Zero out the receive descriptors status 793 */ 794 current_desc->status = 0; 795 796 if (current_desc == rx_ring->rbd_last) 797 rx_ring->rbd_next = rx_ring->rbd_first; 798 else 799 rx_ring->rbd_next++; 800 801 last_desc = current_desc; 802 current_desc = rx_ring->rbd_next; 803 804 /* 805 * Put the buffer that we just indicated back 806 * at the end of our list 807 */ 808 QUEUE_PUSH_TAIL(&rx_ring->recv_list, 809 &packet->Link); 810 } /* while loop */ 811 812 /* Sync the Rx descriptor DMA buffers */ 813 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 814 0, 0, DDI_DMA_SYNC_FORDEV); 815 816 /* 817 * Advance the E1000's Receive Queue #0 "Tail Pointer". 818 */ 819 E1000_WRITE_REG(hw, E1000_RDT, 820 (uint32_t)(last_desc - rx_ring->rbd_first)); 821 822 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 823 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 824 Adapter->chip_state = E1000G_ERROR; 825 } 826 827 Adapter->rx_pkt_cnt = pkt_count; 828 829 return (ret_mp); 830 831 rx_drop: 832 /* 833 * Zero out the receive descriptors status 834 */ 835 current_desc->status = 0; 836 837 /* Sync the Rx descriptor DMA buffers */ 838 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 839 0, 0, DDI_DMA_SYNC_FORDEV); 840 841 if (current_desc == rx_ring->rbd_last) 842 rx_ring->rbd_next = rx_ring->rbd_first; 843 else 844 rx_ring->rbd_next++; 845 846 last_desc = current_desc; 847 848 (p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list); 849 850 QUEUE_PUSH_TAIL(&rx_ring->recv_list, &packet->Link); 851 /* 852 * Reclaim all old buffers already allocated during 853 * Jumbo receives.....for incomplete reception 854 */ 855 if (rx_ring->rx_mblk != NULL) { 856 freemsg(rx_ring->rx_mblk); 857 rx_ring->rx_mblk = NULL; 858 rx_ring->rx_mblk_tail = NULL; 859 rx_ring->rx_mblk_len = 0; 860 } 861 /* 862 * Advance the E1000's Receive Queue #0 "Tail Pointer". 863 */ 864 E1000_WRITE_REG(hw, E1000_RDT, 865 (uint32_t)(last_desc - rx_ring->rbd_first)); 866 867 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 868 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 869 Adapter->chip_state = E1000G_ERROR; 870 } 871 872 return (ret_mp); 873 } 874