xref: /titanic_51/usr/src/uts/common/io/cxgbe/t4nex/osdep.h (revision 56b2bdd1f04d465cfe4a95b88ae5cba5884154e4)
1*56b2bdd1SGireesh Nagabhushana /*
2*56b2bdd1SGireesh Nagabhushana  * This file and its contents are supplied under the terms of the
3*56b2bdd1SGireesh Nagabhushana  * Common Development and Distribution License ("CDDL"), version 1.0.
4*56b2bdd1SGireesh Nagabhushana  * You may only use this file in accordance with the terms of version
5*56b2bdd1SGireesh Nagabhushana  * 1.0 of the CDDL.
6*56b2bdd1SGireesh Nagabhushana  *
7*56b2bdd1SGireesh Nagabhushana  * A full copy of the text of the CDDL should have accompanied this
8*56b2bdd1SGireesh Nagabhushana  * source. A copy of the CDDL is also available via the Internet at
9*56b2bdd1SGireesh Nagabhushana  * http://www.illumos.org/license/CDDL.
10*56b2bdd1SGireesh Nagabhushana  */
11*56b2bdd1SGireesh Nagabhushana 
12*56b2bdd1SGireesh Nagabhushana /*
13*56b2bdd1SGireesh Nagabhushana  * This file is part of the Chelsio T4 support code.
14*56b2bdd1SGireesh Nagabhushana  *
15*56b2bdd1SGireesh Nagabhushana  * Copyright (C) 2010-2013 Chelsio Communications.  All rights reserved.
16*56b2bdd1SGireesh Nagabhushana  *
17*56b2bdd1SGireesh Nagabhushana  * This program is distributed in the hope that it will be useful, but WITHOUT
18*56b2bdd1SGireesh Nagabhushana  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19*56b2bdd1SGireesh Nagabhushana  * FITNESS FOR A PARTICULAR PURPOSE.  See the LICENSE file included in this
20*56b2bdd1SGireesh Nagabhushana  * release for licensing terms and conditions.
21*56b2bdd1SGireesh Nagabhushana  */
22*56b2bdd1SGireesh Nagabhushana 
23*56b2bdd1SGireesh Nagabhushana #ifndef __CXGBE_OSDEP_H
24*56b2bdd1SGireesh Nagabhushana #define	__CXGBE_OSDEP_H
25*56b2bdd1SGireesh Nagabhushana 
26*56b2bdd1SGireesh Nagabhushana #include <sys/ddi.h>
27*56b2bdd1SGireesh Nagabhushana #include <sys/sunddi.h>
28*56b2bdd1SGireesh Nagabhushana #include <sys/byteorder.h>
29*56b2bdd1SGireesh Nagabhushana #include <sys/cmn_err.h>
30*56b2bdd1SGireesh Nagabhushana #include <sys/pcie.h>
31*56b2bdd1SGireesh Nagabhushana #include <sys/sysmacros.h>
32*56b2bdd1SGireesh Nagabhushana #include <sys/inttypes.h>
33*56b2bdd1SGireesh Nagabhushana 
34*56b2bdd1SGireesh Nagabhushana /* sys/user.h defines u, and that bothers us. */
35*56b2bdd1SGireesh Nagabhushana #undef u
36*56b2bdd1SGireesh Nagabhushana 
37*56b2bdd1SGireesh Nagabhushana #define	isdigit(x) ((x) >= '0' && (x) <= '9')
38*56b2bdd1SGireesh Nagabhushana #define	isspace(x) ((x) == ' ' || (x) == '\t')
39*56b2bdd1SGireesh Nagabhushana #define	toupper(x) (((x) >= 'a' && (x) <= 'z') ? (x) - 'a' + 'A' : (x))
40*56b2bdd1SGireesh Nagabhushana #define	fls(x) ddi_fls(x)
41*56b2bdd1SGireesh Nagabhushana 
42*56b2bdd1SGireesh Nagabhushana #define	CH_ERR(sc, ...)		cxgb_printf(sc->dip, CE_WARN, ##__VA_ARGS__)
43*56b2bdd1SGireesh Nagabhushana #define	CH_WARN(sc, ...)	cxgb_printf(sc->dip, CE_WARN, ##__VA_ARGS__)
44*56b2bdd1SGireesh Nagabhushana #define	CH_WARN_RATELIMIT(sc, ...) cxgb_printf(sc->dip, CE_WARN, ##__VA_ARGS__)
45*56b2bdd1SGireesh Nagabhushana #define	CH_ALERT(sc, ...)	cxgb_printf(sc->dip, CE_NOTE, ##__VA_ARGS__)
46*56b2bdd1SGireesh Nagabhushana 
47*56b2bdd1SGireesh Nagabhushana #define	MII_BMCR	0x00
48*56b2bdd1SGireesh Nagabhushana #define	MII_BMSR	0x01
49*56b2bdd1SGireesh Nagabhushana #define	MII_PHYSID1	0x02
50*56b2bdd1SGireesh Nagabhushana #define	MII_PHYSID2	0x03
51*56b2bdd1SGireesh Nagabhushana #define	MII_ADVERTISE	0x04
52*56b2bdd1SGireesh Nagabhushana #define	MII_LPA		0x05
53*56b2bdd1SGireesh Nagabhushana #define	MII_EXPANSION	0x06
54*56b2bdd1SGireesh Nagabhushana #define	MII_CTRL1000	0x09
55*56b2bdd1SGireesh Nagabhushana #define	MII_DCOUNTER	0x12
56*56b2bdd1SGireesh Nagabhushana #define	MII_FCSCOUNTER	0x13
57*56b2bdd1SGireesh Nagabhushana #define	MII_NWAYTEST	0x14
58*56b2bdd1SGireesh Nagabhushana #define	MII_RERRCOUNTER	0x15
59*56b2bdd1SGireesh Nagabhushana #define	MII_SREVISION	0x16
60*56b2bdd1SGireesh Nagabhushana #define	MII_RESV1	0x17
61*56b2bdd1SGireesh Nagabhushana #define	MII_LBRERROR	0x18
62*56b2bdd1SGireesh Nagabhushana #define	MII_PHYADDR	0x19
63*56b2bdd1SGireesh Nagabhushana #define	MII_RESV2	0x1a
64*56b2bdd1SGireesh Nagabhushana #define	MII_TPISTATUS	0x1b
65*56b2bdd1SGireesh Nagabhushana #define	MII_NCONFIG	0x1c
66*56b2bdd1SGireesh Nagabhushana 
67*56b2bdd1SGireesh Nagabhushana #define	BMCR_RESV	0x007f
68*56b2bdd1SGireesh Nagabhushana #define	BMCR_SPEED1000	0x0040
69*56b2bdd1SGireesh Nagabhushana #define	BMCR_CTST	0x0080
70*56b2bdd1SGireesh Nagabhushana #define	BMCR_FULLDPLX	0x0100
71*56b2bdd1SGireesh Nagabhushana #define	BMCR_ANRESTART	0x0200
72*56b2bdd1SGireesh Nagabhushana #define	BMCR_ISOLATE	0x0400
73*56b2bdd1SGireesh Nagabhushana #define	BMCR_PDOWN	0x0800
74*56b2bdd1SGireesh Nagabhushana #define	BMCR_ANENABLE	0x1000
75*56b2bdd1SGireesh Nagabhushana #define	BMCR_SPEED100	0x2000
76*56b2bdd1SGireesh Nagabhushana #define	BMCR_LOOPBACK	0x4000
77*56b2bdd1SGireesh Nagabhushana #define	BMCR_RESET	0x8000
78*56b2bdd1SGireesh Nagabhushana 
79*56b2bdd1SGireesh Nagabhushana #define	BMSR_ERCAP		0x0001
80*56b2bdd1SGireesh Nagabhushana #define	BMSR_JCD		0x0002
81*56b2bdd1SGireesh Nagabhushana #define	BMSR_LSTATUS		0x0004
82*56b2bdd1SGireesh Nagabhushana #define	BMSR_ANEGCAPABLE	0x0008
83*56b2bdd1SGireesh Nagabhushana #define	BMSR_RFAULT		0x0010
84*56b2bdd1SGireesh Nagabhushana #define	BMSR_ANEGCOMPLETE	0x0020
85*56b2bdd1SGireesh Nagabhushana #define	BMSR_RESV		0x07c0
86*56b2bdd1SGireesh Nagabhushana #define	BMSR_10HALF		0x0800
87*56b2bdd1SGireesh Nagabhushana #define	BMSR_10FULL		0x1000
88*56b2bdd1SGireesh Nagabhushana #define	BMSR_100HALF		0x2000
89*56b2bdd1SGireesh Nagabhushana #define	BMSR_100FULL		0x4000
90*56b2bdd1SGireesh Nagabhushana #define	BMSR_100BASE4		0x8000
91*56b2bdd1SGireesh Nagabhushana 
92*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_SLCT		0x001f
93*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_CSMA		0x0001
94*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_10HALF	0x0020
95*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000XFULL	0x0020
96*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_10FULL	0x0040
97*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000XHALF	0x0040
98*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_100HALF	0x0080
99*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000XPAUSE	0x0080
100*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_100FULL	0x0100
101*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000XPSE_ASYM 0x0100
102*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_100BASE4	0x0200
103*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_PAUSE_CAP	0x0400
104*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_PAUSE_ASYM	0x0800
105*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_RESV		0x1c00
106*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_RFAULT	0x2000
107*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_LPACK		0x4000
108*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_NPAGE		0x8000
109*56b2bdd1SGireesh Nagabhushana 
110*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000FULL	0x0200
111*56b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000HALF	0x0100
112*56b2bdd1SGireesh Nagabhushana 
113*56b2bdd1SGireesh Nagabhushana #define	PCI_CAP_ID_EXP		PCI_CAP_ID_PCI_E
114*56b2bdd1SGireesh Nagabhushana #define	PCI_EXP_DEVCTL		PCIE_DEVCTL
115*56b2bdd1SGireesh Nagabhushana #define	PCI_EXP_DEVCTL_PAYLOAD	PCIE_DEVCTL_MAX_PAYLOAD_MASK
116*56b2bdd1SGireesh Nagabhushana #define	PCI_EXP_DEVCTL_READRQ	PCIE_DEVCTL_MAX_READ_REQ_MASK
117*56b2bdd1SGireesh Nagabhushana #define	PCI_EXP_LNKCTL		PCIE_LINKCTL
118*56b2bdd1SGireesh Nagabhushana #define	PCI_EXP_LNKSTA		PCIE_LINKSTS
119*56b2bdd1SGireesh Nagabhushana #define	PCI_EXP_LNKSTA_CLS	PCIE_LINKSTS_SPEED_MASK
120*56b2bdd1SGireesh Nagabhushana #define	PCI_EXP_LNKSTA_NLW	PCIE_LINKSTS_NEG_WIDTH_MASK
121*56b2bdd1SGireesh Nagabhushana 
122*56b2bdd1SGireesh Nagabhushana #define	PCI_VPD_ADDR	2
123*56b2bdd1SGireesh Nagabhushana #define	PCI_VPD_ADDR_F	0x8000
124*56b2bdd1SGireesh Nagabhushana #define	PCI_VPD_DATA	4
125*56b2bdd1SGireesh Nagabhushana 
126*56b2bdd1SGireesh Nagabhushana #define	__devinit
127*56b2bdd1SGireesh Nagabhushana #ifndef ARRAY_SIZE
128*56b2bdd1SGireesh Nagabhushana #define	ARRAY_SIZE(x) (sizeof (x) / sizeof ((x)[0]))
129*56b2bdd1SGireesh Nagabhushana #endif
130*56b2bdd1SGireesh Nagabhushana #define	DIV_ROUND_UP(x, y) howmany(x, y)
131*56b2bdd1SGireesh Nagabhushana 
132*56b2bdd1SGireesh Nagabhushana #define	udelay(x) drv_usecwait(x)
133*56b2bdd1SGireesh Nagabhushana #define	msleep(x) delay(drv_usectohz(1000ULL * (x)))
134*56b2bdd1SGireesh Nagabhushana #define	mdelay(x) drv_usecwait(1000UL * (x))
135*56b2bdd1SGireesh Nagabhushana 
136*56b2bdd1SGireesh Nagabhushana #define	le16_to_cpu(x) LE_16((uint16_t)(x))
137*56b2bdd1SGireesh Nagabhushana #define	le32_to_cpu(x) LE_32((uint32_t)(x))
138*56b2bdd1SGireesh Nagabhushana #define	le64_to_cpu(x) LE_64((uint64_t)(x))
139*56b2bdd1SGireesh Nagabhushana #define	cpu_to_le16(x) LE_16((uint16_t)(x))
140*56b2bdd1SGireesh Nagabhushana #define	cpu_to_le32(x) LE_32((uint32_t)(x))
141*56b2bdd1SGireesh Nagabhushana #define	cpu_to_le64(x) LE_64((uint64_t)(x))
142*56b2bdd1SGireesh Nagabhushana #define	be16_to_cpu(x) BE_16((uint16_t)(x))
143*56b2bdd1SGireesh Nagabhushana #define	be32_to_cpu(x) BE_32((uint32_t)(x))
144*56b2bdd1SGireesh Nagabhushana #define	be64_to_cpu(x) BE_64((uint64_t)(x))
145*56b2bdd1SGireesh Nagabhushana #define	cpu_to_be16(x) BE_16((uint16_t)(x))
146*56b2bdd1SGireesh Nagabhushana #define	cpu_to_be32(x) BE_32((uint32_t)(x))
147*56b2bdd1SGireesh Nagabhushana #define	cpu_to_be64(x) BE_64((uint64_t)(x))
148*56b2bdd1SGireesh Nagabhushana #define	swab32(x) BSWAP_32(x)
149*56b2bdd1SGireesh Nagabhushana 
150*56b2bdd1SGireesh Nagabhushana typedef uint8_t 	u8;
151*56b2bdd1SGireesh Nagabhushana typedef uint16_t 	u16;
152*56b2bdd1SGireesh Nagabhushana typedef uint32_t 	u32;
153*56b2bdd1SGireesh Nagabhushana typedef uint64_t 	u64;
154*56b2bdd1SGireesh Nagabhushana 
155*56b2bdd1SGireesh Nagabhushana typedef uint8_t		__u8;
156*56b2bdd1SGireesh Nagabhushana typedef uint16_t	__u16;
157*56b2bdd1SGireesh Nagabhushana typedef uint32_t	__u32;
158*56b2bdd1SGireesh Nagabhushana typedef uint64_t	__u64;
159*56b2bdd1SGireesh Nagabhushana typedef uint8_t		__be8;
160*56b2bdd1SGireesh Nagabhushana typedef uint16_t	__be16;
161*56b2bdd1SGireesh Nagabhushana typedef uint32_t	__be32;
162*56b2bdd1SGireesh Nagabhushana typedef uint64_t	__be64;
163*56b2bdd1SGireesh Nagabhushana 
164*56b2bdd1SGireesh Nagabhushana typedef boolean_t	bool;
165*56b2bdd1SGireesh Nagabhushana #define	true		B_TRUE
166*56b2bdd1SGireesh Nagabhushana #define	false		B_FALSE
167*56b2bdd1SGireesh Nagabhushana 
168*56b2bdd1SGireesh Nagabhushana #if defined(__sparc)
169*56b2bdd1SGireesh Nagabhushana #define	__BIG_ENDIAN_BITFIELD
170*56b2bdd1SGireesh Nagabhushana #define	PAGE_SIZE 8192
171*56b2bdd1SGireesh Nagabhushana #define	PAGE_SHIFT 13
172*56b2bdd1SGireesh Nagabhushana #define	CACHE_LINE 64
173*56b2bdd1SGireesh Nagabhushana #else
174*56b2bdd1SGireesh Nagabhushana #define	__LITTLE_ENDIAN_BITFIELD
175*56b2bdd1SGireesh Nagabhushana #define	PAGE_SIZE 4096
176*56b2bdd1SGireesh Nagabhushana #define	PAGE_SHIFT 12
177*56b2bdd1SGireesh Nagabhushana #define	CACHE_LINE 32
178*56b2bdd1SGireesh Nagabhushana #endif
179*56b2bdd1SGireesh Nagabhushana 
180*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_10baseT_Half		(1 << 0)
181*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_10baseT_Full		(1 << 1)
182*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_100baseT_Half		(1 << 2)
183*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_100baseT_Full		(1 << 3)
184*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_1000baseT_Half	(1 << 4)
185*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_1000baseT_Full	(1 << 5)
186*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_Autoneg		(1 << 6)
187*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_TP			(1 << 7)
188*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_AUI			(1 << 8)
189*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_MII			(1 << 9)
190*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_FIBRE			(1 << 10)
191*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_BNC			(1 << 11)
192*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_10000baseT_Full	(1 << 12)
193*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_Pause			(1 << 13)
194*56b2bdd1SGireesh Nagabhushana #define	SUPPORTED_Asym_Pause		(1 << 14)
195*56b2bdd1SGireesh Nagabhushana 
196*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_10baseT_Half		(1 << 0)
197*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_10baseT_Full		(1 << 1)
198*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_100baseT_Half	(1 << 2)
199*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_100baseT_Full	(1 << 3)
200*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_1000baseT_Half	(1 << 4)
201*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_1000baseT_Full	(1 << 5)
202*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_Autoneg		(1 << 6)
203*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_TP			(1 << 7)
204*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_AUI			(1 << 8)
205*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_MII			(1 << 9)
206*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_FIBRE		(1 << 10)
207*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_BNC			(1 << 11)
208*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_10000baseT_Full	(1 << 12)
209*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_Pause		(1 << 13)
210*56b2bdd1SGireesh Nagabhushana #define	ADVERTISED_Asym_Pause		(1 << 14)
211*56b2bdd1SGireesh Nagabhushana 
212*56b2bdd1SGireesh Nagabhushana #define	AUTONEG_DISABLE		0
213*56b2bdd1SGireesh Nagabhushana #define	AUTONEG_ENABLE		1
214*56b2bdd1SGireesh Nagabhushana #define	SPEED_10		10
215*56b2bdd1SGireesh Nagabhushana #define	SPEED_100		100
216*56b2bdd1SGireesh Nagabhushana #define	SPEED_1000		1000
217*56b2bdd1SGireesh Nagabhushana #define	SPEED_10000		10000
218*56b2bdd1SGireesh Nagabhushana #define	DUPLEX_HALF		0
219*56b2bdd1SGireesh Nagabhushana #define	DUPLEX_FULL		1
220*56b2bdd1SGireesh Nagabhushana 
221*56b2bdd1SGireesh Nagabhushana int ilog2(long x);
222*56b2bdd1SGireesh Nagabhushana unsigned char *strstrip(unsigned char *s);
223*56b2bdd1SGireesh Nagabhushana 
224*56b2bdd1SGireesh Nagabhushana #endif /* __CXGBE_OSDEP_H */
225