15cff7825Smh27603 /* 25cff7825Smh27603 * CDDL HEADER START 35cff7825Smh27603 * 45cff7825Smh27603 * The contents of this file are subject to the terms of the 55cff7825Smh27603 * Common Development and Distribution License (the "License"). 65cff7825Smh27603 * You may not use this file except in compliance with the License. 75cff7825Smh27603 * 85cff7825Smh27603 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 95cff7825Smh27603 * or http://www.opensolaris.org/os/licensing. 105cff7825Smh27603 * See the License for the specific language governing permissions 115cff7825Smh27603 * and limitations under the License. 125cff7825Smh27603 * 135cff7825Smh27603 * When distributing Covered Code, include this CDDL HEADER in each 145cff7825Smh27603 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 155cff7825Smh27603 * If applicable, add the following below this CDDL HEADER, with the 165cff7825Smh27603 * fields enclosed by brackets "[]" replaced with your own identifying 175cff7825Smh27603 * information: Portions Copyright [yyyy] [name of copyright owner] 185cff7825Smh27603 * 195cff7825Smh27603 * CDDL HEADER END 205cff7825Smh27603 */ 215cff7825Smh27603 /* 22fcddbe1fSMark Haywood * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 235cff7825Smh27603 * Use is subject to license terms. 245cff7825Smh27603 */ 255cff7825Smh27603 265cff7825Smh27603 /* 275cff7825Smh27603 * CPU Device driver. The driver is not DDI-compliant. 285cff7825Smh27603 * 295cff7825Smh27603 * The driver supports following features: 305cff7825Smh27603 * - Power management. 315cff7825Smh27603 */ 325cff7825Smh27603 335cff7825Smh27603 #include <sys/types.h> 345cff7825Smh27603 #include <sys/param.h> 355cff7825Smh27603 #include <sys/errno.h> 365cff7825Smh27603 #include <sys/modctl.h> 375cff7825Smh27603 #include <sys/kmem.h> 385cff7825Smh27603 #include <sys/conf.h> 395cff7825Smh27603 #include <sys/cmn_err.h> 405cff7825Smh27603 #include <sys/stat.h> 415cff7825Smh27603 #include <sys/debug.h> 425cff7825Smh27603 #include <sys/systm.h> 435cff7825Smh27603 #include <sys/ddi.h> 445cff7825Smh27603 #include <sys/sunddi.h> 45c210ded4Sesaxe #include <sys/sdt.h> 46*0e751525SEric Saxe #include <sys/epm.h> 475cff7825Smh27603 #include <sys/machsystm.h> 485cff7825Smh27603 #include <sys/x_call.h> 497f606aceSMark Haywood #include <sys/cpudrv_mach.h> 505cff7825Smh27603 #include <sys/msacct.h> 515cff7825Smh27603 525cff7825Smh27603 /* 535cff7825Smh27603 * CPU power management 545cff7825Smh27603 * 555cff7825Smh27603 * The supported power saving model is to slow down the CPU (on SPARC by 565cff7825Smh27603 * dividing the CPU clock and on x86 by dropping down a P-state). 575cff7825Smh27603 * Periodically we determine the amount of time the CPU is running 585cff7825Smh27603 * idle thread and threads in user mode during the last quantum. If the idle 595cff7825Smh27603 * thread was running less than its low water mark for current speed for 605cff7825Smh27603 * number of consecutive sampling periods, or number of running threads in 615cff7825Smh27603 * user mode are above its high water mark, we arrange to go to the higher 625cff7825Smh27603 * speed. If the idle thread was running more than its high water mark without 635cff7825Smh27603 * dropping a number of consecutive times below the mark, and number of threads 645cff7825Smh27603 * running in user mode are below its low water mark, we arrange to go to the 655cff7825Smh27603 * next lower speed. While going down, we go through all the speeds. While 665cff7825Smh27603 * going up we go to the maximum speed to minimize impact on the user, but have 675cff7825Smh27603 * provisions in the driver to go to other speeds. 685cff7825Smh27603 * 695cff7825Smh27603 * The driver does not have knowledge of a particular implementation of this 705cff7825Smh27603 * scheme and will work with all CPUs supporting this model. On SPARC, the 715cff7825Smh27603 * driver determines supported speeds by looking at 'clock-divisors' property 725cff7825Smh27603 * created by OBP. On x86, the driver retrieves the supported speeds from 735cff7825Smh27603 * ACPI. 745cff7825Smh27603 */ 755cff7825Smh27603 765cff7825Smh27603 /* 775cff7825Smh27603 * Configuration function prototypes and data structures 785cff7825Smh27603 */ 795cff7825Smh27603 static int cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 805cff7825Smh27603 static int cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 815cff7825Smh27603 static int cpudrv_power(dev_info_t *dip, int comp, int level); 825cff7825Smh27603 835cff7825Smh27603 struct dev_ops cpudrv_ops = { 845cff7825Smh27603 DEVO_REV, /* rev */ 855cff7825Smh27603 0, /* refcnt */ 865cff7825Smh27603 nodev, /* getinfo */ 875cff7825Smh27603 nulldev, /* identify */ 885cff7825Smh27603 nulldev, /* probe */ 895cff7825Smh27603 cpudrv_attach, /* attach */ 905cff7825Smh27603 cpudrv_detach, /* detach */ 915cff7825Smh27603 nodev, /* reset */ 925cff7825Smh27603 (struct cb_ops *)NULL, /* cb_ops */ 935cff7825Smh27603 (struct bus_ops *)NULL, /* bus_ops */ 9419397407SSherry Moore cpudrv_power, /* power */ 9519397407SSherry Moore ddi_quiesce_not_needed, /* quiesce */ 965cff7825Smh27603 }; 975cff7825Smh27603 985cff7825Smh27603 static struct modldrv modldrv = { 995cff7825Smh27603 &mod_driverops, /* modops */ 1007f606aceSMark Haywood "CPU Driver", /* linkinfo */ 1015cff7825Smh27603 &cpudrv_ops, /* dev_ops */ 1025cff7825Smh27603 }; 1035cff7825Smh27603 1045cff7825Smh27603 static struct modlinkage modlinkage = { 1055cff7825Smh27603 MODREV_1, /* rev */ 1065cff7825Smh27603 &modldrv, /* linkage */ 1075cff7825Smh27603 NULL 1085cff7825Smh27603 }; 1095cff7825Smh27603 1105cff7825Smh27603 /* 1115cff7825Smh27603 * Function prototypes 1125cff7825Smh27603 */ 113*0e751525SEric Saxe static int cpudrv_init(cpudrv_devstate_t *cpudsp); 114*0e751525SEric Saxe static void cpudrv_free(cpudrv_devstate_t *cpudsp); 115*0e751525SEric Saxe static int cpudrv_comp_create(cpudrv_devstate_t *cpudsp); 116*0e751525SEric Saxe static void cpudrv_monitor_disp(void *arg); 117*0e751525SEric Saxe static void cpudrv_monitor(void *arg); 1185cff7825Smh27603 1195cff7825Smh27603 /* 1205cff7825Smh27603 * Driver global variables 1215cff7825Smh27603 */ 1225cff7825Smh27603 uint_t cpudrv_debug = 0; 1235cff7825Smh27603 void *cpudrv_state; 124*0e751525SEric Saxe static uint_t cpudrv_idle_hwm = CPUDRV_IDLE_HWM; 125*0e751525SEric Saxe static uint_t cpudrv_idle_lwm = CPUDRV_IDLE_LWM; 126*0e751525SEric Saxe static uint_t cpudrv_idle_buf_zone = CPUDRV_IDLE_BUF_ZONE; 127*0e751525SEric Saxe static uint_t cpudrv_idle_bhwm_cnt_max = CPUDRV_IDLE_BHWM_CNT_MAX; 128*0e751525SEric Saxe static uint_t cpudrv_idle_blwm_cnt_max = CPUDRV_IDLE_BLWM_CNT_MAX; 129*0e751525SEric Saxe static uint_t cpudrv_user_hwm = CPUDRV_USER_HWM; 130*0e751525SEric Saxe 131*0e751525SEric Saxe boolean_t cpudrv_enabled = B_TRUE; 1325cff7825Smh27603 1335cff7825Smh27603 /* 1345cff7825Smh27603 * cpudrv_direct_pm allows user applications to directly control the 1355cff7825Smh27603 * power state transitions (direct pm) without following the normal 1365cff7825Smh27603 * direct pm protocol. This is needed because the normal protocol 1375cff7825Smh27603 * requires that a device only be lowered when it is idle, and be 1385cff7825Smh27603 * brought up when it request to do so by calling pm_raise_power(). 1395cff7825Smh27603 * Ignoring this protocol is harmless for CPU (other than speed). 1405cff7825Smh27603 * Moreover it might be the case that CPU is never idle or wants 1415cff7825Smh27603 * to be at higher speed because of the addition CPU cycles required 1425cff7825Smh27603 * to run the user application. 1435cff7825Smh27603 * 1445cff7825Smh27603 * The driver will still report idle/busy status to the framework. Although 1455cff7825Smh27603 * framework will ignore this information for direct pm devices and not 1465cff7825Smh27603 * try to bring them down when idle, user applications can still use this 1475cff7825Smh27603 * information if they wants. 1485cff7825Smh27603 * 1495cff7825Smh27603 * In the future, provide an ioctl to control setting of this mode. In 1505cff7825Smh27603 * that case, this variable should move to the state structure and 1515cff7825Smh27603 * be protected by the lock in the state structure. 1525cff7825Smh27603 */ 1535cff7825Smh27603 int cpudrv_direct_pm = 0; 1545cff7825Smh27603 1555cff7825Smh27603 /* 1565cff7825Smh27603 * Arranges for the handler function to be called at the interval suitable 1575cff7825Smh27603 * for current speed. 1585cff7825Smh27603 */ 159*0e751525SEric Saxe #define CPUDRV_MONITOR_INIT(cpudsp) { \ 160*0e751525SEric Saxe if (cpudrv_is_enabled(cpudsp)) { \ 1615cff7825Smh27603 ASSERT(mutex_owned(&(cpudsp)->lock)); \ 1627f606aceSMark Haywood (cpudsp)->cpudrv_pm.timeout_id = \ 163*0e751525SEric Saxe timeout(cpudrv_monitor_disp, \ 1645cff7825Smh27603 (cpudsp), (((cpudsp)->cpudrv_pm.cur_spd == NULL) ? \ 165*0e751525SEric Saxe CPUDRV_QUANT_CNT_OTHR : \ 1665cff7825Smh27603 (cpudsp)->cpudrv_pm.cur_spd->quant_cnt)); \ 1677f606aceSMark Haywood } \ 1685cff7825Smh27603 } 1695cff7825Smh27603 1705cff7825Smh27603 /* 1715cff7825Smh27603 * Arranges for the handler function not to be called back. 1725cff7825Smh27603 */ 173*0e751525SEric Saxe #define CPUDRV_MONITOR_FINI(cpudsp) { \ 1745cff7825Smh27603 timeout_id_t tmp_tid; \ 1755cff7825Smh27603 ASSERT(mutex_owned(&(cpudsp)->lock)); \ 1765cff7825Smh27603 tmp_tid = (cpudsp)->cpudrv_pm.timeout_id; \ 1775cff7825Smh27603 (cpudsp)->cpudrv_pm.timeout_id = 0; \ 1785cff7825Smh27603 mutex_exit(&(cpudsp)->lock); \ 1797f606aceSMark Haywood if (tmp_tid != 0) { \ 1805cff7825Smh27603 (void) untimeout(tmp_tid); \ 1815cff7825Smh27603 mutex_enter(&(cpudsp)->cpudrv_pm.timeout_lock); \ 1825cff7825Smh27603 while ((cpudsp)->cpudrv_pm.timeout_count != 0) \ 1835cff7825Smh27603 cv_wait(&(cpudsp)->cpudrv_pm.timeout_cv, \ 1845cff7825Smh27603 &(cpudsp)->cpudrv_pm.timeout_lock); \ 1855cff7825Smh27603 mutex_exit(&(cpudsp)->cpudrv_pm.timeout_lock); \ 1867f606aceSMark Haywood } \ 1875cff7825Smh27603 mutex_enter(&(cpudsp)->lock); \ 1885cff7825Smh27603 } 1895cff7825Smh27603 1905cff7825Smh27603 int 1915cff7825Smh27603 _init(void) 1925cff7825Smh27603 { 1935cff7825Smh27603 int error; 1945cff7825Smh27603 1955cff7825Smh27603 DPRINTF(D_INIT, (" _init: function called\n")); 1965cff7825Smh27603 if ((error = ddi_soft_state_init(&cpudrv_state, 1975cff7825Smh27603 sizeof (cpudrv_devstate_t), 0)) != 0) { 1985cff7825Smh27603 return (error); 1995cff7825Smh27603 } 2005cff7825Smh27603 2015cff7825Smh27603 if ((error = mod_install(&modlinkage)) != 0) { 2025cff7825Smh27603 ddi_soft_state_fini(&cpudrv_state); 2035cff7825Smh27603 } 2045cff7825Smh27603 2055cff7825Smh27603 /* 2065cff7825Smh27603 * Callbacks used by the PPM driver. 2075cff7825Smh27603 */ 208*0e751525SEric Saxe CPUDRV_SET_PPM_CALLBACKS(); 2095cff7825Smh27603 return (error); 2105cff7825Smh27603 } 2115cff7825Smh27603 2125cff7825Smh27603 int 2135cff7825Smh27603 _fini(void) 2145cff7825Smh27603 { 2155cff7825Smh27603 int error; 2165cff7825Smh27603 2175cff7825Smh27603 DPRINTF(D_FINI, (" _fini: function called\n")); 2185cff7825Smh27603 if ((error = mod_remove(&modlinkage)) == 0) { 2195cff7825Smh27603 ddi_soft_state_fini(&cpudrv_state); 2205cff7825Smh27603 } 2215cff7825Smh27603 2225cff7825Smh27603 return (error); 2235cff7825Smh27603 } 2245cff7825Smh27603 2255cff7825Smh27603 int 2265cff7825Smh27603 _info(struct modinfo *modinfop) 2275cff7825Smh27603 { 2285cff7825Smh27603 return (mod_info(&modlinkage, modinfop)); 2295cff7825Smh27603 } 2305cff7825Smh27603 2315cff7825Smh27603 /* 2325cff7825Smh27603 * Driver attach(9e) entry point. 2335cff7825Smh27603 */ 2345cff7825Smh27603 static int 2355cff7825Smh27603 cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 2365cff7825Smh27603 { 2375cff7825Smh27603 int instance; 2385cff7825Smh27603 cpudrv_devstate_t *cpudsp; 2395cff7825Smh27603 extern pri_t maxclsyspri; 2405cff7825Smh27603 2415cff7825Smh27603 instance = ddi_get_instance(dip); 2425cff7825Smh27603 2435cff7825Smh27603 switch (cmd) { 2445cff7825Smh27603 case DDI_ATTACH: 2455cff7825Smh27603 DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: " 2465cff7825Smh27603 "DDI_ATTACH called\n", instance)); 247*0e751525SEric Saxe if (!cpudrv_is_enabled(NULL)) 2487f606aceSMark Haywood return (DDI_FAILURE); 2495cff7825Smh27603 if (ddi_soft_state_zalloc(cpudrv_state, instance) != 2505cff7825Smh27603 DDI_SUCCESS) { 2515cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 2525cff7825Smh27603 "can't allocate state", instance); 253*0e751525SEric Saxe cpudrv_enabled = B_FALSE; 2545cff7825Smh27603 return (DDI_FAILURE); 2555cff7825Smh27603 } 2565cff7825Smh27603 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == 2575cff7825Smh27603 NULL) { 2585cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 2595cff7825Smh27603 "can't get state", instance); 2605cff7825Smh27603 ddi_soft_state_free(cpudrv_state, instance); 261*0e751525SEric Saxe cpudrv_enabled = B_FALSE; 2625cff7825Smh27603 return (DDI_FAILURE); 2635cff7825Smh27603 } 2645cff7825Smh27603 cpudsp->dip = dip; 2655cff7825Smh27603 2665cff7825Smh27603 /* 2675cff7825Smh27603 * Find CPU number for this dev_info node. 2685cff7825Smh27603 */ 269*0e751525SEric Saxe if (!cpudrv_get_cpu_id(dip, &(cpudsp->cpu_id))) { 2705cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 2715cff7825Smh27603 "can't convert dip to cpu_id", instance); 2725cff7825Smh27603 ddi_soft_state_free(cpudrv_state, instance); 273*0e751525SEric Saxe cpudrv_enabled = B_FALSE; 2745cff7825Smh27603 return (DDI_FAILURE); 2755cff7825Smh27603 } 276*0e751525SEric Saxe if (!cpudrv_mach_init(cpudsp)) { 277*0e751525SEric Saxe cpudrv_enabled = B_FALSE; 2785cff7825Smh27603 return (DDI_FAILURE); 2795cff7825Smh27603 } 280*0e751525SEric Saxe 2817f606aceSMark Haywood mutex_init(&cpudsp->lock, NULL, MUTEX_DRIVER, NULL); 282*0e751525SEric Saxe if (cpudrv_is_enabled(cpudsp)) { 283*0e751525SEric Saxe if (cpudrv_init(cpudsp) != DDI_SUCCESS) { 284*0e751525SEric Saxe cpudrv_enabled = B_FALSE; 285*0e751525SEric Saxe cpudrv_free(cpudsp); 2867f606aceSMark Haywood ddi_soft_state_free(cpudrv_state, instance); 2877f606aceSMark Haywood return (DDI_FAILURE); 2887f606aceSMark Haywood } 289*0e751525SEric Saxe if (cpudrv_comp_create(cpudsp) != DDI_SUCCESS) { 290*0e751525SEric Saxe cpudrv_enabled = B_FALSE; 291*0e751525SEric Saxe cpudrv_free(cpudsp); 2927f606aceSMark Haywood ddi_soft_state_free(cpudrv_state, instance); 2935cff7825Smh27603 return (DDI_FAILURE); 2945cff7825Smh27603 } 2955cff7825Smh27603 if (ddi_prop_update_string(DDI_DEV_T_NONE, 2965cff7825Smh27603 dip, "pm-class", "CPU") != DDI_PROP_SUCCESS) { 297*0e751525SEric Saxe cpudrv_enabled = B_FALSE; 298*0e751525SEric Saxe cpudrv_free(cpudsp); 2997f606aceSMark Haywood ddi_soft_state_free(cpudrv_state, instance); 3005cff7825Smh27603 return (DDI_FAILURE); 3015cff7825Smh27603 } 3025cff7825Smh27603 3035cff7825Smh27603 /* 3047f606aceSMark Haywood * Taskq is used to dispatch routine to monitor CPU 3057f606aceSMark Haywood * activities. 3065cff7825Smh27603 */ 3075cff7825Smh27603 cpudsp->cpudrv_pm.tq = taskq_create_instance( 308*0e751525SEric Saxe "cpudrv_monitor", 309*0e751525SEric Saxe ddi_get_instance(dip), CPUDRV_TASKQ_THREADS, 310*0e751525SEric Saxe (maxclsyspri - 1), CPUDRV_TASKQ_MIN, 311*0e751525SEric Saxe CPUDRV_TASKQ_MAX, 3127f606aceSMark Haywood TASKQ_PREPOPULATE|TASKQ_CPR_SAFE); 3135cff7825Smh27603 3147f606aceSMark Haywood mutex_init(&cpudsp->cpudrv_pm.timeout_lock, NULL, 3157f606aceSMark Haywood MUTEX_DRIVER, NULL); 3167f606aceSMark Haywood cv_init(&cpudsp->cpudrv_pm.timeout_cv, NULL, 3177f606aceSMark Haywood CV_DEFAULT, NULL); 3185cff7825Smh27603 3195cff7825Smh27603 /* 3207f606aceSMark Haywood * Driver needs to assume that CPU is running at 3217f606aceSMark Haywood * unknown speed at DDI_ATTACH and switch it to the 3227f606aceSMark Haywood * needed speed. We assume that initial needed speed 3237f606aceSMark Haywood * is full speed for us. 3245cff7825Smh27603 */ 3255cff7825Smh27603 /* 326*0e751525SEric Saxe * We need to take the lock because cpudrv_monitor() 3275cff7825Smh27603 * will start running in parallel with attach(). 3285cff7825Smh27603 */ 3295cff7825Smh27603 mutex_enter(&cpudsp->lock); 3305cff7825Smh27603 cpudsp->cpudrv_pm.cur_spd = NULL; 33168afbec1Smh27603 cpudsp->cpudrv_pm.pm_started = B_FALSE; 3325cff7825Smh27603 /* 3337f606aceSMark Haywood * We don't call pm_raise_power() directly from attach 3347f606aceSMark Haywood * because driver attach for a slave CPU node can 3357f606aceSMark Haywood * happen before the CPU is even initialized. We just 3367f606aceSMark Haywood * start the monitoring system which understands 33717353130SMark Haywood * unknown speed and moves CPU to top speed when it 33817353130SMark Haywood * has been initialized. 3395cff7825Smh27603 */ 340*0e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 3415cff7825Smh27603 mutex_exit(&cpudsp->lock); 3425cff7825Smh27603 3437f606aceSMark Haywood } 3447f606aceSMark Haywood 345*0e751525SEric Saxe CPUDRV_INSTALL_MAX_CHANGE_HANDLER(cpudsp); 3465cff7825Smh27603 3475cff7825Smh27603 ddi_report_dev(dip); 3485cff7825Smh27603 return (DDI_SUCCESS); 3495cff7825Smh27603 3505cff7825Smh27603 case DDI_RESUME: 3515cff7825Smh27603 DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: " 3525cff7825Smh27603 "DDI_RESUME called\n", instance)); 3537f606aceSMark Haywood 3547f606aceSMark Haywood cpudsp = ddi_get_soft_state(cpudrv_state, instance); 3557f606aceSMark Haywood ASSERT(cpudsp != NULL); 3567f606aceSMark Haywood 3577f606aceSMark Haywood /* 3587f606aceSMark Haywood * Nothing to do for resume, if not doing active PM. 3597f606aceSMark Haywood */ 360*0e751525SEric Saxe if (!cpudrv_is_enabled(cpudsp)) 3617f606aceSMark Haywood return (DDI_SUCCESS); 3627f606aceSMark Haywood 3635cff7825Smh27603 mutex_enter(&cpudsp->lock); 3645cff7825Smh27603 /* 3655cff7825Smh27603 * Driver needs to assume that CPU is running at unknown speed 3665cff7825Smh27603 * at DDI_RESUME and switch it to the needed speed. We assume 3675cff7825Smh27603 * that the needed speed is full speed for us. 3685cff7825Smh27603 */ 3695cff7825Smh27603 cpudsp->cpudrv_pm.cur_spd = NULL; 370*0e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 3715cff7825Smh27603 mutex_exit(&cpudsp->lock); 372*0e751525SEric Saxe CPUDRV_REDEFINE_TOPSPEED(dip); 3735cff7825Smh27603 return (DDI_SUCCESS); 3745cff7825Smh27603 3755cff7825Smh27603 default: 3765cff7825Smh27603 return (DDI_FAILURE); 3775cff7825Smh27603 } 3785cff7825Smh27603 } 3795cff7825Smh27603 3805cff7825Smh27603 /* 3815cff7825Smh27603 * Driver detach(9e) entry point. 3825cff7825Smh27603 */ 3835cff7825Smh27603 static int 3845cff7825Smh27603 cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 3855cff7825Smh27603 { 3865cff7825Smh27603 int instance; 3875cff7825Smh27603 cpudrv_devstate_t *cpudsp; 3885cff7825Smh27603 cpudrv_pm_t *cpupm; 3895cff7825Smh27603 3905cff7825Smh27603 instance = ddi_get_instance(dip); 3915cff7825Smh27603 3925cff7825Smh27603 switch (cmd) { 3935cff7825Smh27603 case DDI_DETACH: 3945cff7825Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: " 3955cff7825Smh27603 "DDI_DETACH called\n", instance)); 3965cff7825Smh27603 /* 3975cff7825Smh27603 * If the only thing supported by the driver is power 3985cff7825Smh27603 * management, we can in future enhance the driver and 3995cff7825Smh27603 * framework that loads it to unload the driver when 4005cff7825Smh27603 * user has disabled CPU power management. 4015cff7825Smh27603 */ 4025cff7825Smh27603 return (DDI_FAILURE); 4035cff7825Smh27603 4045cff7825Smh27603 case DDI_SUSPEND: 4055cff7825Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: " 4065cff7825Smh27603 "DDI_SUSPEND called\n", instance)); 4077f606aceSMark Haywood 4087f606aceSMark Haywood cpudsp = ddi_get_soft_state(cpudrv_state, instance); 4097f606aceSMark Haywood ASSERT(cpudsp != NULL); 4107f606aceSMark Haywood 4117f606aceSMark Haywood /* 4127f606aceSMark Haywood * Nothing to do for suspend, if not doing active PM. 4137f606aceSMark Haywood */ 414*0e751525SEric Saxe if (!cpudrv_is_enabled(cpudsp)) 4157f606aceSMark Haywood return (DDI_SUCCESS); 4167f606aceSMark Haywood 4175cff7825Smh27603 /* 4185cff7825Smh27603 * During a checkpoint-resume sequence, framework will 4195cff7825Smh27603 * stop interrupts to quiesce kernel activity. This will 4205cff7825Smh27603 * leave our monitoring system ineffective. Handle this 4215cff7825Smh27603 * by stopping our monitoring system and bringing CPU 4225cff7825Smh27603 * to full speed. In case we are in special direct pm 4235cff7825Smh27603 * mode, we leave the CPU at whatever speed it is. This 4245cff7825Smh27603 * is harmless other than speed. 4255cff7825Smh27603 */ 4265cff7825Smh27603 mutex_enter(&cpudsp->lock); 4275cff7825Smh27603 cpupm = &(cpudsp->cpudrv_pm); 4285cff7825Smh27603 4295cff7825Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: DDI_SUSPEND - " 43017353130SMark Haywood "cur_spd %d, topspeed %d\n", instance, 43117353130SMark Haywood cpupm->cur_spd->pm_level, 432*0e751525SEric Saxe CPUDRV_TOPSPEED(cpupm)->pm_level)); 4335cff7825Smh27603 434*0e751525SEric Saxe CPUDRV_MONITOR_FINI(cpudsp); 4355cff7825Smh27603 43617353130SMark Haywood if (!cpudrv_direct_pm && (cpupm->cur_spd != 437*0e751525SEric Saxe CPUDRV_TOPSPEED(cpupm))) { 4385cff7825Smh27603 if (cpupm->pm_busycnt < 1) { 439*0e751525SEric Saxe if ((pm_busy_component(dip, CPUDRV_COMP_NUM) 4405cff7825Smh27603 == DDI_SUCCESS)) { 4415cff7825Smh27603 cpupm->pm_busycnt++; 4425cff7825Smh27603 } else { 443*0e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 4445cff7825Smh27603 mutex_exit(&cpudsp->lock); 4455cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_detach: " 4465cff7825Smh27603 "instance %d: can't busy CPU " 4475cff7825Smh27603 "component", instance); 4485cff7825Smh27603 return (DDI_FAILURE); 4495cff7825Smh27603 } 4505cff7825Smh27603 } 4515cff7825Smh27603 mutex_exit(&cpudsp->lock); 452*0e751525SEric Saxe if (pm_raise_power(dip, CPUDRV_COMP_NUM, 453*0e751525SEric Saxe CPUDRV_TOPSPEED(cpupm)->pm_level) != 45417353130SMark Haywood DDI_SUCCESS) { 4555cff7825Smh27603 mutex_enter(&cpudsp->lock); 456*0e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 4575cff7825Smh27603 mutex_exit(&cpudsp->lock); 4585cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_detach: instance %d: " 45917353130SMark Haywood "can't raise CPU power level to %d", 46017353130SMark Haywood instance, 461*0e751525SEric Saxe CPUDRV_TOPSPEED(cpupm)->pm_level); 4625cff7825Smh27603 return (DDI_FAILURE); 4635cff7825Smh27603 } else { 4645cff7825Smh27603 return (DDI_SUCCESS); 4655cff7825Smh27603 } 4665cff7825Smh27603 } else { 4675cff7825Smh27603 mutex_exit(&cpudsp->lock); 4685cff7825Smh27603 return (DDI_SUCCESS); 4695cff7825Smh27603 } 4705cff7825Smh27603 4715cff7825Smh27603 default: 4725cff7825Smh27603 return (DDI_FAILURE); 4735cff7825Smh27603 } 4745cff7825Smh27603 } 4755cff7825Smh27603 4765cff7825Smh27603 /* 4775cff7825Smh27603 * Driver power(9e) entry point. 4785cff7825Smh27603 * 4795cff7825Smh27603 * Driver's notion of current power is set *only* in power(9e) entry point 4805cff7825Smh27603 * after actual power change operation has been successfully completed. 4815cff7825Smh27603 */ 4825cff7825Smh27603 /* ARGSUSED */ 4835cff7825Smh27603 static int 4845cff7825Smh27603 cpudrv_power(dev_info_t *dip, int comp, int level) 4855cff7825Smh27603 { 4865cff7825Smh27603 int instance; 4875cff7825Smh27603 cpudrv_devstate_t *cpudsp; 488*0e751525SEric Saxe cpudrv_pm_t *cpudrvpm; 4895cff7825Smh27603 cpudrv_pm_spd_t *new_spd; 4905cff7825Smh27603 boolean_t is_ready; 4915cff7825Smh27603 int ret; 4925cff7825Smh27603 4935cff7825Smh27603 instance = ddi_get_instance(dip); 4945cff7825Smh27603 4955cff7825Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: level %d\n", 4965cff7825Smh27603 instance, level)); 497*0e751525SEric Saxe 4985cff7825Smh27603 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == NULL) { 499*0e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_power: instance %d: can't " 500*0e751525SEric Saxe "get state", instance); 5015cff7825Smh27603 return (DDI_FAILURE); 5025cff7825Smh27603 } 5035cff7825Smh27603 5045cff7825Smh27603 mutex_enter(&cpudsp->lock); 505*0e751525SEric Saxe cpudrvpm = &(cpudsp->cpudrv_pm); 5065cff7825Smh27603 5075cff7825Smh27603 /* 5085cff7825Smh27603 * In normal operation, we fail if we are busy and request is 5095cff7825Smh27603 * to lower the power level. We let this go through if the driver 5105cff7825Smh27603 * is in special direct pm mode. On x86, we also let this through 5117f606aceSMark Haywood * if the change is due to a request to govern the max speed. 5125cff7825Smh27603 */ 513*0e751525SEric Saxe if (!cpudrv_direct_pm && (cpudrvpm->pm_busycnt >= 1) && 514*0e751525SEric Saxe !cpudrv_is_governor_thread(cpudrvpm)) { 515*0e751525SEric Saxe if ((cpudrvpm->cur_spd != NULL) && 516*0e751525SEric Saxe (level < cpudrvpm->cur_spd->pm_level)) { 5175cff7825Smh27603 mutex_exit(&cpudsp->lock); 5185cff7825Smh27603 return (DDI_FAILURE); 5195cff7825Smh27603 } 5205cff7825Smh27603 } 5215cff7825Smh27603 522*0e751525SEric Saxe for (new_spd = cpudrvpm->head_spd; new_spd; new_spd = 523*0e751525SEric Saxe new_spd->down_spd) { 5245cff7825Smh27603 if (new_spd->pm_level == level) 5255cff7825Smh27603 break; 5265cff7825Smh27603 } 5275cff7825Smh27603 if (!new_spd) { 528*0e751525SEric Saxe CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm); 5295cff7825Smh27603 mutex_exit(&cpudsp->lock); 5305cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_power: instance %d: " 5315cff7825Smh27603 "can't locate new CPU speed", instance); 5325cff7825Smh27603 return (DDI_FAILURE); 5335cff7825Smh27603 } 5345cff7825Smh27603 5355cff7825Smh27603 /* 5365cff7825Smh27603 * We currently refuse to power manage if the CPU is not ready to 5375cff7825Smh27603 * take cross calls (cross calls fail silently if CPU is not ready 5385cff7825Smh27603 * for it). 5395cff7825Smh27603 * 5405cff7825Smh27603 * Additionally, for x86 platforms we cannot power manage 5415cff7825Smh27603 * any one instance, until all instances have been initialized. 5425cff7825Smh27603 * That's because we don't know what the CPU domains look like 5435cff7825Smh27603 * until all instances have been initialized. 5445cff7825Smh27603 */ 545*0e751525SEric Saxe is_ready = CPUDRV_XCALL_IS_READY(cpudsp->cpu_id); 5465cff7825Smh27603 if (!is_ready) { 5475cff7825Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: " 5485cff7825Smh27603 "CPU not ready for x-calls\n", instance)); 549*0e751525SEric Saxe } else if (!(is_ready = cpudrv_power_ready())) { 5505cff7825Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: " 551*0e751525SEric Saxe "waiting for all CPUs to be power manageable\n", 552*0e751525SEric Saxe instance)); 5535cff7825Smh27603 } 5545cff7825Smh27603 if (!is_ready) { 555*0e751525SEric Saxe CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm); 5565cff7825Smh27603 mutex_exit(&cpudsp->lock); 5575cff7825Smh27603 return (DDI_FAILURE); 5585cff7825Smh27603 } 5595cff7825Smh27603 5605cff7825Smh27603 /* 561*0e751525SEric Saxe * Execute CPU specific routine on the requested CPU to 562*0e751525SEric Saxe * change its speed to normal-speed/divisor. 5635cff7825Smh27603 */ 564*0e751525SEric Saxe if ((ret = cpudrv_change_speed(cpudsp, new_spd)) != DDI_SUCCESS) { 565*0e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_power: " 566*0e751525SEric Saxe "cpudrv_change_speed() return = %d", ret); 5675cff7825Smh27603 mutex_exit(&cpudsp->lock); 5685cff7825Smh27603 return (DDI_FAILURE); 5695cff7825Smh27603 } 5705cff7825Smh27603 5715cff7825Smh27603 /* 5725cff7825Smh27603 * Reset idle threshold time for the new power level. 5735cff7825Smh27603 */ 574*0e751525SEric Saxe if ((cpudrvpm->cur_spd != NULL) && (level < 575*0e751525SEric Saxe cpudrvpm->cur_spd->pm_level)) { 576*0e751525SEric Saxe if (pm_idle_component(dip, CPUDRV_COMP_NUM) == 5775cff7825Smh27603 DDI_SUCCESS) { 578*0e751525SEric Saxe if (cpudrvpm->pm_busycnt >= 1) 579*0e751525SEric Saxe cpudrvpm->pm_busycnt--; 580*0e751525SEric Saxe } else { 581*0e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_power: instance %d: " 582*0e751525SEric Saxe "can't idle CPU component", 583*0e751525SEric Saxe ddi_get_instance(dip)); 584*0e751525SEric Saxe } 5855cff7825Smh27603 } 5865cff7825Smh27603 /* 5875cff7825Smh27603 * Reset various parameters because we are now running at new speed. 5885cff7825Smh27603 */ 589*0e751525SEric Saxe cpudrvpm->lastquan_mstate[CMS_IDLE] = 0; 590*0e751525SEric Saxe cpudrvpm->lastquan_mstate[CMS_SYSTEM] = 0; 591*0e751525SEric Saxe cpudrvpm->lastquan_mstate[CMS_USER] = 0; 592*0e751525SEric Saxe cpudrvpm->lastquan_ticks = 0; 593*0e751525SEric Saxe cpudrvpm->cur_spd = new_spd; 594*0e751525SEric Saxe CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm); 5955cff7825Smh27603 mutex_exit(&cpudsp->lock); 5965cff7825Smh27603 5975cff7825Smh27603 return (DDI_SUCCESS); 5985cff7825Smh27603 } 5995cff7825Smh27603 6005cff7825Smh27603 /* 6015cff7825Smh27603 * Initialize power management data. 6025cff7825Smh27603 */ 6035cff7825Smh27603 static int 604*0e751525SEric Saxe cpudrv_init(cpudrv_devstate_t *cpudsp) 6055cff7825Smh27603 { 6065cff7825Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 6075cff7825Smh27603 cpudrv_pm_spd_t *cur_spd; 6085cff7825Smh27603 cpudrv_pm_spd_t *prev_spd = NULL; 6095cff7825Smh27603 int *speeds; 6105cff7825Smh27603 uint_t nspeeds; 6115cff7825Smh27603 int idle_cnt_percent; 6125cff7825Smh27603 int user_cnt_percent; 6135cff7825Smh27603 int i; 6145cff7825Smh27603 615*0e751525SEric Saxe CPUDRV_GET_SPEEDS(cpudsp, speeds, nspeeds); 6165cff7825Smh27603 if (nspeeds < 2) { 6175cff7825Smh27603 /* Need at least two speeds to power manage */ 618*0e751525SEric Saxe CPUDRV_FREE_SPEEDS(speeds, nspeeds); 6195cff7825Smh27603 return (DDI_FAILURE); 6205cff7825Smh27603 } 6215cff7825Smh27603 cpupm->num_spd = nspeeds; 6225cff7825Smh27603 6235cff7825Smh27603 /* 6245cff7825Smh27603 * Calculate the watermarks and other parameters based on the 6255cff7825Smh27603 * supplied speeds. 6265cff7825Smh27603 * 6275cff7825Smh27603 * One of the basic assumption is that for X amount of CPU work, 6285cff7825Smh27603 * if CPU is slowed down by a factor of N, the time it takes to 6295cff7825Smh27603 * do the same work will be N * X. 6305cff7825Smh27603 * 6315cff7825Smh27603 * The driver declares that a CPU is idle and ready for slowed down, 6325cff7825Smh27603 * if amount of idle thread is more than the current speed idle_hwm 6335cff7825Smh27603 * without dropping below idle_hwm a number of consecutive sampling 6345cff7825Smh27603 * intervals and number of running threads in user mode are below 6355cff7825Smh27603 * user_lwm. We want to set the current user_lwm such that if we 6365cff7825Smh27603 * just switched to the next slower speed with no change in real work 6375cff7825Smh27603 * load, the amount of user threads at the slower speed will be such 6385cff7825Smh27603 * that it falls below the slower speed's user_hwm. If we didn't do 6395cff7825Smh27603 * that then we will just come back to the higher speed as soon as we 6405cff7825Smh27603 * go down even with no change in work load. 6415cff7825Smh27603 * The user_hwm is a fixed precentage and not calculated dynamically. 6425cff7825Smh27603 * 6435cff7825Smh27603 * We bring the CPU up if idle thread at current speed is less than 6445cff7825Smh27603 * the current speed idle_lwm for a number of consecutive sampling 6455cff7825Smh27603 * intervals or user threads are above the user_hwm for the current 6465cff7825Smh27603 * speed. 6475cff7825Smh27603 */ 6485cff7825Smh27603 for (i = 0; i < nspeeds; i++) { 6495cff7825Smh27603 cur_spd = kmem_zalloc(sizeof (cpudrv_pm_spd_t), KM_SLEEP); 6505cff7825Smh27603 cur_spd->speed = speeds[i]; 6515cff7825Smh27603 if (i == 0) { /* normal speed */ 6525cff7825Smh27603 cpupm->head_spd = cur_spd; 653*0e751525SEric Saxe CPUDRV_TOPSPEED(cpupm) = cur_spd; 654*0e751525SEric Saxe cur_spd->quant_cnt = CPUDRV_QUANT_CNT_NORMAL; 6555cff7825Smh27603 cur_spd->idle_hwm = 656*0e751525SEric Saxe (cpudrv_idle_hwm * cur_spd->quant_cnt) / 100; 6575cff7825Smh27603 /* can't speed anymore */ 6585cff7825Smh27603 cur_spd->idle_lwm = 0; 6595cff7825Smh27603 cur_spd->user_hwm = UINT_MAX; 6605cff7825Smh27603 } else { 661*0e751525SEric Saxe cur_spd->quant_cnt = CPUDRV_QUANT_CNT_OTHR; 6625cff7825Smh27603 ASSERT(prev_spd != NULL); 6635cff7825Smh27603 prev_spd->down_spd = cur_spd; 6645cff7825Smh27603 cur_spd->up_spd = cpupm->head_spd; 6655cff7825Smh27603 6665cff7825Smh27603 /* 6675cff7825Smh27603 * Let's assume CPU is considered idle at full speed 6685cff7825Smh27603 * when it is spending I% of time in running the idle 6695cff7825Smh27603 * thread. At full speed, CPU will be busy (100 - I) % 6705cff7825Smh27603 * of times. This % of busyness increases by factor of 6715cff7825Smh27603 * N as CPU slows down. CPU that is idle I% of times 6725cff7825Smh27603 * in full speed, it is idle (100 - ((100 - I) * N)) % 6735cff7825Smh27603 * of times in N speed. The idle_lwm is a fixed 6745cff7825Smh27603 * percentage. A large value of N may result in 6755cff7825Smh27603 * idle_hwm to go below idle_lwm. We need to make sure 6765cff7825Smh27603 * that there is at least a buffer zone seperation 6775cff7825Smh27603 * between the idle_lwm and idle_hwm values. 6785cff7825Smh27603 */ 679*0e751525SEric Saxe idle_cnt_percent = CPUDRV_IDLE_CNT_PERCENT( 680*0e751525SEric Saxe cpudrv_idle_hwm, speeds, i); 6815cff7825Smh27603 idle_cnt_percent = max(idle_cnt_percent, 682*0e751525SEric Saxe (cpudrv_idle_lwm + cpudrv_idle_buf_zone)); 6835cff7825Smh27603 cur_spd->idle_hwm = 6845cff7825Smh27603 (idle_cnt_percent * cur_spd->quant_cnt) / 100; 6855cff7825Smh27603 cur_spd->idle_lwm = 686*0e751525SEric Saxe (cpudrv_idle_lwm * cur_spd->quant_cnt) / 100; 6875cff7825Smh27603 6885cff7825Smh27603 /* 6895cff7825Smh27603 * The lwm for user threads are determined such that 6905cff7825Smh27603 * if CPU slows down, the load of work in the 6915cff7825Smh27603 * new speed would still keep the CPU at or below the 6925cff7825Smh27603 * user_hwm in the new speed. This is to prevent 6935cff7825Smh27603 * the quick jump back up to higher speed. 6945cff7825Smh27603 */ 695*0e751525SEric Saxe cur_spd->user_hwm = (cpudrv_user_hwm * 6965cff7825Smh27603 cur_spd->quant_cnt) / 100; 697*0e751525SEric Saxe user_cnt_percent = CPUDRV_USER_CNT_PERCENT( 698*0e751525SEric Saxe cpudrv_user_hwm, speeds, i); 6995cff7825Smh27603 prev_spd->user_lwm = 7005cff7825Smh27603 (user_cnt_percent * prev_spd->quant_cnt) / 100; 7015cff7825Smh27603 } 7025cff7825Smh27603 prev_spd = cur_spd; 7035cff7825Smh27603 } 7045cff7825Smh27603 /* Slowest speed. Can't slow down anymore */ 7055cff7825Smh27603 cur_spd->idle_hwm = UINT_MAX; 7065cff7825Smh27603 cur_spd->user_lwm = -1; 7075cff7825Smh27603 #ifdef DEBUG 708*0e751525SEric Saxe DPRINTF(D_PM_INIT, ("cpudrv_init: instance %d: head_spd spd %d, " 7095cff7825Smh27603 "num_spd %d\n", ddi_get_instance(cpudsp->dip), 7105cff7825Smh27603 cpupm->head_spd->speed, cpupm->num_spd)); 7115cff7825Smh27603 for (cur_spd = cpupm->head_spd; cur_spd; cur_spd = cur_spd->down_spd) { 712*0e751525SEric Saxe DPRINTF(D_PM_INIT, ("cpudrv_init: instance %d: speed %d, " 7135cff7825Smh27603 "down_spd spd %d, idle_hwm %d, user_lwm %d, " 7145cff7825Smh27603 "up_spd spd %d, idle_lwm %d, user_hwm %d, " 7155cff7825Smh27603 "quant_cnt %d\n", ddi_get_instance(cpudsp->dip), 7165cff7825Smh27603 cur_spd->speed, 7175cff7825Smh27603 (cur_spd->down_spd ? cur_spd->down_spd->speed : 0), 7185cff7825Smh27603 cur_spd->idle_hwm, cur_spd->user_lwm, 7195cff7825Smh27603 (cur_spd->up_spd ? cur_spd->up_spd->speed : 0), 7205cff7825Smh27603 cur_spd->idle_lwm, cur_spd->user_hwm, 7215cff7825Smh27603 cur_spd->quant_cnt)); 7225cff7825Smh27603 } 7235cff7825Smh27603 #endif /* DEBUG */ 724*0e751525SEric Saxe CPUDRV_FREE_SPEEDS(speeds, nspeeds); 7255cff7825Smh27603 return (DDI_SUCCESS); 7265cff7825Smh27603 } 7275cff7825Smh27603 7285cff7825Smh27603 /* 7295cff7825Smh27603 * Free CPU power management data. 7305cff7825Smh27603 */ 7315cff7825Smh27603 static void 732*0e751525SEric Saxe cpudrv_free(cpudrv_devstate_t *cpudsp) 7335cff7825Smh27603 { 7345cff7825Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 7355cff7825Smh27603 cpudrv_pm_spd_t *cur_spd, *next_spd; 7365cff7825Smh27603 7375cff7825Smh27603 cur_spd = cpupm->head_spd; 7385cff7825Smh27603 while (cur_spd) { 7395cff7825Smh27603 next_spd = cur_spd->down_spd; 7405cff7825Smh27603 kmem_free(cur_spd, sizeof (cpudrv_pm_spd_t)); 7415cff7825Smh27603 cur_spd = next_spd; 7425cff7825Smh27603 } 7435cff7825Smh27603 bzero(cpupm, sizeof (cpudrv_pm_t)); 7445cff7825Smh27603 } 7455cff7825Smh27603 7465cff7825Smh27603 /* 7475cff7825Smh27603 * Create pm-components property. 7485cff7825Smh27603 */ 7495cff7825Smh27603 static int 750*0e751525SEric Saxe cpudrv_comp_create(cpudrv_devstate_t *cpudsp) 7515cff7825Smh27603 { 7525cff7825Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 7535cff7825Smh27603 cpudrv_pm_spd_t *cur_spd; 7545cff7825Smh27603 char **pmc; 7555cff7825Smh27603 int size; 7565cff7825Smh27603 char name[] = "NAME=CPU Speed"; 7575cff7825Smh27603 int i, j; 7585cff7825Smh27603 uint_t comp_spd; 7595cff7825Smh27603 int result = DDI_FAILURE; 7605cff7825Smh27603 7615cff7825Smh27603 pmc = kmem_zalloc((cpupm->num_spd + 1) * sizeof (char *), KM_SLEEP); 762*0e751525SEric Saxe size = CPUDRV_COMP_SIZE(); 763*0e751525SEric Saxe if (cpupm->num_spd > CPUDRV_COMP_MAX_VAL) { 764*0e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_comp_create: instance %d: " 7655cff7825Smh27603 "number of speeds exceeded limits", 7665cff7825Smh27603 ddi_get_instance(cpudsp->dip)); 7675cff7825Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *)); 7685cff7825Smh27603 return (result); 7695cff7825Smh27603 } 7705cff7825Smh27603 7715cff7825Smh27603 for (i = cpupm->num_spd, cur_spd = cpupm->head_spd; i > 0; 7725cff7825Smh27603 i--, cur_spd = cur_spd->down_spd) { 7735cff7825Smh27603 cur_spd->pm_level = i; 7745cff7825Smh27603 pmc[i] = kmem_zalloc((size * sizeof (char)), KM_SLEEP); 775*0e751525SEric Saxe comp_spd = CPUDRV_COMP_SPEED(cpupm, cur_spd); 776*0e751525SEric Saxe if (comp_spd > CPUDRV_COMP_MAX_VAL) { 777*0e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_comp_create: " 7785cff7825Smh27603 "instance %d: speed exceeded limits", 7795cff7825Smh27603 ddi_get_instance(cpudsp->dip)); 7805cff7825Smh27603 for (j = cpupm->num_spd; j >= i; j--) { 7815cff7825Smh27603 kmem_free(pmc[j], size * sizeof (char)); 7825cff7825Smh27603 } 7835cff7825Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * 7845cff7825Smh27603 sizeof (char *)); 7855cff7825Smh27603 return (result); 7865cff7825Smh27603 } 787*0e751525SEric Saxe CPUDRV_COMP_SPRINT(pmc[i], cpupm, cur_spd, comp_spd) 788*0e751525SEric Saxe DPRINTF(D_PM_COMP_CREATE, ("cpudrv_comp_create: " 7895cff7825Smh27603 "instance %d: pm-components power level %d string '%s'\n", 7905cff7825Smh27603 ddi_get_instance(cpudsp->dip), i, pmc[i])); 7915cff7825Smh27603 } 7925cff7825Smh27603 pmc[0] = kmem_zalloc(sizeof (name), KM_SLEEP); 7935cff7825Smh27603 (void) strcat(pmc[0], name); 794*0e751525SEric Saxe DPRINTF(D_PM_COMP_CREATE, ("cpudrv_comp_create: instance %d: " 7955cff7825Smh27603 "pm-components component name '%s'\n", 7965cff7825Smh27603 ddi_get_instance(cpudsp->dip), pmc[0])); 7975cff7825Smh27603 7985cff7825Smh27603 if (ddi_prop_update_string_array(DDI_DEV_T_NONE, cpudsp->dip, 7995cff7825Smh27603 "pm-components", pmc, cpupm->num_spd + 1) == DDI_PROP_SUCCESS) { 8005cff7825Smh27603 result = DDI_SUCCESS; 8015cff7825Smh27603 } else { 802*0e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_comp_create: instance %d: " 8035cff7825Smh27603 "can't create pm-components property", 8045cff7825Smh27603 ddi_get_instance(cpudsp->dip)); 8055cff7825Smh27603 } 8065cff7825Smh27603 8075cff7825Smh27603 for (i = cpupm->num_spd; i > 0; i--) { 8085cff7825Smh27603 kmem_free(pmc[i], size * sizeof (char)); 8095cff7825Smh27603 } 8105cff7825Smh27603 kmem_free(pmc[0], sizeof (name)); 8115cff7825Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *)); 8125cff7825Smh27603 return (result); 8135cff7825Smh27603 } 8145cff7825Smh27603 8155cff7825Smh27603 /* 8165cff7825Smh27603 * Mark a component idle. 8175cff7825Smh27603 */ 818*0e751525SEric Saxe #define CPUDRV_MONITOR_PM_IDLE_COMP(dip, cpupm) { \ 8195cff7825Smh27603 if ((cpupm)->pm_busycnt >= 1) { \ 820*0e751525SEric Saxe if (pm_idle_component((dip), CPUDRV_COMP_NUM) == \ 8215cff7825Smh27603 DDI_SUCCESS) { \ 822*0e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: " \ 8235cff7825Smh27603 "instance %d: pm_idle_component called\n", \ 8245cff7825Smh27603 ddi_get_instance((dip)))); \ 8255cff7825Smh27603 (cpupm)->pm_busycnt--; \ 8265cff7825Smh27603 } else { \ 827*0e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_monitor: instance %d: " \ 8285cff7825Smh27603 "can't idle CPU component", \ 8295cff7825Smh27603 ddi_get_instance((dip))); \ 8305cff7825Smh27603 } \ 8315cff7825Smh27603 } \ 8325cff7825Smh27603 } 8335cff7825Smh27603 8345cff7825Smh27603 /* 8355cff7825Smh27603 * Marks a component busy in both PM framework and driver state structure. 8365cff7825Smh27603 */ 837*0e751525SEric Saxe #define CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm) { \ 8385cff7825Smh27603 if ((cpupm)->pm_busycnt < 1) { \ 839*0e751525SEric Saxe if (pm_busy_component((dip), CPUDRV_COMP_NUM) == \ 8405cff7825Smh27603 DDI_SUCCESS) { \ 841*0e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: " \ 8425cff7825Smh27603 "instance %d: pm_busy_component called\n", \ 8435cff7825Smh27603 ddi_get_instance((dip)))); \ 8445cff7825Smh27603 (cpupm)->pm_busycnt++; \ 8455cff7825Smh27603 } else { \ 846*0e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_monitor: instance %d: " \ 8475cff7825Smh27603 "can't busy CPU component", \ 8485cff7825Smh27603 ddi_get_instance((dip))); \ 8495cff7825Smh27603 } \ 8505cff7825Smh27603 } \ 8515cff7825Smh27603 } 8525cff7825Smh27603 8535cff7825Smh27603 /* 8545cff7825Smh27603 * Marks a component busy and calls pm_raise_power(). 8555cff7825Smh27603 */ 856*0e751525SEric Saxe #define CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, new_level) { \ 8575cff7825Smh27603 /* \ 8585cff7825Smh27603 * Mark driver and PM framework busy first so framework doesn't try \ 8595cff7825Smh27603 * to bring CPU to lower speed when we need to be at higher speed. \ 8605cff7825Smh27603 */ \ 861*0e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_COMP((dip), (cpupm)); \ 8625cff7825Smh27603 mutex_exit(&(cpudsp)->lock); \ 863*0e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: " \ 8645cff7825Smh27603 "pm_raise_power called to %d\n", ddi_get_instance((dip)), \ 8655cff7825Smh27603 (new_level))); \ 866*0e751525SEric Saxe if (pm_raise_power((dip), CPUDRV_COMP_NUM, (new_level)) != \ 8675cff7825Smh27603 DDI_SUCCESS) { \ 868*0e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_monitor: instance %d: can't " \ 8695cff7825Smh27603 "raise CPU power level", ddi_get_instance((dip))); \ 8705cff7825Smh27603 } \ 8715cff7825Smh27603 mutex_enter(&(cpudsp)->lock); \ 8725cff7825Smh27603 } 8735cff7825Smh27603 8745cff7825Smh27603 /* 8755cff7825Smh27603 * In order to monitor a CPU, we need to hold cpu_lock to access CPU 8765cff7825Smh27603 * statistics. Holding cpu_lock is not allowed from a callout routine. 8775cff7825Smh27603 * We dispatch a taskq to do that job. 8785cff7825Smh27603 */ 8795cff7825Smh27603 static void 880*0e751525SEric Saxe cpudrv_monitor_disp(void *arg) 8815cff7825Smh27603 { 8825cff7825Smh27603 cpudrv_devstate_t *cpudsp = (cpudrv_devstate_t *)arg; 8835cff7825Smh27603 8845cff7825Smh27603 /* 8855cff7825Smh27603 * We are here because the last task has scheduled a timeout. 8865cff7825Smh27603 * The queue should be empty at this time. 8875cff7825Smh27603 */ 8885cff7825Smh27603 mutex_enter(&cpudsp->cpudrv_pm.timeout_lock); 889*0e751525SEric Saxe if (!taskq_dispatch(cpudsp->cpudrv_pm.tq, cpudrv_monitor, arg, 8905cff7825Smh27603 TQ_NOSLEEP)) { 8915cff7825Smh27603 mutex_exit(&cpudsp->cpudrv_pm.timeout_lock); 892*0e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor_disp: failed to " 893*0e751525SEric Saxe "dispatch the cpudrv_monitor taskq\n")); 8945cff7825Smh27603 mutex_enter(&cpudsp->lock); 895*0e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 8965cff7825Smh27603 mutex_exit(&cpudsp->lock); 8975cff7825Smh27603 return; 8985cff7825Smh27603 } 8995cff7825Smh27603 cpudsp->cpudrv_pm.timeout_count++; 9005cff7825Smh27603 mutex_exit(&cpudsp->cpudrv_pm.timeout_lock); 9015cff7825Smh27603 } 9025cff7825Smh27603 9035cff7825Smh27603 /* 9045cff7825Smh27603 * Monitors each CPU for the amount of time idle thread was running in the 9055cff7825Smh27603 * last quantum and arranges for the CPU to go to the lower or higher speed. 9065cff7825Smh27603 * Called at the time interval appropriate for the current speed. The 907*0e751525SEric Saxe * time interval for normal speed is CPUDRV_QUANT_CNT_NORMAL. The time 9085cff7825Smh27603 * interval for other speeds (including unknown speed) is 909*0e751525SEric Saxe * CPUDRV_QUANT_CNT_OTHR. 9105cff7825Smh27603 */ 9115cff7825Smh27603 static void 912*0e751525SEric Saxe cpudrv_monitor(void *arg) 9135cff7825Smh27603 { 9145cff7825Smh27603 cpudrv_devstate_t *cpudsp = (cpudrv_devstate_t *)arg; 9155cff7825Smh27603 cpudrv_pm_t *cpupm; 9165cff7825Smh27603 cpudrv_pm_spd_t *cur_spd, *new_spd; 9175cff7825Smh27603 dev_info_t *dip; 9185cff7825Smh27603 uint_t idle_cnt, user_cnt, system_cnt; 919fcddbe1fSMark Haywood clock_t ticks; 920fcddbe1fSMark Haywood uint_t tick_cnt; 9215cff7825Smh27603 hrtime_t msnsecs[NCMSTATES]; 9225cff7825Smh27603 boolean_t is_ready; 9235cff7825Smh27603 9245cff7825Smh27603 #define GET_CPU_MSTATE_CNT(state, cnt) \ 9255cff7825Smh27603 msnsecs[state] = NSEC_TO_TICK(msnsecs[state]); \ 9265cff7825Smh27603 if (cpupm->lastquan_mstate[state] > msnsecs[state]) \ 9275cff7825Smh27603 msnsecs[state] = cpupm->lastquan_mstate[state]; \ 9285cff7825Smh27603 cnt = msnsecs[state] - cpupm->lastquan_mstate[state]; \ 9295cff7825Smh27603 cpupm->lastquan_mstate[state] = msnsecs[state] 9305cff7825Smh27603 9315cff7825Smh27603 mutex_enter(&cpudsp->lock); 9325cff7825Smh27603 cpupm = &(cpudsp->cpudrv_pm); 9335cff7825Smh27603 if (cpupm->timeout_id == 0) { 9345cff7825Smh27603 mutex_exit(&cpudsp->lock); 9355cff7825Smh27603 goto do_return; 9365cff7825Smh27603 } 9375cff7825Smh27603 cur_spd = cpupm->cur_spd; 9385cff7825Smh27603 dip = cpudsp->dip; 9395cff7825Smh27603 9405cff7825Smh27603 /* 9415cff7825Smh27603 * We assume that a CPU is initialized and has a valid cpu_t 9425cff7825Smh27603 * structure, if it is ready for cross calls. If this changes, 9435cff7825Smh27603 * additional checks might be needed. 9445cff7825Smh27603 * 9455cff7825Smh27603 * Additionally, for x86 platforms we cannot power manage 9465cff7825Smh27603 * any one instance, until all instances have been initialized. 9475cff7825Smh27603 * That's because we don't know what the CPU domains look like 9485cff7825Smh27603 * until all instances have been initialized. 9495cff7825Smh27603 */ 950*0e751525SEric Saxe is_ready = CPUDRV_XCALL_IS_READY(cpudsp->cpu_id); 9515cff7825Smh27603 if (!is_ready) { 952*0e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: " 9535cff7825Smh27603 "CPU not ready for x-calls\n", ddi_get_instance(dip))); 954*0e751525SEric Saxe } else if (!(is_ready = cpudrv_power_ready())) { 955*0e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: " 9567f606aceSMark Haywood "waiting for all CPUs to be power manageable\n", 9575cff7825Smh27603 ddi_get_instance(dip))); 9585cff7825Smh27603 } 9595cff7825Smh27603 if (!is_ready) { 9605cff7825Smh27603 /* 9615cff7825Smh27603 * Make sure that we are busy so that framework doesn't 9625cff7825Smh27603 * try to bring us down in this situation. 9635cff7825Smh27603 */ 964*0e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm); 965*0e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 9665cff7825Smh27603 mutex_exit(&cpudsp->lock); 9675cff7825Smh27603 goto do_return; 9685cff7825Smh27603 } 9695cff7825Smh27603 9705cff7825Smh27603 /* 9715cff7825Smh27603 * Make sure that we are still not at unknown power level. 9725cff7825Smh27603 */ 9735cff7825Smh27603 if (cur_spd == NULL) { 974*0e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: " 9755cff7825Smh27603 "cur_spd is unknown\n", ddi_get_instance(dip))); 976*0e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, 977*0e751525SEric Saxe CPUDRV_TOPSPEED(cpupm)->pm_level); 9785cff7825Smh27603 /* 9795cff7825Smh27603 * We just changed the speed. Wait till at least next 9805cff7825Smh27603 * call to this routine before proceeding ahead. 9815cff7825Smh27603 */ 982*0e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 9835cff7825Smh27603 mutex_exit(&cpudsp->lock); 9845cff7825Smh27603 goto do_return; 9855cff7825Smh27603 } 9865cff7825Smh27603 9875cff7825Smh27603 mutex_enter(&cpu_lock); 988*0e751525SEric Saxe if (cpudsp->cp == NULL && 989*0e751525SEric Saxe (cpudsp->cp = cpu_get(cpudsp->cpu_id)) == NULL) { 9905cff7825Smh27603 mutex_exit(&cpu_lock); 991*0e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 9925cff7825Smh27603 mutex_exit(&cpudsp->lock); 993*0e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_monitor: instance %d: can't get " 9945cff7825Smh27603 "cpu_t", ddi_get_instance(dip)); 9955cff7825Smh27603 goto do_return; 9965cff7825Smh27603 } 99768afbec1Smh27603 99868afbec1Smh27603 if (!cpupm->pm_started) { 99968afbec1Smh27603 cpupm->pm_started = B_TRUE; 1000*0e751525SEric Saxe cpudrv_set_supp_freqs(cpudsp); 100168afbec1Smh27603 } 10025cff7825Smh27603 1003*0e751525SEric Saxe get_cpu_mstate(cpudsp->cp, msnsecs); 10045cff7825Smh27603 GET_CPU_MSTATE_CNT(CMS_IDLE, idle_cnt); 10055cff7825Smh27603 GET_CPU_MSTATE_CNT(CMS_USER, user_cnt); 10065cff7825Smh27603 GET_CPU_MSTATE_CNT(CMS_SYSTEM, system_cnt); 10075cff7825Smh27603 10085cff7825Smh27603 /* 10095cff7825Smh27603 * We can't do anything when we have just switched to a state 10105cff7825Smh27603 * because there is no valid timestamp. 10115cff7825Smh27603 */ 1012fcddbe1fSMark Haywood if (cpupm->lastquan_ticks == 0) { 1013fcddbe1fSMark Haywood cpupm->lastquan_ticks = NSEC_TO_TICK(gethrtime()); 10145cff7825Smh27603 mutex_exit(&cpu_lock); 1015*0e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 10165cff7825Smh27603 mutex_exit(&cpudsp->lock); 10175cff7825Smh27603 goto do_return; 10185cff7825Smh27603 } 10195cff7825Smh27603 10205cff7825Smh27603 /* 10215cff7825Smh27603 * Various watermarks are based on this routine being called back 10225cff7825Smh27603 * exactly at the requested period. This is not guaranteed 10235cff7825Smh27603 * because this routine is called from a taskq that is dispatched 10245cff7825Smh27603 * from a timeout routine. Handle this by finding out how many 1025fcddbe1fSMark Haywood * ticks have elapsed since the last call and adjusting 10265cff7825Smh27603 * the idle_cnt based on the delay added to the requested period 10275cff7825Smh27603 * by timeout and taskq. 10285cff7825Smh27603 */ 1029fcddbe1fSMark Haywood ticks = NSEC_TO_TICK(gethrtime()); 1030fcddbe1fSMark Haywood tick_cnt = ticks - cpupm->lastquan_ticks; 1031fcddbe1fSMark Haywood ASSERT(tick_cnt != 0); 1032fcddbe1fSMark Haywood cpupm->lastquan_ticks = ticks; 10335cff7825Smh27603 mutex_exit(&cpu_lock); 10345cff7825Smh27603 /* 10355cff7825Smh27603 * Time taken between recording the current counts and 10365cff7825Smh27603 * arranging the next call of this routine is an error in our 10375cff7825Smh27603 * calculation. We minimize the error by calling 1038*0e751525SEric Saxe * CPUDRV_MONITOR_INIT() here instead of end of this routine. 10395cff7825Smh27603 */ 1040*0e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 1041*0e751525SEric Saxe DPRINTF(D_PM_MONITOR_VERBOSE, ("cpudrv_monitor: instance %d: " 10425cff7825Smh27603 "idle count %d, user count %d, system count %d, pm_level %d, " 10435cff7825Smh27603 "pm_busycnt %d\n", ddi_get_instance(dip), idle_cnt, user_cnt, 10445cff7825Smh27603 system_cnt, cur_spd->pm_level, cpupm->pm_busycnt)); 10455cff7825Smh27603 10465cff7825Smh27603 #ifdef DEBUG 10475cff7825Smh27603 /* 10485cff7825Smh27603 * Notify that timeout and taskq has caused delays and we need to 10495cff7825Smh27603 * scale our parameters accordingly. 10505cff7825Smh27603 * 10515cff7825Smh27603 * To get accurate result, don't turn on other DPRINTFs with 10525cff7825Smh27603 * the following DPRINTF. PROM calls generated by other 10535cff7825Smh27603 * DPRINTFs changes the timing. 10545cff7825Smh27603 */ 1055fcddbe1fSMark Haywood if (tick_cnt > cur_spd->quant_cnt) { 1056*0e751525SEric Saxe DPRINTF(D_PM_MONITOR_DELAY, ("cpudrv_monitor: instance %d: " 1057fcddbe1fSMark Haywood "tick count %d > quantum_count %u\n", 1058fcddbe1fSMark Haywood ddi_get_instance(dip), tick_cnt, cur_spd->quant_cnt)); 10595cff7825Smh27603 } 10605cff7825Smh27603 #endif /* DEBUG */ 10615cff7825Smh27603 10625cff7825Smh27603 /* 10635cff7825Smh27603 * Adjust counts based on the delay added by timeout and taskq. 10645cff7825Smh27603 */ 1065fcddbe1fSMark Haywood idle_cnt = (idle_cnt * cur_spd->quant_cnt) / tick_cnt; 1066fcddbe1fSMark Haywood user_cnt = (user_cnt * cur_spd->quant_cnt) / tick_cnt; 1067fcddbe1fSMark Haywood 10685cff7825Smh27603 if ((user_cnt > cur_spd->user_hwm) || (idle_cnt < cur_spd->idle_lwm && 1069*0e751525SEric Saxe cur_spd->idle_blwm_cnt >= cpudrv_idle_blwm_cnt_max)) { 10705cff7825Smh27603 cur_spd->idle_blwm_cnt = 0; 10715cff7825Smh27603 cur_spd->idle_bhwm_cnt = 0; 10725cff7825Smh27603 /* 10735cff7825Smh27603 * In normal situation, arrange to go to next higher speed. 10745cff7825Smh27603 * If we are running in special direct pm mode, we just stay 10755cff7825Smh27603 * at the current speed. 10765cff7825Smh27603 */ 10775cff7825Smh27603 if (cur_spd == cur_spd->up_spd || cpudrv_direct_pm) { 1078*0e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm); 10795cff7825Smh27603 } else { 10805cff7825Smh27603 new_spd = cur_spd->up_spd; 1081*0e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, 10825cff7825Smh27603 new_spd->pm_level); 10835cff7825Smh27603 } 10845cff7825Smh27603 } else if ((user_cnt <= cur_spd->user_lwm) && 1085*0e751525SEric Saxe (idle_cnt >= cur_spd->idle_hwm) || !CPU_ACTIVE(cpudsp->cp)) { 10865cff7825Smh27603 cur_spd->idle_blwm_cnt = 0; 10875cff7825Smh27603 cur_spd->idle_bhwm_cnt = 0; 10885cff7825Smh27603 /* 10895cff7825Smh27603 * Arrange to go to next lower speed by informing our idle 10905cff7825Smh27603 * status to the power management framework. 10915cff7825Smh27603 */ 1092*0e751525SEric Saxe CPUDRV_MONITOR_PM_IDLE_COMP(dip, cpupm); 10935cff7825Smh27603 } else { 10945cff7825Smh27603 /* 10955cff7825Smh27603 * If we are between the idle water marks and have not 10965cff7825Smh27603 * been here enough consecutive times to be considered 10975cff7825Smh27603 * busy, just increment the count and return. 10985cff7825Smh27603 */ 10995cff7825Smh27603 if ((idle_cnt < cur_spd->idle_hwm) && 11005cff7825Smh27603 (idle_cnt >= cur_spd->idle_lwm) && 1101*0e751525SEric Saxe (cur_spd->idle_bhwm_cnt < cpudrv_idle_bhwm_cnt_max)) { 11025cff7825Smh27603 cur_spd->idle_blwm_cnt = 0; 11035cff7825Smh27603 cur_spd->idle_bhwm_cnt++; 11045cff7825Smh27603 mutex_exit(&cpudsp->lock); 11055cff7825Smh27603 goto do_return; 11065cff7825Smh27603 } 11075cff7825Smh27603 if (idle_cnt < cur_spd->idle_lwm) { 11085cff7825Smh27603 cur_spd->idle_blwm_cnt++; 11095cff7825Smh27603 cur_spd->idle_bhwm_cnt = 0; 11105cff7825Smh27603 } 11115cff7825Smh27603 /* 11125cff7825Smh27603 * Arranges to stay at the current speed. 11135cff7825Smh27603 */ 1114*0e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm); 11155cff7825Smh27603 } 11165cff7825Smh27603 mutex_exit(&cpudsp->lock); 11175cff7825Smh27603 do_return: 11185cff7825Smh27603 mutex_enter(&cpupm->timeout_lock); 11195cff7825Smh27603 ASSERT(cpupm->timeout_count > 0); 11205cff7825Smh27603 cpupm->timeout_count--; 11215cff7825Smh27603 cv_signal(&cpupm->timeout_cv); 11225cff7825Smh27603 mutex_exit(&cpupm->timeout_lock); 11235cff7825Smh27603 } 1124