15cff7825Smh27603 /* 25cff7825Smh27603 * CDDL HEADER START 35cff7825Smh27603 * 45cff7825Smh27603 * The contents of this file are subject to the terms of the 55cff7825Smh27603 * Common Development and Distribution License (the "License"). 65cff7825Smh27603 * You may not use this file except in compliance with the License. 75cff7825Smh27603 * 85cff7825Smh27603 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 95cff7825Smh27603 * or http://www.opensolaris.org/os/licensing. 105cff7825Smh27603 * See the License for the specific language governing permissions 115cff7825Smh27603 * and limitations under the License. 125cff7825Smh27603 * 135cff7825Smh27603 * When distributing Covered Code, include this CDDL HEADER in each 145cff7825Smh27603 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 155cff7825Smh27603 * If applicable, add the following below this CDDL HEADER, with the 165cff7825Smh27603 * fields enclosed by brackets "[]" replaced with your own identifying 175cff7825Smh27603 * information: Portions Copyright [yyyy] [name of copyright owner] 185cff7825Smh27603 * 195cff7825Smh27603 * CDDL HEADER END 205cff7825Smh27603 */ 215cff7825Smh27603 /* 22fcddbe1fSMark Haywood * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 235cff7825Smh27603 * Use is subject to license terms. 245cff7825Smh27603 */ 25444f66e7SMark Haywood /* 26444f66e7SMark Haywood * Copyright (c) 2009, Intel Corporation. 27444f66e7SMark Haywood * All Rights Reserved. 28444f66e7SMark Haywood */ 295cff7825Smh27603 305cff7825Smh27603 /* 315cff7825Smh27603 * CPU Device driver. The driver is not DDI-compliant. 325cff7825Smh27603 * 335cff7825Smh27603 * The driver supports following features: 345cff7825Smh27603 * - Power management. 355cff7825Smh27603 */ 365cff7825Smh27603 375cff7825Smh27603 #include <sys/types.h> 385cff7825Smh27603 #include <sys/param.h> 395cff7825Smh27603 #include <sys/errno.h> 405cff7825Smh27603 #include <sys/modctl.h> 415cff7825Smh27603 #include <sys/kmem.h> 425cff7825Smh27603 #include <sys/conf.h> 435cff7825Smh27603 #include <sys/cmn_err.h> 445cff7825Smh27603 #include <sys/stat.h> 455cff7825Smh27603 #include <sys/debug.h> 465cff7825Smh27603 #include <sys/systm.h> 475cff7825Smh27603 #include <sys/ddi.h> 485cff7825Smh27603 #include <sys/sunddi.h> 49c210ded4Sesaxe #include <sys/sdt.h> 500e751525SEric Saxe #include <sys/epm.h> 515cff7825Smh27603 #include <sys/machsystm.h> 525cff7825Smh27603 #include <sys/x_call.h> 537f606aceSMark Haywood #include <sys/cpudrv_mach.h> 545cff7825Smh27603 #include <sys/msacct.h> 555cff7825Smh27603 565cff7825Smh27603 /* 575cff7825Smh27603 * CPU power management 585cff7825Smh27603 * 595cff7825Smh27603 * The supported power saving model is to slow down the CPU (on SPARC by 605cff7825Smh27603 * dividing the CPU clock and on x86 by dropping down a P-state). 615cff7825Smh27603 * Periodically we determine the amount of time the CPU is running 625cff7825Smh27603 * idle thread and threads in user mode during the last quantum. If the idle 635cff7825Smh27603 * thread was running less than its low water mark for current speed for 645cff7825Smh27603 * number of consecutive sampling periods, or number of running threads in 655cff7825Smh27603 * user mode are above its high water mark, we arrange to go to the higher 665cff7825Smh27603 * speed. If the idle thread was running more than its high water mark without 675cff7825Smh27603 * dropping a number of consecutive times below the mark, and number of threads 685cff7825Smh27603 * running in user mode are below its low water mark, we arrange to go to the 695cff7825Smh27603 * next lower speed. While going down, we go through all the speeds. While 705cff7825Smh27603 * going up we go to the maximum speed to minimize impact on the user, but have 715cff7825Smh27603 * provisions in the driver to go to other speeds. 725cff7825Smh27603 * 735cff7825Smh27603 * The driver does not have knowledge of a particular implementation of this 745cff7825Smh27603 * scheme and will work with all CPUs supporting this model. On SPARC, the 755cff7825Smh27603 * driver determines supported speeds by looking at 'clock-divisors' property 765cff7825Smh27603 * created by OBP. On x86, the driver retrieves the supported speeds from 775cff7825Smh27603 * ACPI. 785cff7825Smh27603 */ 795cff7825Smh27603 805cff7825Smh27603 /* 815cff7825Smh27603 * Configuration function prototypes and data structures 825cff7825Smh27603 */ 835cff7825Smh27603 static int cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 845cff7825Smh27603 static int cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 855cff7825Smh27603 static int cpudrv_power(dev_info_t *dip, int comp, int level); 865cff7825Smh27603 875cff7825Smh27603 struct dev_ops cpudrv_ops = { 885cff7825Smh27603 DEVO_REV, /* rev */ 895cff7825Smh27603 0, /* refcnt */ 905cff7825Smh27603 nodev, /* getinfo */ 915cff7825Smh27603 nulldev, /* identify */ 925cff7825Smh27603 nulldev, /* probe */ 935cff7825Smh27603 cpudrv_attach, /* attach */ 945cff7825Smh27603 cpudrv_detach, /* detach */ 955cff7825Smh27603 nodev, /* reset */ 965cff7825Smh27603 (struct cb_ops *)NULL, /* cb_ops */ 975cff7825Smh27603 (struct bus_ops *)NULL, /* bus_ops */ 9819397407SSherry Moore cpudrv_power, /* power */ 9919397407SSherry Moore ddi_quiesce_not_needed, /* quiesce */ 1005cff7825Smh27603 }; 1015cff7825Smh27603 1025cff7825Smh27603 static struct modldrv modldrv = { 1035cff7825Smh27603 &mod_driverops, /* modops */ 1047f606aceSMark Haywood "CPU Driver", /* linkinfo */ 1055cff7825Smh27603 &cpudrv_ops, /* dev_ops */ 1065cff7825Smh27603 }; 1075cff7825Smh27603 1085cff7825Smh27603 static struct modlinkage modlinkage = { 1095cff7825Smh27603 MODREV_1, /* rev */ 1105cff7825Smh27603 &modldrv, /* linkage */ 1115cff7825Smh27603 NULL 1125cff7825Smh27603 }; 1135cff7825Smh27603 1145cff7825Smh27603 /* 1155cff7825Smh27603 * Function prototypes 1165cff7825Smh27603 */ 1170e751525SEric Saxe static int cpudrv_init(cpudrv_devstate_t *cpudsp); 1180e751525SEric Saxe static void cpudrv_free(cpudrv_devstate_t *cpudsp); 1190e751525SEric Saxe static int cpudrv_comp_create(cpudrv_devstate_t *cpudsp); 1200e751525SEric Saxe static void cpudrv_monitor_disp(void *arg); 1210e751525SEric Saxe static void cpudrv_monitor(void *arg); 1225cff7825Smh27603 1235cff7825Smh27603 /* 1245cff7825Smh27603 * Driver global variables 1255cff7825Smh27603 */ 1265cff7825Smh27603 uint_t cpudrv_debug = 0; 1275cff7825Smh27603 void *cpudrv_state; 1280e751525SEric Saxe static uint_t cpudrv_idle_hwm = CPUDRV_IDLE_HWM; 1290e751525SEric Saxe static uint_t cpudrv_idle_lwm = CPUDRV_IDLE_LWM; 1300e751525SEric Saxe static uint_t cpudrv_idle_buf_zone = CPUDRV_IDLE_BUF_ZONE; 1310e751525SEric Saxe static uint_t cpudrv_idle_bhwm_cnt_max = CPUDRV_IDLE_BHWM_CNT_MAX; 1320e751525SEric Saxe static uint_t cpudrv_idle_blwm_cnt_max = CPUDRV_IDLE_BLWM_CNT_MAX; 1330e751525SEric Saxe static uint_t cpudrv_user_hwm = CPUDRV_USER_HWM; 1340e751525SEric Saxe 1350e751525SEric Saxe boolean_t cpudrv_enabled = B_TRUE; 1365cff7825Smh27603 1375cff7825Smh27603 /* 1385cff7825Smh27603 * cpudrv_direct_pm allows user applications to directly control the 1395cff7825Smh27603 * power state transitions (direct pm) without following the normal 1405cff7825Smh27603 * direct pm protocol. This is needed because the normal protocol 1415cff7825Smh27603 * requires that a device only be lowered when it is idle, and be 1425cff7825Smh27603 * brought up when it request to do so by calling pm_raise_power(). 1435cff7825Smh27603 * Ignoring this protocol is harmless for CPU (other than speed). 1445cff7825Smh27603 * Moreover it might be the case that CPU is never idle or wants 1455cff7825Smh27603 * to be at higher speed because of the addition CPU cycles required 1465cff7825Smh27603 * to run the user application. 1475cff7825Smh27603 * 1485cff7825Smh27603 * The driver will still report idle/busy status to the framework. Although 1495cff7825Smh27603 * framework will ignore this information for direct pm devices and not 1505cff7825Smh27603 * try to bring them down when idle, user applications can still use this 1515cff7825Smh27603 * information if they wants. 1525cff7825Smh27603 * 1535cff7825Smh27603 * In the future, provide an ioctl to control setting of this mode. In 1545cff7825Smh27603 * that case, this variable should move to the state structure and 1555cff7825Smh27603 * be protected by the lock in the state structure. 1565cff7825Smh27603 */ 1575cff7825Smh27603 int cpudrv_direct_pm = 0; 1585cff7825Smh27603 1595cff7825Smh27603 /* 1605cff7825Smh27603 * Arranges for the handler function to be called at the interval suitable 1615cff7825Smh27603 * for current speed. 1625cff7825Smh27603 */ 1630e751525SEric Saxe #define CPUDRV_MONITOR_INIT(cpudsp) { \ 1640e751525SEric Saxe if (cpudrv_is_enabled(cpudsp)) { \ 1655cff7825Smh27603 ASSERT(mutex_owned(&(cpudsp)->lock)); \ 1667f606aceSMark Haywood (cpudsp)->cpudrv_pm.timeout_id = \ 1670e751525SEric Saxe timeout(cpudrv_monitor_disp, \ 1685cff7825Smh27603 (cpudsp), (((cpudsp)->cpudrv_pm.cur_spd == NULL) ? \ 1690e751525SEric Saxe CPUDRV_QUANT_CNT_OTHR : \ 1705cff7825Smh27603 (cpudsp)->cpudrv_pm.cur_spd->quant_cnt)); \ 1717f606aceSMark Haywood } \ 1725cff7825Smh27603 } 1735cff7825Smh27603 1745cff7825Smh27603 /* 1755cff7825Smh27603 * Arranges for the handler function not to be called back. 1765cff7825Smh27603 */ 1770e751525SEric Saxe #define CPUDRV_MONITOR_FINI(cpudsp) { \ 1785cff7825Smh27603 timeout_id_t tmp_tid; \ 1795cff7825Smh27603 ASSERT(mutex_owned(&(cpudsp)->lock)); \ 1805cff7825Smh27603 tmp_tid = (cpudsp)->cpudrv_pm.timeout_id; \ 1815cff7825Smh27603 (cpudsp)->cpudrv_pm.timeout_id = 0; \ 1825cff7825Smh27603 mutex_exit(&(cpudsp)->lock); \ 1837f606aceSMark Haywood if (tmp_tid != 0) { \ 1845cff7825Smh27603 (void) untimeout(tmp_tid); \ 1855cff7825Smh27603 mutex_enter(&(cpudsp)->cpudrv_pm.timeout_lock); \ 1865cff7825Smh27603 while ((cpudsp)->cpudrv_pm.timeout_count != 0) \ 1875cff7825Smh27603 cv_wait(&(cpudsp)->cpudrv_pm.timeout_cv, \ 1885cff7825Smh27603 &(cpudsp)->cpudrv_pm.timeout_lock); \ 1895cff7825Smh27603 mutex_exit(&(cpudsp)->cpudrv_pm.timeout_lock); \ 1907f606aceSMark Haywood } \ 1915cff7825Smh27603 mutex_enter(&(cpudsp)->lock); \ 1925cff7825Smh27603 } 1935cff7825Smh27603 1945cff7825Smh27603 int 1955cff7825Smh27603 _init(void) 1965cff7825Smh27603 { 1975cff7825Smh27603 int error; 1985cff7825Smh27603 1995cff7825Smh27603 DPRINTF(D_INIT, (" _init: function called\n")); 2005cff7825Smh27603 if ((error = ddi_soft_state_init(&cpudrv_state, 2015cff7825Smh27603 sizeof (cpudrv_devstate_t), 0)) != 0) { 2025cff7825Smh27603 return (error); 2035cff7825Smh27603 } 2045cff7825Smh27603 2055cff7825Smh27603 if ((error = mod_install(&modlinkage)) != 0) { 2065cff7825Smh27603 ddi_soft_state_fini(&cpudrv_state); 2075cff7825Smh27603 } 2085cff7825Smh27603 2095cff7825Smh27603 /* 2105cff7825Smh27603 * Callbacks used by the PPM driver. 2115cff7825Smh27603 */ 2120e751525SEric Saxe CPUDRV_SET_PPM_CALLBACKS(); 2135cff7825Smh27603 return (error); 2145cff7825Smh27603 } 2155cff7825Smh27603 2165cff7825Smh27603 int 2175cff7825Smh27603 _fini(void) 2185cff7825Smh27603 { 2195cff7825Smh27603 int error; 2205cff7825Smh27603 2215cff7825Smh27603 DPRINTF(D_FINI, (" _fini: function called\n")); 2225cff7825Smh27603 if ((error = mod_remove(&modlinkage)) == 0) { 2235cff7825Smh27603 ddi_soft_state_fini(&cpudrv_state); 2245cff7825Smh27603 } 2255cff7825Smh27603 2265cff7825Smh27603 return (error); 2275cff7825Smh27603 } 2285cff7825Smh27603 2295cff7825Smh27603 int 2305cff7825Smh27603 _info(struct modinfo *modinfop) 2315cff7825Smh27603 { 2325cff7825Smh27603 return (mod_info(&modlinkage, modinfop)); 2335cff7825Smh27603 } 2345cff7825Smh27603 2355cff7825Smh27603 /* 2365cff7825Smh27603 * Driver attach(9e) entry point. 2375cff7825Smh27603 */ 2385cff7825Smh27603 static int 2395cff7825Smh27603 cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 2405cff7825Smh27603 { 2415cff7825Smh27603 int instance; 2425cff7825Smh27603 cpudrv_devstate_t *cpudsp; 2435cff7825Smh27603 2445cff7825Smh27603 instance = ddi_get_instance(dip); 2455cff7825Smh27603 2465cff7825Smh27603 switch (cmd) { 2475cff7825Smh27603 case DDI_ATTACH: 2485cff7825Smh27603 DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: " 2495cff7825Smh27603 "DDI_ATTACH called\n", instance)); 2500e751525SEric Saxe if (!cpudrv_is_enabled(NULL)) 2517f606aceSMark Haywood return (DDI_FAILURE); 2525cff7825Smh27603 if (ddi_soft_state_zalloc(cpudrv_state, instance) != 2535cff7825Smh27603 DDI_SUCCESS) { 2545cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 2555cff7825Smh27603 "can't allocate state", instance); 2560e751525SEric Saxe cpudrv_enabled = B_FALSE; 2575cff7825Smh27603 return (DDI_FAILURE); 2585cff7825Smh27603 } 2595cff7825Smh27603 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == 2605cff7825Smh27603 NULL) { 2615cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 2625cff7825Smh27603 "can't get state", instance); 2635cff7825Smh27603 ddi_soft_state_free(cpudrv_state, instance); 2640e751525SEric Saxe cpudrv_enabled = B_FALSE; 2655cff7825Smh27603 return (DDI_FAILURE); 2665cff7825Smh27603 } 2675cff7825Smh27603 cpudsp->dip = dip; 2685cff7825Smh27603 2695cff7825Smh27603 /* 2705cff7825Smh27603 * Find CPU number for this dev_info node. 2715cff7825Smh27603 */ 2720e751525SEric Saxe if (!cpudrv_get_cpu_id(dip, &(cpudsp->cpu_id))) { 2735cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 2745cff7825Smh27603 "can't convert dip to cpu_id", instance); 2755cff7825Smh27603 ddi_soft_state_free(cpudrv_state, instance); 2760e751525SEric Saxe cpudrv_enabled = B_FALSE; 2775cff7825Smh27603 return (DDI_FAILURE); 2785cff7825Smh27603 } 279444f66e7SMark Haywood 2807f606aceSMark Haywood mutex_init(&cpudsp->lock, NULL, MUTEX_DRIVER, NULL); 2810e751525SEric Saxe if (cpudrv_is_enabled(cpudsp)) { 2820e751525SEric Saxe if (cpudrv_init(cpudsp) != DDI_SUCCESS) { 2830e751525SEric Saxe cpudrv_enabled = B_FALSE; 2840e751525SEric Saxe cpudrv_free(cpudsp); 2857f606aceSMark Haywood ddi_soft_state_free(cpudrv_state, instance); 2867f606aceSMark Haywood return (DDI_FAILURE); 2877f606aceSMark Haywood } 2880e751525SEric Saxe if (cpudrv_comp_create(cpudsp) != DDI_SUCCESS) { 2890e751525SEric Saxe cpudrv_enabled = B_FALSE; 2900e751525SEric Saxe cpudrv_free(cpudsp); 2917f606aceSMark Haywood ddi_soft_state_free(cpudrv_state, instance); 2925cff7825Smh27603 return (DDI_FAILURE); 2935cff7825Smh27603 } 2945cff7825Smh27603 if (ddi_prop_update_string(DDI_DEV_T_NONE, 2955cff7825Smh27603 dip, "pm-class", "CPU") != DDI_PROP_SUCCESS) { 2960e751525SEric Saxe cpudrv_enabled = B_FALSE; 2970e751525SEric Saxe cpudrv_free(cpudsp); 2987f606aceSMark Haywood ddi_soft_state_free(cpudrv_state, instance); 2995cff7825Smh27603 return (DDI_FAILURE); 3005cff7825Smh27603 } 3015cff7825Smh27603 3025cff7825Smh27603 /* 3037f606aceSMark Haywood * Taskq is used to dispatch routine to monitor CPU 3047f606aceSMark Haywood * activities. 3055cff7825Smh27603 */ 306444f66e7SMark Haywood cpudsp->cpudrv_pm.tq = ddi_taskq_create(dip, 307444f66e7SMark Haywood "cpudrv_monitor", CPUDRV_TASKQ_THREADS, 308444f66e7SMark Haywood TASKQ_DEFAULTPRI, 0); 3095cff7825Smh27603 3107f606aceSMark Haywood mutex_init(&cpudsp->cpudrv_pm.timeout_lock, NULL, 3117f606aceSMark Haywood MUTEX_DRIVER, NULL); 3127f606aceSMark Haywood cv_init(&cpudsp->cpudrv_pm.timeout_cv, NULL, 3137f606aceSMark Haywood CV_DEFAULT, NULL); 3145cff7825Smh27603 3155cff7825Smh27603 /* 3167f606aceSMark Haywood * Driver needs to assume that CPU is running at 3177f606aceSMark Haywood * unknown speed at DDI_ATTACH and switch it to the 3187f606aceSMark Haywood * needed speed. We assume that initial needed speed 3197f606aceSMark Haywood * is full speed for us. 3205cff7825Smh27603 */ 3215cff7825Smh27603 /* 3220e751525SEric Saxe * We need to take the lock because cpudrv_monitor() 3235cff7825Smh27603 * will start running in parallel with attach(). 3245cff7825Smh27603 */ 3255cff7825Smh27603 mutex_enter(&cpudsp->lock); 3265cff7825Smh27603 cpudsp->cpudrv_pm.cur_spd = NULL; 32768afbec1Smh27603 cpudsp->cpudrv_pm.pm_started = B_FALSE; 3285cff7825Smh27603 /* 3297f606aceSMark Haywood * We don't call pm_raise_power() directly from attach 3307f606aceSMark Haywood * because driver attach for a slave CPU node can 3317f606aceSMark Haywood * happen before the CPU is even initialized. We just 3327f606aceSMark Haywood * start the monitoring system which understands 33317353130SMark Haywood * unknown speed and moves CPU to top speed when it 33417353130SMark Haywood * has been initialized. 3355cff7825Smh27603 */ 3360e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 3375cff7825Smh27603 mutex_exit(&cpudsp->lock); 3385cff7825Smh27603 3397f606aceSMark Haywood } 3407f606aceSMark Haywood 341444f66e7SMark Haywood if (!cpudrv_mach_init(cpudsp)) { 342444f66e7SMark Haywood cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 343444f66e7SMark Haywood "cpudrv_mach_init failed", instance); 344444f66e7SMark Haywood cpudrv_enabled = B_FALSE; 345444f66e7SMark Haywood cpudrv_free(cpudsp); 346444f66e7SMark Haywood ddi_soft_state_free(cpudrv_state, instance); 347444f66e7SMark Haywood return (DDI_FAILURE); 348444f66e7SMark Haywood } 349444f66e7SMark Haywood 3500e751525SEric Saxe CPUDRV_INSTALL_MAX_CHANGE_HANDLER(cpudsp); 3515cff7825Smh27603 352444f66e7SMark Haywood (void) ddi_prop_update_int(DDI_DEV_T_NONE, dip, 353444f66e7SMark Haywood DDI_NO_AUTODETACH, 1); 3545cff7825Smh27603 ddi_report_dev(dip); 3555cff7825Smh27603 return (DDI_SUCCESS); 3565cff7825Smh27603 3575cff7825Smh27603 case DDI_RESUME: 3585cff7825Smh27603 DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: " 3595cff7825Smh27603 "DDI_RESUME called\n", instance)); 3607f606aceSMark Haywood 3617f606aceSMark Haywood cpudsp = ddi_get_soft_state(cpudrv_state, instance); 3627f606aceSMark Haywood ASSERT(cpudsp != NULL); 3637f606aceSMark Haywood 3647f606aceSMark Haywood /* 3657f606aceSMark Haywood * Nothing to do for resume, if not doing active PM. 3667f606aceSMark Haywood */ 3670e751525SEric Saxe if (!cpudrv_is_enabled(cpudsp)) 3687f606aceSMark Haywood return (DDI_SUCCESS); 3697f606aceSMark Haywood 3705cff7825Smh27603 mutex_enter(&cpudsp->lock); 3715cff7825Smh27603 /* 3725cff7825Smh27603 * Driver needs to assume that CPU is running at unknown speed 3735cff7825Smh27603 * at DDI_RESUME and switch it to the needed speed. We assume 3745cff7825Smh27603 * that the needed speed is full speed for us. 3755cff7825Smh27603 */ 3765cff7825Smh27603 cpudsp->cpudrv_pm.cur_spd = NULL; 3770e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 3785cff7825Smh27603 mutex_exit(&cpudsp->lock); 3790e751525SEric Saxe CPUDRV_REDEFINE_TOPSPEED(dip); 3805cff7825Smh27603 return (DDI_SUCCESS); 3815cff7825Smh27603 3825cff7825Smh27603 default: 3835cff7825Smh27603 return (DDI_FAILURE); 3845cff7825Smh27603 } 3855cff7825Smh27603 } 3865cff7825Smh27603 3875cff7825Smh27603 /* 3885cff7825Smh27603 * Driver detach(9e) entry point. 3895cff7825Smh27603 */ 3905cff7825Smh27603 static int 3915cff7825Smh27603 cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 3925cff7825Smh27603 { 3935cff7825Smh27603 int instance; 3945cff7825Smh27603 cpudrv_devstate_t *cpudsp; 3955cff7825Smh27603 cpudrv_pm_t *cpupm; 3965cff7825Smh27603 3975cff7825Smh27603 instance = ddi_get_instance(dip); 3985cff7825Smh27603 3995cff7825Smh27603 switch (cmd) { 4005cff7825Smh27603 case DDI_DETACH: 4015cff7825Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: " 4025cff7825Smh27603 "DDI_DETACH called\n", instance)); 403444f66e7SMark Haywood 404444f66e7SMark Haywood #if defined(__x86) 405444f66e7SMark Haywood cpudsp = ddi_get_soft_state(cpudrv_state, instance); 406444f66e7SMark Haywood ASSERT(cpudsp != NULL); 407444f66e7SMark Haywood 408444f66e7SMark Haywood /* 409444f66e7SMark Haywood * Nothing to do for detach, if no doing active PM. 410444f66e7SMark Haywood */ 411444f66e7SMark Haywood if (!cpudrv_is_enabled(cpudsp)) 412444f66e7SMark Haywood return (DDI_SUCCESS); 413444f66e7SMark Haywood 414444f66e7SMark Haywood /* 415444f66e7SMark Haywood * uninstall PPC/_TPC change notification handler 416444f66e7SMark Haywood */ 417444f66e7SMark Haywood CPUDRV_UNINSTALL_MAX_CHANGE_HANDLER(cpudsp); 418444f66e7SMark Haywood 419444f66e7SMark Haywood /* 420444f66e7SMark Haywood * destruct platform specific resource 421444f66e7SMark Haywood */ 422444f66e7SMark Haywood if (!cpudrv_mach_fini(cpudsp)) 423444f66e7SMark Haywood return (DDI_FAILURE); 424444f66e7SMark Haywood 425444f66e7SMark Haywood mutex_enter(&cpudsp->lock); 426444f66e7SMark Haywood CPUDRV_MONITOR_FINI(cpudsp); 427444f66e7SMark Haywood cv_destroy(&cpudsp->cpudrv_pm.timeout_cv); 428444f66e7SMark Haywood mutex_destroy(&cpudsp->cpudrv_pm.timeout_lock); 429444f66e7SMark Haywood ddi_taskq_destroy(cpudsp->cpudrv_pm.tq); 430444f66e7SMark Haywood cpudrv_free(cpudsp); 431444f66e7SMark Haywood mutex_exit(&cpudsp->lock); 432444f66e7SMark Haywood mutex_destroy(&cpudsp->lock); 433444f66e7SMark Haywood ddi_soft_state_free(cpudrv_state, instance); 434444f66e7SMark Haywood (void) ddi_prop_update_int(DDI_DEV_T_NONE, dip, 435444f66e7SMark Haywood DDI_NO_AUTODETACH, 0); 436444f66e7SMark Haywood return (DDI_SUCCESS); 437444f66e7SMark Haywood 438444f66e7SMark Haywood #else 4395cff7825Smh27603 /* 4405cff7825Smh27603 * If the only thing supported by the driver is power 4415cff7825Smh27603 * management, we can in future enhance the driver and 4425cff7825Smh27603 * framework that loads it to unload the driver when 4435cff7825Smh27603 * user has disabled CPU power management. 4445cff7825Smh27603 */ 4455cff7825Smh27603 return (DDI_FAILURE); 446444f66e7SMark Haywood #endif 4475cff7825Smh27603 4485cff7825Smh27603 case DDI_SUSPEND: 4495cff7825Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: " 4505cff7825Smh27603 "DDI_SUSPEND called\n", instance)); 4517f606aceSMark Haywood 4527f606aceSMark Haywood cpudsp = ddi_get_soft_state(cpudrv_state, instance); 4537f606aceSMark Haywood ASSERT(cpudsp != NULL); 4547f606aceSMark Haywood 4557f606aceSMark Haywood /* 4567f606aceSMark Haywood * Nothing to do for suspend, if not doing active PM. 4577f606aceSMark Haywood */ 4580e751525SEric Saxe if (!cpudrv_is_enabled(cpudsp)) 4597f606aceSMark Haywood return (DDI_SUCCESS); 4607f606aceSMark Haywood 4615cff7825Smh27603 /* 4625cff7825Smh27603 * During a checkpoint-resume sequence, framework will 4635cff7825Smh27603 * stop interrupts to quiesce kernel activity. This will 4645cff7825Smh27603 * leave our monitoring system ineffective. Handle this 4655cff7825Smh27603 * by stopping our monitoring system and bringing CPU 4665cff7825Smh27603 * to full speed. In case we are in special direct pm 4675cff7825Smh27603 * mode, we leave the CPU at whatever speed it is. This 4685cff7825Smh27603 * is harmless other than speed. 4695cff7825Smh27603 */ 4705cff7825Smh27603 mutex_enter(&cpudsp->lock); 4715cff7825Smh27603 cpupm = &(cpudsp->cpudrv_pm); 4725cff7825Smh27603 4735cff7825Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: DDI_SUSPEND - " 47417353130SMark Haywood "cur_spd %d, topspeed %d\n", instance, 47517353130SMark Haywood cpupm->cur_spd->pm_level, 4760e751525SEric Saxe CPUDRV_TOPSPEED(cpupm)->pm_level)); 4775cff7825Smh27603 4780e751525SEric Saxe CPUDRV_MONITOR_FINI(cpudsp); 4795cff7825Smh27603 48017353130SMark Haywood if (!cpudrv_direct_pm && (cpupm->cur_spd != 4810e751525SEric Saxe CPUDRV_TOPSPEED(cpupm))) { 4825cff7825Smh27603 if (cpupm->pm_busycnt < 1) { 4830e751525SEric Saxe if ((pm_busy_component(dip, CPUDRV_COMP_NUM) 4845cff7825Smh27603 == DDI_SUCCESS)) { 4855cff7825Smh27603 cpupm->pm_busycnt++; 4865cff7825Smh27603 } else { 4870e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 4885cff7825Smh27603 mutex_exit(&cpudsp->lock); 4895cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_detach: " 4905cff7825Smh27603 "instance %d: can't busy CPU " 4915cff7825Smh27603 "component", instance); 4925cff7825Smh27603 return (DDI_FAILURE); 4935cff7825Smh27603 } 4945cff7825Smh27603 } 4955cff7825Smh27603 mutex_exit(&cpudsp->lock); 4960e751525SEric Saxe if (pm_raise_power(dip, CPUDRV_COMP_NUM, 4970e751525SEric Saxe CPUDRV_TOPSPEED(cpupm)->pm_level) != 49817353130SMark Haywood DDI_SUCCESS) { 4995cff7825Smh27603 mutex_enter(&cpudsp->lock); 5000e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 5015cff7825Smh27603 mutex_exit(&cpudsp->lock); 5025cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_detach: instance %d: " 50317353130SMark Haywood "can't raise CPU power level to %d", 50417353130SMark Haywood instance, 5050e751525SEric Saxe CPUDRV_TOPSPEED(cpupm)->pm_level); 5065cff7825Smh27603 return (DDI_FAILURE); 5075cff7825Smh27603 } else { 5085cff7825Smh27603 return (DDI_SUCCESS); 5095cff7825Smh27603 } 5105cff7825Smh27603 } else { 5115cff7825Smh27603 mutex_exit(&cpudsp->lock); 5125cff7825Smh27603 return (DDI_SUCCESS); 5135cff7825Smh27603 } 5145cff7825Smh27603 5155cff7825Smh27603 default: 5165cff7825Smh27603 return (DDI_FAILURE); 5175cff7825Smh27603 } 5185cff7825Smh27603 } 5195cff7825Smh27603 5205cff7825Smh27603 /* 5215cff7825Smh27603 * Driver power(9e) entry point. 5225cff7825Smh27603 * 5235cff7825Smh27603 * Driver's notion of current power is set *only* in power(9e) entry point 5245cff7825Smh27603 * after actual power change operation has been successfully completed. 5255cff7825Smh27603 */ 5265cff7825Smh27603 /* ARGSUSED */ 5275cff7825Smh27603 static int 5285cff7825Smh27603 cpudrv_power(dev_info_t *dip, int comp, int level) 5295cff7825Smh27603 { 5305cff7825Smh27603 int instance; 5315cff7825Smh27603 cpudrv_devstate_t *cpudsp; 5320e751525SEric Saxe cpudrv_pm_t *cpudrvpm; 5335cff7825Smh27603 cpudrv_pm_spd_t *new_spd; 5345cff7825Smh27603 boolean_t is_ready; 5355cff7825Smh27603 int ret; 5365cff7825Smh27603 5375cff7825Smh27603 instance = ddi_get_instance(dip); 5385cff7825Smh27603 5395cff7825Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: level %d\n", 5405cff7825Smh27603 instance, level)); 5410e751525SEric Saxe 5425cff7825Smh27603 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == NULL) { 5430e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_power: instance %d: can't " 5440e751525SEric Saxe "get state", instance); 5455cff7825Smh27603 return (DDI_FAILURE); 5465cff7825Smh27603 } 5475cff7825Smh27603 548*6af9d452Saubrey.li@intel.com /* 549*6af9d452Saubrey.li@intel.com * We're not ready until we can get a cpu_t 550*6af9d452Saubrey.li@intel.com */ 551*6af9d452Saubrey.li@intel.com is_ready = (cpudrv_get_cpu(cpudsp) == DDI_SUCCESS); 552*6af9d452Saubrey.li@intel.com 5535cff7825Smh27603 mutex_enter(&cpudsp->lock); 5540e751525SEric Saxe cpudrvpm = &(cpudsp->cpudrv_pm); 5555cff7825Smh27603 5565cff7825Smh27603 /* 5575cff7825Smh27603 * In normal operation, we fail if we are busy and request is 5585cff7825Smh27603 * to lower the power level. We let this go through if the driver 5595cff7825Smh27603 * is in special direct pm mode. On x86, we also let this through 5607f606aceSMark Haywood * if the change is due to a request to govern the max speed. 5615cff7825Smh27603 */ 5620e751525SEric Saxe if (!cpudrv_direct_pm && (cpudrvpm->pm_busycnt >= 1) && 5630e751525SEric Saxe !cpudrv_is_governor_thread(cpudrvpm)) { 5640e751525SEric Saxe if ((cpudrvpm->cur_spd != NULL) && 5650e751525SEric Saxe (level < cpudrvpm->cur_spd->pm_level)) { 5665cff7825Smh27603 mutex_exit(&cpudsp->lock); 5675cff7825Smh27603 return (DDI_FAILURE); 5685cff7825Smh27603 } 5695cff7825Smh27603 } 5705cff7825Smh27603 5710e751525SEric Saxe for (new_spd = cpudrvpm->head_spd; new_spd; new_spd = 5720e751525SEric Saxe new_spd->down_spd) { 5735cff7825Smh27603 if (new_spd->pm_level == level) 5745cff7825Smh27603 break; 5755cff7825Smh27603 } 5765cff7825Smh27603 if (!new_spd) { 5770e751525SEric Saxe CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm); 5785cff7825Smh27603 mutex_exit(&cpudsp->lock); 5795cff7825Smh27603 cmn_err(CE_WARN, "cpudrv_power: instance %d: " 5805cff7825Smh27603 "can't locate new CPU speed", instance); 5815cff7825Smh27603 return (DDI_FAILURE); 5825cff7825Smh27603 } 5835cff7825Smh27603 5845cff7825Smh27603 /* 5855cff7825Smh27603 * We currently refuse to power manage if the CPU is not ready to 5865cff7825Smh27603 * take cross calls (cross calls fail silently if CPU is not ready 5875cff7825Smh27603 * for it). 5885cff7825Smh27603 * 589444f66e7SMark Haywood * Additionally, for x86 platforms we cannot power manage an instance, 590444f66e7SMark Haywood * until it has been initialized. 5915cff7825Smh27603 */ 592*6af9d452Saubrey.li@intel.com if (is_ready) { 5930e751525SEric Saxe is_ready = CPUDRV_XCALL_IS_READY(cpudsp->cpu_id); 5945cff7825Smh27603 if (!is_ready) { 5955cff7825Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: " 5965cff7825Smh27603 "CPU not ready for x-calls\n", instance)); 597444f66e7SMark Haywood } else if (!(is_ready = cpudrv_power_ready(cpudsp->cp))) { 5985cff7825Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: " 5990e751525SEric Saxe "waiting for all CPUs to be power manageable\n", 6000e751525SEric Saxe instance)); 6015cff7825Smh27603 } 602*6af9d452Saubrey.li@intel.com } 6035cff7825Smh27603 if (!is_ready) { 6040e751525SEric Saxe CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm); 6055cff7825Smh27603 mutex_exit(&cpudsp->lock); 6065cff7825Smh27603 return (DDI_FAILURE); 6075cff7825Smh27603 } 6085cff7825Smh27603 6095cff7825Smh27603 /* 6100e751525SEric Saxe * Execute CPU specific routine on the requested CPU to 6110e751525SEric Saxe * change its speed to normal-speed/divisor. 6125cff7825Smh27603 */ 6130e751525SEric Saxe if ((ret = cpudrv_change_speed(cpudsp, new_spd)) != DDI_SUCCESS) { 6140e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_power: " 6150e751525SEric Saxe "cpudrv_change_speed() return = %d", ret); 6165cff7825Smh27603 mutex_exit(&cpudsp->lock); 6175cff7825Smh27603 return (DDI_FAILURE); 6185cff7825Smh27603 } 6195cff7825Smh27603 6205cff7825Smh27603 /* 6215cff7825Smh27603 * Reset idle threshold time for the new power level. 6225cff7825Smh27603 */ 6230e751525SEric Saxe if ((cpudrvpm->cur_spd != NULL) && (level < 6240e751525SEric Saxe cpudrvpm->cur_spd->pm_level)) { 6250e751525SEric Saxe if (pm_idle_component(dip, CPUDRV_COMP_NUM) == 6265cff7825Smh27603 DDI_SUCCESS) { 6270e751525SEric Saxe if (cpudrvpm->pm_busycnt >= 1) 6280e751525SEric Saxe cpudrvpm->pm_busycnt--; 6290e751525SEric Saxe } else { 6300e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_power: instance %d: " 6310e751525SEric Saxe "can't idle CPU component", 6320e751525SEric Saxe ddi_get_instance(dip)); 6330e751525SEric Saxe } 6345cff7825Smh27603 } 6355cff7825Smh27603 /* 6365cff7825Smh27603 * Reset various parameters because we are now running at new speed. 6375cff7825Smh27603 */ 6380e751525SEric Saxe cpudrvpm->lastquan_mstate[CMS_IDLE] = 0; 6390e751525SEric Saxe cpudrvpm->lastquan_mstate[CMS_SYSTEM] = 0; 6400e751525SEric Saxe cpudrvpm->lastquan_mstate[CMS_USER] = 0; 6410e751525SEric Saxe cpudrvpm->lastquan_ticks = 0; 6420e751525SEric Saxe cpudrvpm->cur_spd = new_spd; 6430e751525SEric Saxe CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm); 6445cff7825Smh27603 mutex_exit(&cpudsp->lock); 6455cff7825Smh27603 6465cff7825Smh27603 return (DDI_SUCCESS); 6475cff7825Smh27603 } 6485cff7825Smh27603 6495cff7825Smh27603 /* 6505cff7825Smh27603 * Initialize power management data. 6515cff7825Smh27603 */ 6525cff7825Smh27603 static int 6530e751525SEric Saxe cpudrv_init(cpudrv_devstate_t *cpudsp) 6545cff7825Smh27603 { 6555cff7825Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 6565cff7825Smh27603 cpudrv_pm_spd_t *cur_spd; 6575cff7825Smh27603 cpudrv_pm_spd_t *prev_spd = NULL; 6585cff7825Smh27603 int *speeds; 6595cff7825Smh27603 uint_t nspeeds; 6605cff7825Smh27603 int idle_cnt_percent; 6615cff7825Smh27603 int user_cnt_percent; 6625cff7825Smh27603 int i; 6635cff7825Smh27603 6640e751525SEric Saxe CPUDRV_GET_SPEEDS(cpudsp, speeds, nspeeds); 6655cff7825Smh27603 if (nspeeds < 2) { 6665cff7825Smh27603 /* Need at least two speeds to power manage */ 6670e751525SEric Saxe CPUDRV_FREE_SPEEDS(speeds, nspeeds); 6685cff7825Smh27603 return (DDI_FAILURE); 6695cff7825Smh27603 } 6705cff7825Smh27603 cpupm->num_spd = nspeeds; 6715cff7825Smh27603 6725cff7825Smh27603 /* 6735cff7825Smh27603 * Calculate the watermarks and other parameters based on the 6745cff7825Smh27603 * supplied speeds. 6755cff7825Smh27603 * 6765cff7825Smh27603 * One of the basic assumption is that for X amount of CPU work, 6775cff7825Smh27603 * if CPU is slowed down by a factor of N, the time it takes to 6785cff7825Smh27603 * do the same work will be N * X. 6795cff7825Smh27603 * 6805cff7825Smh27603 * The driver declares that a CPU is idle and ready for slowed down, 6815cff7825Smh27603 * if amount of idle thread is more than the current speed idle_hwm 6825cff7825Smh27603 * without dropping below idle_hwm a number of consecutive sampling 6835cff7825Smh27603 * intervals and number of running threads in user mode are below 6845cff7825Smh27603 * user_lwm. We want to set the current user_lwm such that if we 6855cff7825Smh27603 * just switched to the next slower speed with no change in real work 6865cff7825Smh27603 * load, the amount of user threads at the slower speed will be such 6875cff7825Smh27603 * that it falls below the slower speed's user_hwm. If we didn't do 6885cff7825Smh27603 * that then we will just come back to the higher speed as soon as we 6895cff7825Smh27603 * go down even with no change in work load. 6905cff7825Smh27603 * The user_hwm is a fixed precentage and not calculated dynamically. 6915cff7825Smh27603 * 6925cff7825Smh27603 * We bring the CPU up if idle thread at current speed is less than 6935cff7825Smh27603 * the current speed idle_lwm for a number of consecutive sampling 6945cff7825Smh27603 * intervals or user threads are above the user_hwm for the current 6955cff7825Smh27603 * speed. 6965cff7825Smh27603 */ 6975cff7825Smh27603 for (i = 0; i < nspeeds; i++) { 6985cff7825Smh27603 cur_spd = kmem_zalloc(sizeof (cpudrv_pm_spd_t), KM_SLEEP); 6995cff7825Smh27603 cur_spd->speed = speeds[i]; 7005cff7825Smh27603 if (i == 0) { /* normal speed */ 7015cff7825Smh27603 cpupm->head_spd = cur_spd; 7020e751525SEric Saxe CPUDRV_TOPSPEED(cpupm) = cur_spd; 7030e751525SEric Saxe cur_spd->quant_cnt = CPUDRV_QUANT_CNT_NORMAL; 7045cff7825Smh27603 cur_spd->idle_hwm = 7050e751525SEric Saxe (cpudrv_idle_hwm * cur_spd->quant_cnt) / 100; 7065cff7825Smh27603 /* can't speed anymore */ 7075cff7825Smh27603 cur_spd->idle_lwm = 0; 7085cff7825Smh27603 cur_spd->user_hwm = UINT_MAX; 7095cff7825Smh27603 } else { 7100e751525SEric Saxe cur_spd->quant_cnt = CPUDRV_QUANT_CNT_OTHR; 7115cff7825Smh27603 ASSERT(prev_spd != NULL); 7125cff7825Smh27603 prev_spd->down_spd = cur_spd; 7135cff7825Smh27603 cur_spd->up_spd = cpupm->head_spd; 7145cff7825Smh27603 7155cff7825Smh27603 /* 7165cff7825Smh27603 * Let's assume CPU is considered idle at full speed 7175cff7825Smh27603 * when it is spending I% of time in running the idle 7185cff7825Smh27603 * thread. At full speed, CPU will be busy (100 - I) % 7195cff7825Smh27603 * of times. This % of busyness increases by factor of 7205cff7825Smh27603 * N as CPU slows down. CPU that is idle I% of times 7215cff7825Smh27603 * in full speed, it is idle (100 - ((100 - I) * N)) % 7225cff7825Smh27603 * of times in N speed. The idle_lwm is a fixed 7235cff7825Smh27603 * percentage. A large value of N may result in 7245cff7825Smh27603 * idle_hwm to go below idle_lwm. We need to make sure 7255cff7825Smh27603 * that there is at least a buffer zone seperation 7265cff7825Smh27603 * between the idle_lwm and idle_hwm values. 7275cff7825Smh27603 */ 7280e751525SEric Saxe idle_cnt_percent = CPUDRV_IDLE_CNT_PERCENT( 7290e751525SEric Saxe cpudrv_idle_hwm, speeds, i); 7305cff7825Smh27603 idle_cnt_percent = max(idle_cnt_percent, 7310e751525SEric Saxe (cpudrv_idle_lwm + cpudrv_idle_buf_zone)); 7325cff7825Smh27603 cur_spd->idle_hwm = 7335cff7825Smh27603 (idle_cnt_percent * cur_spd->quant_cnt) / 100; 7345cff7825Smh27603 cur_spd->idle_lwm = 7350e751525SEric Saxe (cpudrv_idle_lwm * cur_spd->quant_cnt) / 100; 7365cff7825Smh27603 7375cff7825Smh27603 /* 7385cff7825Smh27603 * The lwm for user threads are determined such that 7395cff7825Smh27603 * if CPU slows down, the load of work in the 7405cff7825Smh27603 * new speed would still keep the CPU at or below the 7415cff7825Smh27603 * user_hwm in the new speed. This is to prevent 7425cff7825Smh27603 * the quick jump back up to higher speed. 7435cff7825Smh27603 */ 7440e751525SEric Saxe cur_spd->user_hwm = (cpudrv_user_hwm * 7455cff7825Smh27603 cur_spd->quant_cnt) / 100; 7460e751525SEric Saxe user_cnt_percent = CPUDRV_USER_CNT_PERCENT( 7470e751525SEric Saxe cpudrv_user_hwm, speeds, i); 7485cff7825Smh27603 prev_spd->user_lwm = 7495cff7825Smh27603 (user_cnt_percent * prev_spd->quant_cnt) / 100; 7505cff7825Smh27603 } 7515cff7825Smh27603 prev_spd = cur_spd; 7525cff7825Smh27603 } 7535cff7825Smh27603 /* Slowest speed. Can't slow down anymore */ 7545cff7825Smh27603 cur_spd->idle_hwm = UINT_MAX; 7555cff7825Smh27603 cur_spd->user_lwm = -1; 7565cff7825Smh27603 #ifdef DEBUG 7570e751525SEric Saxe DPRINTF(D_PM_INIT, ("cpudrv_init: instance %d: head_spd spd %d, " 7585cff7825Smh27603 "num_spd %d\n", ddi_get_instance(cpudsp->dip), 7595cff7825Smh27603 cpupm->head_spd->speed, cpupm->num_spd)); 7605cff7825Smh27603 for (cur_spd = cpupm->head_spd; cur_spd; cur_spd = cur_spd->down_spd) { 7610e751525SEric Saxe DPRINTF(D_PM_INIT, ("cpudrv_init: instance %d: speed %d, " 7625cff7825Smh27603 "down_spd spd %d, idle_hwm %d, user_lwm %d, " 7635cff7825Smh27603 "up_spd spd %d, idle_lwm %d, user_hwm %d, " 7645cff7825Smh27603 "quant_cnt %d\n", ddi_get_instance(cpudsp->dip), 7655cff7825Smh27603 cur_spd->speed, 7665cff7825Smh27603 (cur_spd->down_spd ? cur_spd->down_spd->speed : 0), 7675cff7825Smh27603 cur_spd->idle_hwm, cur_spd->user_lwm, 7685cff7825Smh27603 (cur_spd->up_spd ? cur_spd->up_spd->speed : 0), 7695cff7825Smh27603 cur_spd->idle_lwm, cur_spd->user_hwm, 7705cff7825Smh27603 cur_spd->quant_cnt)); 7715cff7825Smh27603 } 7725cff7825Smh27603 #endif /* DEBUG */ 7730e751525SEric Saxe CPUDRV_FREE_SPEEDS(speeds, nspeeds); 7745cff7825Smh27603 return (DDI_SUCCESS); 7755cff7825Smh27603 } 7765cff7825Smh27603 7775cff7825Smh27603 /* 7785cff7825Smh27603 * Free CPU power management data. 7795cff7825Smh27603 */ 7805cff7825Smh27603 static void 7810e751525SEric Saxe cpudrv_free(cpudrv_devstate_t *cpudsp) 7825cff7825Smh27603 { 7835cff7825Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 7845cff7825Smh27603 cpudrv_pm_spd_t *cur_spd, *next_spd; 7855cff7825Smh27603 7865cff7825Smh27603 cur_spd = cpupm->head_spd; 7875cff7825Smh27603 while (cur_spd) { 7885cff7825Smh27603 next_spd = cur_spd->down_spd; 7895cff7825Smh27603 kmem_free(cur_spd, sizeof (cpudrv_pm_spd_t)); 7905cff7825Smh27603 cur_spd = next_spd; 7915cff7825Smh27603 } 7925cff7825Smh27603 bzero(cpupm, sizeof (cpudrv_pm_t)); 7935cff7825Smh27603 } 7945cff7825Smh27603 7955cff7825Smh27603 /* 7965cff7825Smh27603 * Create pm-components property. 7975cff7825Smh27603 */ 7985cff7825Smh27603 static int 7990e751525SEric Saxe cpudrv_comp_create(cpudrv_devstate_t *cpudsp) 8005cff7825Smh27603 { 8015cff7825Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 8025cff7825Smh27603 cpudrv_pm_spd_t *cur_spd; 8035cff7825Smh27603 char **pmc; 8045cff7825Smh27603 int size; 8055cff7825Smh27603 char name[] = "NAME=CPU Speed"; 8065cff7825Smh27603 int i, j; 8075cff7825Smh27603 uint_t comp_spd; 8085cff7825Smh27603 int result = DDI_FAILURE; 8095cff7825Smh27603 8105cff7825Smh27603 pmc = kmem_zalloc((cpupm->num_spd + 1) * sizeof (char *), KM_SLEEP); 8110e751525SEric Saxe size = CPUDRV_COMP_SIZE(); 8120e751525SEric Saxe if (cpupm->num_spd > CPUDRV_COMP_MAX_VAL) { 8130e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_comp_create: instance %d: " 8145cff7825Smh27603 "number of speeds exceeded limits", 8155cff7825Smh27603 ddi_get_instance(cpudsp->dip)); 8165cff7825Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *)); 8175cff7825Smh27603 return (result); 8185cff7825Smh27603 } 8195cff7825Smh27603 8205cff7825Smh27603 for (i = cpupm->num_spd, cur_spd = cpupm->head_spd; i > 0; 8215cff7825Smh27603 i--, cur_spd = cur_spd->down_spd) { 8225cff7825Smh27603 cur_spd->pm_level = i; 8235cff7825Smh27603 pmc[i] = kmem_zalloc((size * sizeof (char)), KM_SLEEP); 8240e751525SEric Saxe comp_spd = CPUDRV_COMP_SPEED(cpupm, cur_spd); 8250e751525SEric Saxe if (comp_spd > CPUDRV_COMP_MAX_VAL) { 8260e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_comp_create: " 8275cff7825Smh27603 "instance %d: speed exceeded limits", 8285cff7825Smh27603 ddi_get_instance(cpudsp->dip)); 8295cff7825Smh27603 for (j = cpupm->num_spd; j >= i; j--) { 8305cff7825Smh27603 kmem_free(pmc[j], size * sizeof (char)); 8315cff7825Smh27603 } 8325cff7825Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * 8335cff7825Smh27603 sizeof (char *)); 8345cff7825Smh27603 return (result); 8355cff7825Smh27603 } 8360e751525SEric Saxe CPUDRV_COMP_SPRINT(pmc[i], cpupm, cur_spd, comp_spd) 8370e751525SEric Saxe DPRINTF(D_PM_COMP_CREATE, ("cpudrv_comp_create: " 8385cff7825Smh27603 "instance %d: pm-components power level %d string '%s'\n", 8395cff7825Smh27603 ddi_get_instance(cpudsp->dip), i, pmc[i])); 8405cff7825Smh27603 } 8415cff7825Smh27603 pmc[0] = kmem_zalloc(sizeof (name), KM_SLEEP); 8425cff7825Smh27603 (void) strcat(pmc[0], name); 8430e751525SEric Saxe DPRINTF(D_PM_COMP_CREATE, ("cpudrv_comp_create: instance %d: " 8445cff7825Smh27603 "pm-components component name '%s'\n", 8455cff7825Smh27603 ddi_get_instance(cpudsp->dip), pmc[0])); 8465cff7825Smh27603 8475cff7825Smh27603 if (ddi_prop_update_string_array(DDI_DEV_T_NONE, cpudsp->dip, 8485cff7825Smh27603 "pm-components", pmc, cpupm->num_spd + 1) == DDI_PROP_SUCCESS) { 8495cff7825Smh27603 result = DDI_SUCCESS; 8505cff7825Smh27603 } else { 8510e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_comp_create: instance %d: " 8525cff7825Smh27603 "can't create pm-components property", 8535cff7825Smh27603 ddi_get_instance(cpudsp->dip)); 8545cff7825Smh27603 } 8555cff7825Smh27603 8565cff7825Smh27603 for (i = cpupm->num_spd; i > 0; i--) { 8575cff7825Smh27603 kmem_free(pmc[i], size * sizeof (char)); 8585cff7825Smh27603 } 8595cff7825Smh27603 kmem_free(pmc[0], sizeof (name)); 8605cff7825Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *)); 8615cff7825Smh27603 return (result); 8625cff7825Smh27603 } 8635cff7825Smh27603 8645cff7825Smh27603 /* 8655cff7825Smh27603 * Mark a component idle. 8665cff7825Smh27603 */ 8670e751525SEric Saxe #define CPUDRV_MONITOR_PM_IDLE_COMP(dip, cpupm) { \ 8685cff7825Smh27603 if ((cpupm)->pm_busycnt >= 1) { \ 8690e751525SEric Saxe if (pm_idle_component((dip), CPUDRV_COMP_NUM) == \ 8705cff7825Smh27603 DDI_SUCCESS) { \ 8710e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: " \ 8725cff7825Smh27603 "instance %d: pm_idle_component called\n", \ 8735cff7825Smh27603 ddi_get_instance((dip)))); \ 8745cff7825Smh27603 (cpupm)->pm_busycnt--; \ 8755cff7825Smh27603 } else { \ 8760e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_monitor: instance %d: " \ 8775cff7825Smh27603 "can't idle CPU component", \ 8785cff7825Smh27603 ddi_get_instance((dip))); \ 8795cff7825Smh27603 } \ 8805cff7825Smh27603 } \ 8815cff7825Smh27603 } 8825cff7825Smh27603 8835cff7825Smh27603 /* 8845cff7825Smh27603 * Marks a component busy in both PM framework and driver state structure. 8855cff7825Smh27603 */ 8860e751525SEric Saxe #define CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm) { \ 8875cff7825Smh27603 if ((cpupm)->pm_busycnt < 1) { \ 8880e751525SEric Saxe if (pm_busy_component((dip), CPUDRV_COMP_NUM) == \ 8895cff7825Smh27603 DDI_SUCCESS) { \ 8900e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: " \ 8915cff7825Smh27603 "instance %d: pm_busy_component called\n", \ 8925cff7825Smh27603 ddi_get_instance((dip)))); \ 8935cff7825Smh27603 (cpupm)->pm_busycnt++; \ 8945cff7825Smh27603 } else { \ 8950e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_monitor: instance %d: " \ 8965cff7825Smh27603 "can't busy CPU component", \ 8975cff7825Smh27603 ddi_get_instance((dip))); \ 8985cff7825Smh27603 } \ 8995cff7825Smh27603 } \ 9005cff7825Smh27603 } 9015cff7825Smh27603 9025cff7825Smh27603 /* 9035cff7825Smh27603 * Marks a component busy and calls pm_raise_power(). 9045cff7825Smh27603 */ 90567bdf3b0SMark Haywood #define CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, new_spd) { \ 90667bdf3b0SMark Haywood int ret; \ 9075cff7825Smh27603 /* \ 9085cff7825Smh27603 * Mark driver and PM framework busy first so framework doesn't try \ 9095cff7825Smh27603 * to bring CPU to lower speed when we need to be at higher speed. \ 9105cff7825Smh27603 */ \ 9110e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_COMP((dip), (cpupm)); \ 9125cff7825Smh27603 mutex_exit(&(cpudsp)->lock); \ 9130e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: " \ 9145cff7825Smh27603 "pm_raise_power called to %d\n", ddi_get_instance((dip)), \ 91567bdf3b0SMark Haywood (new_spd->pm_level))); \ 91667bdf3b0SMark Haywood ret = pm_raise_power((dip), CPUDRV_COMP_NUM, (new_spd->pm_level)); \ 91767bdf3b0SMark Haywood if (ret != DDI_SUCCESS) { \ 9180e751525SEric Saxe cmn_err(CE_WARN, "cpudrv_monitor: instance %d: can't " \ 9195cff7825Smh27603 "raise CPU power level", ddi_get_instance((dip))); \ 9205cff7825Smh27603 } \ 9215cff7825Smh27603 mutex_enter(&(cpudsp)->lock); \ 92267bdf3b0SMark Haywood if (ret == DDI_SUCCESS && cpudsp->cpudrv_pm.cur_spd == NULL) { \ 92367bdf3b0SMark Haywood cpudsp->cpudrv_pm.cur_spd = new_spd; \ 92467bdf3b0SMark Haywood } \ 9255cff7825Smh27603 } 9265cff7825Smh27603 9275cff7825Smh27603 /* 9285cff7825Smh27603 * In order to monitor a CPU, we need to hold cpu_lock to access CPU 9295cff7825Smh27603 * statistics. Holding cpu_lock is not allowed from a callout routine. 9305cff7825Smh27603 * We dispatch a taskq to do that job. 9315cff7825Smh27603 */ 9325cff7825Smh27603 static void 9330e751525SEric Saxe cpudrv_monitor_disp(void *arg) 9345cff7825Smh27603 { 9355cff7825Smh27603 cpudrv_devstate_t *cpudsp = (cpudrv_devstate_t *)arg; 9365cff7825Smh27603 9375cff7825Smh27603 /* 9385cff7825Smh27603 * We are here because the last task has scheduled a timeout. 9395cff7825Smh27603 * The queue should be empty at this time. 9405cff7825Smh27603 */ 9415cff7825Smh27603 mutex_enter(&cpudsp->cpudrv_pm.timeout_lock); 942444f66e7SMark Haywood if ((ddi_taskq_dispatch(cpudsp->cpudrv_pm.tq, cpudrv_monitor, arg, 943444f66e7SMark Haywood DDI_NOSLEEP)) != DDI_SUCCESS) { 9445cff7825Smh27603 mutex_exit(&cpudsp->cpudrv_pm.timeout_lock); 9450e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor_disp: failed to " 9460e751525SEric Saxe "dispatch the cpudrv_monitor taskq\n")); 9475cff7825Smh27603 mutex_enter(&cpudsp->lock); 9480e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 9495cff7825Smh27603 mutex_exit(&cpudsp->lock); 9505cff7825Smh27603 return; 9515cff7825Smh27603 } 9525cff7825Smh27603 cpudsp->cpudrv_pm.timeout_count++; 9535cff7825Smh27603 mutex_exit(&cpudsp->cpudrv_pm.timeout_lock); 9545cff7825Smh27603 } 9555cff7825Smh27603 9565cff7825Smh27603 /* 9575cff7825Smh27603 * Monitors each CPU for the amount of time idle thread was running in the 9585cff7825Smh27603 * last quantum and arranges for the CPU to go to the lower or higher speed. 9595cff7825Smh27603 * Called at the time interval appropriate for the current speed. The 9600e751525SEric Saxe * time interval for normal speed is CPUDRV_QUANT_CNT_NORMAL. The time 9615cff7825Smh27603 * interval for other speeds (including unknown speed) is 9620e751525SEric Saxe * CPUDRV_QUANT_CNT_OTHR. 9635cff7825Smh27603 */ 9645cff7825Smh27603 static void 9650e751525SEric Saxe cpudrv_monitor(void *arg) 9665cff7825Smh27603 { 9675cff7825Smh27603 cpudrv_devstate_t *cpudsp = (cpudrv_devstate_t *)arg; 9685cff7825Smh27603 cpudrv_pm_t *cpupm; 9695cff7825Smh27603 cpudrv_pm_spd_t *cur_spd, *new_spd; 9705cff7825Smh27603 dev_info_t *dip; 9715cff7825Smh27603 uint_t idle_cnt, user_cnt, system_cnt; 972fcddbe1fSMark Haywood clock_t ticks; 973fcddbe1fSMark Haywood uint_t tick_cnt; 9745cff7825Smh27603 hrtime_t msnsecs[NCMSTATES]; 9755cff7825Smh27603 boolean_t is_ready; 9765cff7825Smh27603 9775cff7825Smh27603 #define GET_CPU_MSTATE_CNT(state, cnt) \ 9785cff7825Smh27603 msnsecs[state] = NSEC_TO_TICK(msnsecs[state]); \ 9795cff7825Smh27603 if (cpupm->lastquan_mstate[state] > msnsecs[state]) \ 9805cff7825Smh27603 msnsecs[state] = cpupm->lastquan_mstate[state]; \ 9815cff7825Smh27603 cnt = msnsecs[state] - cpupm->lastquan_mstate[state]; \ 9825cff7825Smh27603 cpupm->lastquan_mstate[state] = msnsecs[state] 9835cff7825Smh27603 984*6af9d452Saubrey.li@intel.com /* 985*6af9d452Saubrey.li@intel.com * We're not ready until we can get a cpu_t 986*6af9d452Saubrey.li@intel.com */ 987*6af9d452Saubrey.li@intel.com is_ready = (cpudrv_get_cpu(cpudsp) == DDI_SUCCESS); 988*6af9d452Saubrey.li@intel.com 9895cff7825Smh27603 mutex_enter(&cpudsp->lock); 9905cff7825Smh27603 cpupm = &(cpudsp->cpudrv_pm); 9915cff7825Smh27603 if (cpupm->timeout_id == 0) { 9925cff7825Smh27603 mutex_exit(&cpudsp->lock); 9935cff7825Smh27603 goto do_return; 9945cff7825Smh27603 } 9955cff7825Smh27603 cur_spd = cpupm->cur_spd; 9965cff7825Smh27603 dip = cpudsp->dip; 9975cff7825Smh27603 9985cff7825Smh27603 /* 9995cff7825Smh27603 * We assume that a CPU is initialized and has a valid cpu_t 10005cff7825Smh27603 * structure, if it is ready for cross calls. If this changes, 10015cff7825Smh27603 * additional checks might be needed. 10025cff7825Smh27603 * 1003444f66e7SMark Haywood * Additionally, for x86 platforms we cannot power manage an 1004444f66e7SMark Haywood * instance, until it has been initialized. 10055cff7825Smh27603 */ 1006*6af9d452Saubrey.li@intel.com if (is_ready) { 10070e751525SEric Saxe is_ready = CPUDRV_XCALL_IS_READY(cpudsp->cpu_id); 10085cff7825Smh27603 if (!is_ready) { 10090e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: " 1010*6af9d452Saubrey.li@intel.com "CPU not ready for x-calls\n", 1011*6af9d452Saubrey.li@intel.com ddi_get_instance(dip))); 1012444f66e7SMark Haywood } else if (!(is_ready = cpudrv_power_ready(cpudsp->cp))) { 10130e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: " 10147f606aceSMark Haywood "waiting for all CPUs to be power manageable\n", 10155cff7825Smh27603 ddi_get_instance(dip))); 10165cff7825Smh27603 } 1017*6af9d452Saubrey.li@intel.com } 10185cff7825Smh27603 if (!is_ready) { 10195cff7825Smh27603 /* 10205cff7825Smh27603 * Make sure that we are busy so that framework doesn't 10215cff7825Smh27603 * try to bring us down in this situation. 10225cff7825Smh27603 */ 10230e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm); 10240e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 10255cff7825Smh27603 mutex_exit(&cpudsp->lock); 10265cff7825Smh27603 goto do_return; 10275cff7825Smh27603 } 10285cff7825Smh27603 10295cff7825Smh27603 /* 10305cff7825Smh27603 * Make sure that we are still not at unknown power level. 10315cff7825Smh27603 */ 10325cff7825Smh27603 if (cur_spd == NULL) { 10330e751525SEric Saxe DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: " 10345cff7825Smh27603 "cur_spd is unknown\n", ddi_get_instance(dip))); 10350e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, 103667bdf3b0SMark Haywood CPUDRV_TOPSPEED(cpupm)); 10375cff7825Smh27603 /* 10385cff7825Smh27603 * We just changed the speed. Wait till at least next 10395cff7825Smh27603 * call to this routine before proceeding ahead. 10405cff7825Smh27603 */ 10410e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 10425cff7825Smh27603 mutex_exit(&cpudsp->lock); 10435cff7825Smh27603 goto do_return; 10445cff7825Smh27603 } 10455cff7825Smh27603 104668afbec1Smh27603 if (!cpupm->pm_started) { 104768afbec1Smh27603 cpupm->pm_started = B_TRUE; 10480e751525SEric Saxe cpudrv_set_supp_freqs(cpudsp); 104968afbec1Smh27603 } 10505cff7825Smh27603 10510e751525SEric Saxe get_cpu_mstate(cpudsp->cp, msnsecs); 10525cff7825Smh27603 GET_CPU_MSTATE_CNT(CMS_IDLE, idle_cnt); 10535cff7825Smh27603 GET_CPU_MSTATE_CNT(CMS_USER, user_cnt); 10545cff7825Smh27603 GET_CPU_MSTATE_CNT(CMS_SYSTEM, system_cnt); 10555cff7825Smh27603 10565cff7825Smh27603 /* 10575cff7825Smh27603 * We can't do anything when we have just switched to a state 10585cff7825Smh27603 * because there is no valid timestamp. 10595cff7825Smh27603 */ 1060fcddbe1fSMark Haywood if (cpupm->lastquan_ticks == 0) { 1061fcddbe1fSMark Haywood cpupm->lastquan_ticks = NSEC_TO_TICK(gethrtime()); 10620e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 10635cff7825Smh27603 mutex_exit(&cpudsp->lock); 10645cff7825Smh27603 goto do_return; 10655cff7825Smh27603 } 10665cff7825Smh27603 10675cff7825Smh27603 /* 10685cff7825Smh27603 * Various watermarks are based on this routine being called back 10695cff7825Smh27603 * exactly at the requested period. This is not guaranteed 10705cff7825Smh27603 * because this routine is called from a taskq that is dispatched 10715cff7825Smh27603 * from a timeout routine. Handle this by finding out how many 1072fcddbe1fSMark Haywood * ticks have elapsed since the last call and adjusting 10735cff7825Smh27603 * the idle_cnt based on the delay added to the requested period 10745cff7825Smh27603 * by timeout and taskq. 10755cff7825Smh27603 */ 1076fcddbe1fSMark Haywood ticks = NSEC_TO_TICK(gethrtime()); 1077fcddbe1fSMark Haywood tick_cnt = ticks - cpupm->lastquan_ticks; 1078fcddbe1fSMark Haywood ASSERT(tick_cnt != 0); 1079fcddbe1fSMark Haywood cpupm->lastquan_ticks = ticks; 1080*6af9d452Saubrey.li@intel.com 10815cff7825Smh27603 /* 10825cff7825Smh27603 * Time taken between recording the current counts and 10835cff7825Smh27603 * arranging the next call of this routine is an error in our 10845cff7825Smh27603 * calculation. We minimize the error by calling 10850e751525SEric Saxe * CPUDRV_MONITOR_INIT() here instead of end of this routine. 10865cff7825Smh27603 */ 10870e751525SEric Saxe CPUDRV_MONITOR_INIT(cpudsp); 10880e751525SEric Saxe DPRINTF(D_PM_MONITOR_VERBOSE, ("cpudrv_monitor: instance %d: " 10895cff7825Smh27603 "idle count %d, user count %d, system count %d, pm_level %d, " 10905cff7825Smh27603 "pm_busycnt %d\n", ddi_get_instance(dip), idle_cnt, user_cnt, 10915cff7825Smh27603 system_cnt, cur_spd->pm_level, cpupm->pm_busycnt)); 10925cff7825Smh27603 10935cff7825Smh27603 #ifdef DEBUG 10945cff7825Smh27603 /* 10955cff7825Smh27603 * Notify that timeout and taskq has caused delays and we need to 10965cff7825Smh27603 * scale our parameters accordingly. 10975cff7825Smh27603 * 10985cff7825Smh27603 * To get accurate result, don't turn on other DPRINTFs with 10995cff7825Smh27603 * the following DPRINTF. PROM calls generated by other 11005cff7825Smh27603 * DPRINTFs changes the timing. 11015cff7825Smh27603 */ 1102fcddbe1fSMark Haywood if (tick_cnt > cur_spd->quant_cnt) { 11030e751525SEric Saxe DPRINTF(D_PM_MONITOR_DELAY, ("cpudrv_monitor: instance %d: " 1104fcddbe1fSMark Haywood "tick count %d > quantum_count %u\n", 1105fcddbe1fSMark Haywood ddi_get_instance(dip), tick_cnt, cur_spd->quant_cnt)); 11065cff7825Smh27603 } 11075cff7825Smh27603 #endif /* DEBUG */ 11085cff7825Smh27603 11095cff7825Smh27603 /* 11105cff7825Smh27603 * Adjust counts based on the delay added by timeout and taskq. 11115cff7825Smh27603 */ 1112fcddbe1fSMark Haywood idle_cnt = (idle_cnt * cur_spd->quant_cnt) / tick_cnt; 1113fcddbe1fSMark Haywood user_cnt = (user_cnt * cur_spd->quant_cnt) / tick_cnt; 1114fcddbe1fSMark Haywood 11155cff7825Smh27603 if ((user_cnt > cur_spd->user_hwm) || (idle_cnt < cur_spd->idle_lwm && 11160e751525SEric Saxe cur_spd->idle_blwm_cnt >= cpudrv_idle_blwm_cnt_max)) { 11175cff7825Smh27603 cur_spd->idle_blwm_cnt = 0; 11185cff7825Smh27603 cur_spd->idle_bhwm_cnt = 0; 11195cff7825Smh27603 /* 11205cff7825Smh27603 * In normal situation, arrange to go to next higher speed. 11215cff7825Smh27603 * If we are running in special direct pm mode, we just stay 11225cff7825Smh27603 * at the current speed. 11235cff7825Smh27603 */ 11245cff7825Smh27603 if (cur_spd == cur_spd->up_spd || cpudrv_direct_pm) { 11250e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm); 11265cff7825Smh27603 } else { 11275cff7825Smh27603 new_spd = cur_spd->up_spd; 11280e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, 112967bdf3b0SMark Haywood new_spd); 11305cff7825Smh27603 } 11315cff7825Smh27603 } else if ((user_cnt <= cur_spd->user_lwm) && 11320e751525SEric Saxe (idle_cnt >= cur_spd->idle_hwm) || !CPU_ACTIVE(cpudsp->cp)) { 11335cff7825Smh27603 cur_spd->idle_blwm_cnt = 0; 11345cff7825Smh27603 cur_spd->idle_bhwm_cnt = 0; 11355cff7825Smh27603 /* 11365cff7825Smh27603 * Arrange to go to next lower speed by informing our idle 11375cff7825Smh27603 * status to the power management framework. 11385cff7825Smh27603 */ 11390e751525SEric Saxe CPUDRV_MONITOR_PM_IDLE_COMP(dip, cpupm); 11405cff7825Smh27603 } else { 11415cff7825Smh27603 /* 11425cff7825Smh27603 * If we are between the idle water marks and have not 11435cff7825Smh27603 * been here enough consecutive times to be considered 11445cff7825Smh27603 * busy, just increment the count and return. 11455cff7825Smh27603 */ 11465cff7825Smh27603 if ((idle_cnt < cur_spd->idle_hwm) && 11475cff7825Smh27603 (idle_cnt >= cur_spd->idle_lwm) && 11480e751525SEric Saxe (cur_spd->idle_bhwm_cnt < cpudrv_idle_bhwm_cnt_max)) { 11495cff7825Smh27603 cur_spd->idle_blwm_cnt = 0; 11505cff7825Smh27603 cur_spd->idle_bhwm_cnt++; 11515cff7825Smh27603 mutex_exit(&cpudsp->lock); 11525cff7825Smh27603 goto do_return; 11535cff7825Smh27603 } 11545cff7825Smh27603 if (idle_cnt < cur_spd->idle_lwm) { 11555cff7825Smh27603 cur_spd->idle_blwm_cnt++; 11565cff7825Smh27603 cur_spd->idle_bhwm_cnt = 0; 11575cff7825Smh27603 } 11585cff7825Smh27603 /* 11595cff7825Smh27603 * Arranges to stay at the current speed. 11605cff7825Smh27603 */ 11610e751525SEric Saxe CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm); 11625cff7825Smh27603 } 11635cff7825Smh27603 mutex_exit(&cpudsp->lock); 11645cff7825Smh27603 do_return: 11655cff7825Smh27603 mutex_enter(&cpupm->timeout_lock); 11665cff7825Smh27603 ASSERT(cpupm->timeout_count > 0); 11675cff7825Smh27603 cpupm->timeout_count--; 11685cff7825Smh27603 cv_signal(&cpupm->timeout_cv); 11695cff7825Smh27603 mutex_exit(&cpupm->timeout_lock); 11705cff7825Smh27603 } 1171*6af9d452Saubrey.li@intel.com 1172*6af9d452Saubrey.li@intel.com /* 1173*6af9d452Saubrey.li@intel.com * get cpu_t structure for cpudrv_devstate_t 1174*6af9d452Saubrey.li@intel.com */ 1175*6af9d452Saubrey.li@intel.com int 1176*6af9d452Saubrey.li@intel.com cpudrv_get_cpu(cpudrv_devstate_t *cpudsp) 1177*6af9d452Saubrey.li@intel.com { 1178*6af9d452Saubrey.li@intel.com ASSERT(cpudsp != NULL); 1179*6af9d452Saubrey.li@intel.com 1180*6af9d452Saubrey.li@intel.com /* 1181*6af9d452Saubrey.li@intel.com * return DDI_SUCCESS if cpudrv_devstate_t 1182*6af9d452Saubrey.li@intel.com * already contains cpu_t structure 1183*6af9d452Saubrey.li@intel.com */ 1184*6af9d452Saubrey.li@intel.com if (cpudsp->cp != NULL) 1185*6af9d452Saubrey.li@intel.com return (DDI_SUCCESS); 1186*6af9d452Saubrey.li@intel.com 1187*6af9d452Saubrey.li@intel.com if (MUTEX_HELD(&cpu_lock)) { 1188*6af9d452Saubrey.li@intel.com cpudsp->cp = cpu_get(cpudsp->cpu_id); 1189*6af9d452Saubrey.li@intel.com } else { 1190*6af9d452Saubrey.li@intel.com mutex_enter(&cpu_lock); 1191*6af9d452Saubrey.li@intel.com cpudsp->cp = cpu_get(cpudsp->cpu_id); 1192*6af9d452Saubrey.li@intel.com mutex_exit(&cpu_lock); 1193*6af9d452Saubrey.li@intel.com } 1194*6af9d452Saubrey.li@intel.com 1195*6af9d452Saubrey.li@intel.com if (cpudsp->cp == NULL) 1196*6af9d452Saubrey.li@intel.com return (DDI_FAILURE); 1197*6af9d452Saubrey.li@intel.com 1198*6af9d452Saubrey.li@intel.com return (DDI_SUCCESS); 1199*6af9d452Saubrey.li@intel.com } 1200