xref: /titanic_51/usr/src/uts/common/io/bge/bge_main2.c (revision f8d8d7b32d22897bd2af32f5fa5bbdc9c0797277)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 #include "sys/bge_impl2.h"
30 #include <sys/sdt.h>
31 
32 /*
33  * This is the string displayed by modinfo, etc.
34  * Make sure you keep the version ID up to date!
35  */
36 static char bge_ident[] = "BCM579x driver v0.51";
37 
38 /*
39  * Property names
40  */
41 static char debug_propname[] = "bge-debug-flags";
42 static char clsize_propname[] = "cache-line-size";
43 static char latency_propname[] = "latency-timer";
44 static char localmac_boolname[] = "local-mac-address?";
45 static char localmac_propname[] = "local-mac-address";
46 static char macaddr_propname[] = "mac-address";
47 static char subdev_propname[] = "subsystem-id";
48 static char subven_propname[] = "subsystem-vendor-id";
49 static char rxrings_propname[] = "bge-rx-rings";
50 static char txrings_propname[] = "bge-tx-rings";
51 static char fm_cap[] = "fm-capable";
52 static char default_mtu[] = "default-mtu";
53 
54 static int bge_add_intrs(bge_t *, int);
55 static void bge_rem_intrs(bge_t *);
56 
57 /*
58  * Describes the chip's DMA engine
59  */
60 static ddi_dma_attr_t dma_attr = {
61 	DMA_ATTR_V0,			/* dma_attr version	*/
62 	0x0000000000000000ull,		/* dma_attr_addr_lo	*/
63 	0xFFFFFFFFFFFFFFFFull,		/* dma_attr_addr_hi	*/
64 	0x00000000FFFFFFFFull,		/* dma_attr_count_max	*/
65 	0x0000000000000001ull,		/* dma_attr_align	*/
66 	0x00000FFF,			/* dma_attr_burstsizes	*/
67 	0x00000001,			/* dma_attr_minxfer	*/
68 	0x000000000000FFFFull,		/* dma_attr_maxxfer	*/
69 	0xFFFFFFFFFFFFFFFFull,		/* dma_attr_seg		*/
70 	1,				/* dma_attr_sgllen 	*/
71 	0x00000001,			/* dma_attr_granular 	*/
72 	DDI_DMA_FLAGERR			/* dma_attr_flags */
73 };
74 
75 /*
76  * PIO access attributes for registers
77  */
78 static ddi_device_acc_attr_t bge_reg_accattr = {
79 	DDI_DEVICE_ATTR_V0,
80 	DDI_NEVERSWAP_ACC,
81 	DDI_STRICTORDER_ACC,
82 	DDI_FLAGERR_ACC
83 };
84 
85 /*
86  * DMA access attributes for descriptors: NOT to be byte swapped.
87  */
88 static ddi_device_acc_attr_t bge_desc_accattr = {
89 	DDI_DEVICE_ATTR_V0,
90 	DDI_NEVERSWAP_ACC,
91 	DDI_STRICTORDER_ACC,
92 	DDI_FLAGERR_ACC
93 };
94 
95 /*
96  * DMA access attributes for data: NOT to be byte swapped.
97  */
98 static ddi_device_acc_attr_t bge_data_accattr = {
99 	DDI_DEVICE_ATTR_V0,
100 	DDI_NEVERSWAP_ACC,
101 	DDI_STRICTORDER_ACC
102 };
103 
104 static ether_addr_t bge_broadcast_addr = {
105 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff
106 };
107 
108 /*
109  * Versions of the O/S up to Solaris 8 didn't support network booting
110  * from any network interface except the first (NET0).  Patching this
111  * flag to a non-zero value will tell the driver to work around this
112  * limitation by creating an extra (internal) pathname node.  To do
113  * this, just add a line like the following to the CLIENT'S etc/system
114  * file ON THE ROOT FILESYSTEM SERVER before booting the client:
115  *
116  *	set bge:bge_net1_boot_support = 1;
117  */
118 static uint32_t bge_net1_boot_support = 1;
119 
120 /*
121  * ========== Transmit and receive ring reinitialisation ==========
122  */
123 
124 /*
125  * These <reinit> routines each reset the specified ring to an initial
126  * state, assuming that the corresponding <init> routine has already
127  * been called exactly once.
128  */
129 
130 static void
131 bge_reinit_send_ring(send_ring_t *srp)
132 {
133 	/*
134 	 * Reinitialise control variables ...
135 	 */
136 	ASSERT(srp->tx_flow == 0);
137 	srp->tx_next = 0;
138 	srp->tx_free = srp->desc.nslots;
139 
140 	ASSERT(mutex_owned(srp->tc_lock));
141 	srp->tc_next = 0;
142 
143 	/*
144 	 * Zero and sync all the h/w Send Buffer Descriptors
145 	 */
146 	DMA_ZERO(srp->desc);
147 	DMA_SYNC(srp->desc, DDI_DMA_SYNC_FORDEV);
148 }
149 
150 static void
151 bge_reinit_recv_ring(recv_ring_t *rrp)
152 {
153 	/*
154 	 * Reinitialise control variables ...
155 	 */
156 	rrp->rx_next = 0;
157 }
158 
159 static void
160 bge_reinit_buff_ring(buff_ring_t *brp, uint64_t ring)
161 {
162 	bge_rbd_t *hw_rbd_p;
163 	sw_rbd_t *srbdp;
164 	uint32_t bufsize;
165 	uint32_t nslots;
166 	uint32_t slot;
167 
168 	static uint16_t ring_type_flag[BGE_BUFF_RINGS_MAX] = {
169 		RBD_FLAG_STD_RING,
170 		RBD_FLAG_JUMBO_RING,
171 		RBD_FLAG_MINI_RING
172 	};
173 
174 	/*
175 	 * Zero, initialise and sync all the h/w Receive Buffer Descriptors
176 	 * Note: all the remaining fields (<type>, <flags>, <ip_cksum>,
177 	 * <tcp_udp_cksum>, <error_flag>, <vlan_tag>, and <reserved>)
178 	 * should be zeroed, and so don't need to be set up specifically
179 	 * once the whole area has been cleared.
180 	 */
181 	DMA_ZERO(brp->desc);
182 
183 	hw_rbd_p = DMA_VPTR(brp->desc);
184 	nslots = brp->desc.nslots;
185 	ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT);
186 	bufsize = brp->buf[0].size;
187 	srbdp = brp->sw_rbds;
188 	for (slot = 0; slot < nslots; ++hw_rbd_p, ++srbdp, ++slot) {
189 		hw_rbd_p->host_buf_addr = srbdp->pbuf.cookie.dmac_laddress;
190 		hw_rbd_p->index = slot;
191 		hw_rbd_p->len = bufsize;
192 		hw_rbd_p->opaque = srbdp->pbuf.token;
193 		hw_rbd_p->flags |= ring_type_flag[ring];
194 	}
195 
196 	DMA_SYNC(brp->desc, DDI_DMA_SYNC_FORDEV);
197 
198 	/*
199 	 * Finally, reinitialise the ring control variables ...
200 	 */
201 	brp->rf_next = (nslots != 0) ? (nslots-1) : 0;
202 }
203 
204 /*
205  * Reinitialize all rings
206  */
207 static void
208 bge_reinit_rings(bge_t *bgep)
209 {
210 	uint64_t ring;
211 
212 	ASSERT(mutex_owned(bgep->genlock));
213 
214 	/*
215 	 * Send Rings ...
216 	 */
217 	for (ring = 0; ring < bgep->chipid.tx_rings; ++ring)
218 		bge_reinit_send_ring(&bgep->send[ring]);
219 
220 	/*
221 	 * Receive Return Rings ...
222 	 */
223 	for (ring = 0; ring < bgep->chipid.rx_rings; ++ring)
224 		bge_reinit_recv_ring(&bgep->recv[ring]);
225 
226 	/*
227 	 * Receive Producer Rings ...
228 	 */
229 	for (ring = 0; ring < BGE_BUFF_RINGS_USED; ++ring)
230 		bge_reinit_buff_ring(&bgep->buff[ring], ring);
231 }
232 
233 /*
234  * ========== Internal state management entry points ==========
235  */
236 
237 #undef	BGE_DBG
238 #define	BGE_DBG		BGE_DBG_NEMO	/* debug flag for this code	*/
239 
240 /*
241  * These routines provide all the functionality required by the
242  * corresponding GLD entry points, but don't update the GLD state
243  * so they can be called internally without disturbing our record
244  * of what GLD thinks we should be doing ...
245  */
246 
247 /*
248  *	bge_reset() -- reset h/w & rings to initial state
249  */
250 static int
251 #ifdef BGE_IPMI_ASF
252 bge_reset(bge_t *bgep, uint_t asf_mode)
253 #else
254 bge_reset(bge_t *bgep)
255 #endif
256 {
257 	uint64_t	ring;
258 	int retval;
259 
260 	BGE_TRACE(("bge_reset($%p)", (void *)bgep));
261 
262 	ASSERT(mutex_owned(bgep->genlock));
263 
264 	/*
265 	 * Grab all the other mutexes in the world (this should
266 	 * ensure no other threads are manipulating driver state)
267 	 */
268 	for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring)
269 		mutex_enter(bgep->recv[ring].rx_lock);
270 	for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring)
271 		mutex_enter(bgep->buff[ring].rf_lock);
272 	rw_enter(bgep->errlock, RW_WRITER);
273 	for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring)
274 		mutex_enter(bgep->send[ring].tc_lock);
275 
276 #ifdef BGE_IPMI_ASF
277 	retval = bge_chip_reset(bgep, B_TRUE, asf_mode);
278 #else
279 	retval = bge_chip_reset(bgep, B_TRUE);
280 #endif
281 	bge_reinit_rings(bgep);
282 
283 	/*
284 	 * Free the world ...
285 	 */
286 	for (ring = BGE_SEND_RINGS_MAX; ring-- > 0; )
287 		mutex_exit(bgep->send[ring].tc_lock);
288 	rw_exit(bgep->errlock);
289 	for (ring = BGE_BUFF_RINGS_MAX; ring-- > 0; )
290 		mutex_exit(bgep->buff[ring].rf_lock);
291 	for (ring = BGE_RECV_RINGS_MAX; ring-- > 0; )
292 		mutex_exit(bgep->recv[ring].rx_lock);
293 
294 	BGE_DEBUG(("bge_reset($%p) done", (void *)bgep));
295 	return (retval);
296 }
297 
298 /*
299  *	bge_stop() -- stop processing, don't reset h/w or rings
300  */
301 static void
302 bge_stop(bge_t *bgep)
303 {
304 	BGE_TRACE(("bge_stop($%p)", (void *)bgep));
305 
306 	ASSERT(mutex_owned(bgep->genlock));
307 
308 #ifdef BGE_IPMI_ASF
309 	if (bgep->asf_enabled) {
310 		bgep->asf_pseudostop = B_TRUE;
311 	} else {
312 #endif
313 		bge_chip_stop(bgep, B_FALSE);
314 #ifdef BGE_IPMI_ASF
315 	}
316 #endif
317 
318 	BGE_DEBUG(("bge_stop($%p) done", (void *)bgep));
319 }
320 
321 /*
322  *	bge_start() -- start transmitting/receiving
323  */
324 static int
325 bge_start(bge_t *bgep, boolean_t reset_phys)
326 {
327 	int retval;
328 
329 	BGE_TRACE(("bge_start($%p, %d)", (void *)bgep, reset_phys));
330 
331 	ASSERT(mutex_owned(bgep->genlock));
332 
333 	/*
334 	 * Start chip processing, including enabling interrupts
335 	 */
336 	retval = bge_chip_start(bgep, reset_phys);
337 
338 	BGE_DEBUG(("bge_start($%p, %d) done", (void *)bgep, reset_phys));
339 	return (retval);
340 }
341 
342 /*
343  * bge_restart - restart transmitting/receiving after error or suspend
344  */
345 int
346 bge_restart(bge_t *bgep, boolean_t reset_phys)
347 {
348 	int retval = DDI_SUCCESS;
349 	ASSERT(mutex_owned(bgep->genlock));
350 
351 #ifdef BGE_IPMI_ASF
352 	if (bgep->asf_enabled) {
353 		if (bge_reset(bgep, ASF_MODE_POST_INIT) != DDI_SUCCESS)
354 			retval = DDI_FAILURE;
355 	} else
356 		if (bge_reset(bgep, ASF_MODE_NONE) != DDI_SUCCESS)
357 			retval = DDI_FAILURE;
358 #else
359 	if (bge_reset(bgep) != DDI_SUCCESS)
360 		retval = DDI_FAILURE;
361 #endif
362 	if (bgep->bge_mac_state == BGE_MAC_STARTED) {
363 		if (bge_start(bgep, reset_phys) != DDI_SUCCESS)
364 			retval = DDI_FAILURE;
365 		bgep->watchdog = 0;
366 		ddi_trigger_softintr(bgep->resched_id);
367 	}
368 
369 	BGE_DEBUG(("bge_restart($%p, %d) done", (void *)bgep, reset_phys));
370 	return (retval);
371 }
372 
373 
374 /*
375  * ========== Nemo-required management entry points ==========
376  */
377 
378 #undef	BGE_DBG
379 #define	BGE_DBG		BGE_DBG_NEMO	/* debug flag for this code	*/
380 
381 /*
382  *	bge_m_stop() -- stop transmitting/receiving
383  */
384 static void
385 bge_m_stop(void *arg)
386 {
387 	bge_t *bgep = arg;		/* private device info	*/
388 
389 	BGE_TRACE(("bge_m_stop($%p)", arg));
390 
391 	/*
392 	 * Just stop processing, then record new GLD state
393 	 */
394 	mutex_enter(bgep->genlock);
395 	if (!(bgep->progress & PROGRESS_INTR)) {
396 		/* can happen during autorecovery */
397 		mutex_exit(bgep->genlock);
398 		return;
399 	}
400 
401 	bgep->link_up_msg = bgep->link_down_msg = " (stopped)";
402 	bge_stop(bgep);
403 	bgep->bge_mac_state = BGE_MAC_STOPPED;
404 	BGE_DEBUG(("bge_m_stop($%p) done", arg));
405 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK)
406 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_UNAFFECTED);
407 	mutex_exit(bgep->genlock);
408 }
409 
410 /*
411  *	bge_m_start() -- start transmitting/receiving
412  */
413 static int
414 bge_m_start(void *arg)
415 {
416 	bge_t *bgep = arg;		/* private device info	*/
417 
418 	BGE_TRACE(("bge_m_start($%p)", arg));
419 
420 	/*
421 	 * Start processing and record new GLD state
422 	 */
423 	mutex_enter(bgep->genlock);
424 	if (!(bgep->progress & PROGRESS_INTR)) {
425 		/* can happen during autorecovery */
426 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
427 		mutex_exit(bgep->genlock);
428 		return (EIO);
429 	}
430 #ifdef BGE_IPMI_ASF
431 	if (bgep->asf_enabled) {
432 		if ((bgep->asf_status == ASF_STAT_RUN) &&
433 			(bgep->asf_pseudostop)) {
434 
435 			bgep->link_up_msg = bgep->link_down_msg
436 				= " (initialized)";
437 			bgep->bge_mac_state = BGE_MAC_STARTED;
438 			mutex_exit(bgep->genlock);
439 			return (0);
440 		}
441 	}
442 	if (bge_reset(bgep, ASF_MODE_INIT) != DDI_SUCCESS) {
443 #else
444 	if (bge_reset(bgep) != DDI_SUCCESS) {
445 #endif
446 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
447 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
448 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
449 		mutex_exit(bgep->genlock);
450 		return (EIO);
451 	}
452 	bgep->link_up_msg = bgep->link_down_msg = " (initialized)";
453 	if (bge_start(bgep, B_TRUE) != DDI_SUCCESS) {
454 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
455 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
456 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
457 		mutex_exit(bgep->genlock);
458 		return (EIO);
459 	}
460 	bgep->bge_mac_state = BGE_MAC_STARTED;
461 	BGE_DEBUG(("bge_m_start($%p) done", arg));
462 
463 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
464 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
465 		mutex_exit(bgep->genlock);
466 		return (EIO);
467 	}
468 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
469 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
470 		mutex_exit(bgep->genlock);
471 		return (EIO);
472 	}
473 #ifdef BGE_IPMI_ASF
474 	if (bgep->asf_enabled) {
475 		if (bgep->asf_status != ASF_STAT_RUN) {
476 			/* start ASF heart beat */
477 			bgep->asf_timeout_id = timeout(bge_asf_heartbeat,
478 				(void *)bgep,
479 				drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL));
480 			bgep->asf_status = ASF_STAT_RUN;
481 		}
482 	}
483 #endif
484 	mutex_exit(bgep->genlock);
485 
486 	return (0);
487 }
488 
489 /*
490  *	bge_m_unicst_set() -- set the physical network address
491  */
492 static int
493 bge_m_unicst(void *arg, const uint8_t *macaddr)
494 {
495 	bge_t *bgep = arg;		/* private device info	*/
496 
497 	BGE_TRACE(("bge_m_unicst_set($%p, %s)", arg,
498 		ether_sprintf((void *)macaddr)));
499 
500 	/*
501 	 * Remember the new current address in the driver state
502 	 * Sync the chip's idea of the address too ...
503 	 */
504 	mutex_enter(bgep->genlock);
505 	if (!(bgep->progress & PROGRESS_INTR)) {
506 		/* can happen during autorecovery */
507 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
508 		mutex_exit(bgep->genlock);
509 		return (EIO);
510 	}
511 	ethaddr_copy(macaddr, bgep->curr_addr.addr);
512 #ifdef BGE_IPMI_ASF
513 	if (bge_chip_sync(bgep, B_FALSE) == DDI_FAILURE) {
514 #else
515 	if (bge_chip_sync(bgep) == DDI_FAILURE) {
516 #endif
517 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
518 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
519 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
520 		mutex_exit(bgep->genlock);
521 		return (EIO);
522 	}
523 #ifdef BGE_IPMI_ASF
524 	if (bgep->asf_enabled) {
525 		/*
526 		 * The above bge_chip_sync() function wrote the ethernet MAC
527 		 * addresses registers which destroyed the IPMI/ASF sideband.
528 		 * Here, we have to reset chip to make IPMI/ASF sideband work.
529 		 */
530 		if (bgep->asf_status == ASF_STAT_RUN) {
531 			/*
532 			 * We must stop ASF heart beat before bge_chip_stop(),
533 			 * otherwise some computers (ex. IBM HS20 blade server)
534 			 * may crash.
535 			 */
536 			bge_asf_update_status(bgep);
537 			bge_asf_stop_timer(bgep);
538 			bgep->asf_status = ASF_STAT_STOP;
539 
540 			bge_asf_pre_reset_operations(bgep, BGE_INIT_RESET);
541 		}
542 		bge_chip_stop(bgep, B_FALSE);
543 
544 		if (bge_restart(bgep, B_FALSE) == DDI_FAILURE) {
545 			(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
546 			(void) bge_check_acc_handle(bgep, bgep->io_handle);
547 			ddi_fm_service_impact(bgep->devinfo,
548 			    DDI_SERVICE_DEGRADED);
549 			mutex_exit(bgep->genlock);
550 			return (EIO);
551 		}
552 
553 		/*
554 		 * Start our ASF heartbeat counter as soon as possible.
555 		 */
556 		if (bgep->asf_status != ASF_STAT_RUN) {
557 			/* start ASF heart beat */
558 			bgep->asf_timeout_id = timeout(bge_asf_heartbeat,
559 				(void *)bgep,
560 				drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL));
561 			bgep->asf_status = ASF_STAT_RUN;
562 		}
563 	}
564 #endif
565 	BGE_DEBUG(("bge_m_unicst_set($%p) done", arg));
566 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
567 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
568 		mutex_exit(bgep->genlock);
569 		return (EIO);
570 	}
571 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
572 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
573 		mutex_exit(bgep->genlock);
574 		return (EIO);
575 	}
576 	mutex_exit(bgep->genlock);
577 
578 	return (0);
579 }
580 
581 /*
582  * Compute the index of the required bit in the multicast hash map.
583  * This must mirror the way the hardware actually does it!
584  * See Broadcom document 570X-PG102-R page 125.
585  */
586 static uint32_t
587 bge_hash_index(const uint8_t *mca)
588 {
589 	uint32_t hash;
590 
591 	CRC32(hash, mca, ETHERADDRL, -1U, crc32_table);
592 
593 	return (hash);
594 }
595 
596 /*
597  *	bge_m_multicst_add() -- enable/disable a multicast address
598  */
599 static int
600 bge_m_multicst(void *arg, boolean_t add, const uint8_t *mca)
601 {
602 	bge_t *bgep = arg;		/* private device info	*/
603 	uint32_t hash;
604 	uint32_t index;
605 	uint32_t word;
606 	uint32_t bit;
607 	uint8_t *refp;
608 
609 	BGE_TRACE(("bge_m_multicst($%p, %s, %s)", arg,
610 		(add) ? "add" : "remove", ether_sprintf((void *)mca)));
611 
612 	/*
613 	 * Precalculate all required masks, pointers etc ...
614 	 */
615 	hash = bge_hash_index(mca);
616 	index = hash % BGE_HASH_TABLE_SIZE;
617 	word = index/32u;
618 	bit = 1 << (index % 32u);
619 	refp = &bgep->mcast_refs[index];
620 
621 	BGE_DEBUG(("bge_m_multicst: hash 0x%x index %d (%d:0x%x) = %d",
622 		hash, index, word, bit, *refp));
623 
624 	/*
625 	 * We must set the appropriate bit in the hash map (and the
626 	 * corresponding h/w register) when the refcount goes from 0
627 	 * to >0, and clear it when the last ref goes away (refcount
628 	 * goes from >0 back to 0).  If we change the hash map, we
629 	 * must also update the chip's hardware map registers.
630 	 */
631 	mutex_enter(bgep->genlock);
632 	if (!(bgep->progress & PROGRESS_INTR)) {
633 		/* can happen during autorecovery */
634 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
635 		mutex_exit(bgep->genlock);
636 		return (EIO);
637 	}
638 	if (add) {
639 		if ((*refp)++ == 0) {
640 			bgep->mcast_hash[word] |= bit;
641 #ifdef BGE_IPMI_ASF
642 			if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) {
643 #else
644 			if (bge_chip_sync(bgep) == DDI_FAILURE) {
645 #endif
646 				(void) bge_check_acc_handle(bgep,
647 				    bgep->cfg_handle);
648 				(void) bge_check_acc_handle(bgep,
649 				    bgep->io_handle);
650 				ddi_fm_service_impact(bgep->devinfo,
651 				    DDI_SERVICE_DEGRADED);
652 				mutex_exit(bgep->genlock);
653 				return (EIO);
654 			}
655 		}
656 	} else {
657 		if (--(*refp) == 0) {
658 			bgep->mcast_hash[word] &= ~bit;
659 #ifdef BGE_IPMI_ASF
660 			if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) {
661 #else
662 			if (bge_chip_sync(bgep) == DDI_FAILURE) {
663 #endif
664 				(void) bge_check_acc_handle(bgep,
665 				    bgep->cfg_handle);
666 				(void) bge_check_acc_handle(bgep,
667 				    bgep->io_handle);
668 				ddi_fm_service_impact(bgep->devinfo,
669 				    DDI_SERVICE_DEGRADED);
670 				mutex_exit(bgep->genlock);
671 				return (EIO);
672 			}
673 		}
674 	}
675 	BGE_DEBUG(("bge_m_multicst($%p) done", arg));
676 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
677 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
678 		mutex_exit(bgep->genlock);
679 		return (EIO);
680 	}
681 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
682 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
683 		mutex_exit(bgep->genlock);
684 		return (EIO);
685 	}
686 	mutex_exit(bgep->genlock);
687 
688 	return (0);
689 }
690 
691 /*
692  * bge_m_promisc() -- set or reset promiscuous mode on the board
693  *
694  *	Program the hardware to enable/disable promiscuous and/or
695  *	receive-all-multicast modes.
696  */
697 static int
698 bge_m_promisc(void *arg, boolean_t on)
699 {
700 	bge_t *bgep = arg;
701 
702 	BGE_TRACE(("bge_m_promisc_set($%p, %d)", arg, on));
703 
704 	/*
705 	 * Store MAC layer specified mode and pass to chip layer to update h/w
706 	 */
707 	mutex_enter(bgep->genlock);
708 	if (!(bgep->progress & PROGRESS_INTR)) {
709 		/* can happen during autorecovery */
710 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
711 		mutex_exit(bgep->genlock);
712 		return (EIO);
713 	}
714 	bgep->promisc = on;
715 #ifdef BGE_IPMI_ASF
716 	if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) {
717 #else
718 	if (bge_chip_sync(bgep) == DDI_FAILURE) {
719 #endif
720 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
721 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
722 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
723 		mutex_exit(bgep->genlock);
724 		return (EIO);
725 	}
726 	BGE_DEBUG(("bge_m_promisc_set($%p) done", arg));
727 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
728 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
729 		mutex_exit(bgep->genlock);
730 		return (EIO);
731 	}
732 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
733 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
734 		mutex_exit(bgep->genlock);
735 		return (EIO);
736 	}
737 	mutex_exit(bgep->genlock);
738 	return (0);
739 }
740 
741 /*
742  * Loopback ioctl code
743  */
744 
745 static lb_property_t loopmodes[] = {
746 	{ normal,	"normal",	BGE_LOOP_NONE		},
747 	{ external,	"1000Mbps",	BGE_LOOP_EXTERNAL_1000	},
748 	{ external,	"100Mbps",	BGE_LOOP_EXTERNAL_100	},
749 	{ external,	"10Mbps",	BGE_LOOP_EXTERNAL_10	},
750 	{ internal,	"PHY",		BGE_LOOP_INTERNAL_PHY	},
751 	{ internal,	"MAC",		BGE_LOOP_INTERNAL_MAC	}
752 };
753 
754 static enum ioc_reply
755 bge_set_loop_mode(bge_t *bgep, uint32_t mode)
756 {
757 	const char *msg;
758 
759 	/*
760 	 * If the mode isn't being changed, there's nothing to do ...
761 	 */
762 	if (mode == bgep->param_loop_mode)
763 		return (IOC_ACK);
764 
765 	/*
766 	 * Validate the requested mode and prepare a suitable message
767 	 * to explain the link down/up cycle that the change will
768 	 * probably induce ...
769 	 */
770 	switch (mode) {
771 	default:
772 		return (IOC_INVAL);
773 
774 	case BGE_LOOP_NONE:
775 		msg = " (loopback disabled)";
776 		break;
777 
778 	case BGE_LOOP_EXTERNAL_1000:
779 	case BGE_LOOP_EXTERNAL_100:
780 	case BGE_LOOP_EXTERNAL_10:
781 		msg = " (external loopback selected)";
782 		break;
783 
784 	case BGE_LOOP_INTERNAL_PHY:
785 		msg = " (PHY internal loopback selected)";
786 		break;
787 
788 	case BGE_LOOP_INTERNAL_MAC:
789 		msg = " (MAC internal loopback selected)";
790 		break;
791 	}
792 
793 	/*
794 	 * All OK; tell the caller to reprogram
795 	 * the PHY and/or MAC for the new mode ...
796 	 */
797 	bgep->link_down_msg = bgep->link_up_msg = msg;
798 	bgep->param_loop_mode = mode;
799 	return (IOC_RESTART_ACK);
800 }
801 
802 static enum ioc_reply
803 bge_loop_ioctl(bge_t *bgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp)
804 {
805 	lb_info_sz_t *lbsp;
806 	lb_property_t *lbpp;
807 	uint32_t *lbmp;
808 	int cmd;
809 
810 	_NOTE(ARGUNUSED(wq))
811 
812 	/*
813 	 * Validate format of ioctl
814 	 */
815 	if (mp->b_cont == NULL)
816 		return (IOC_INVAL);
817 
818 	cmd = iocp->ioc_cmd;
819 	switch (cmd) {
820 	default:
821 		/* NOTREACHED */
822 		bge_error(bgep, "bge_loop_ioctl: invalid cmd 0x%x", cmd);
823 		return (IOC_INVAL);
824 
825 	case LB_GET_INFO_SIZE:
826 		if (iocp->ioc_count != sizeof (lb_info_sz_t))
827 			return (IOC_INVAL);
828 		lbsp = (lb_info_sz_t *)mp->b_cont->b_rptr;
829 		*lbsp = sizeof (loopmodes);
830 		return (IOC_REPLY);
831 
832 	case LB_GET_INFO:
833 		if (iocp->ioc_count != sizeof (loopmodes))
834 			return (IOC_INVAL);
835 		lbpp = (lb_property_t *)mp->b_cont->b_rptr;
836 		bcopy(loopmodes, lbpp, sizeof (loopmodes));
837 		return (IOC_REPLY);
838 
839 	case LB_GET_MODE:
840 		if (iocp->ioc_count != sizeof (uint32_t))
841 			return (IOC_INVAL);
842 		lbmp = (uint32_t *)mp->b_cont->b_rptr;
843 		*lbmp = bgep->param_loop_mode;
844 		return (IOC_REPLY);
845 
846 	case LB_SET_MODE:
847 		if (iocp->ioc_count != sizeof (uint32_t))
848 			return (IOC_INVAL);
849 		lbmp = (uint32_t *)mp->b_cont->b_rptr;
850 		return (bge_set_loop_mode(bgep, *lbmp));
851 	}
852 }
853 
854 /*
855  * Specific bge IOCTLs, the gld module handles the generic ones.
856  */
857 static void
858 bge_m_ioctl(void *arg, queue_t *wq, mblk_t *mp)
859 {
860 	bge_t *bgep = arg;
861 	struct iocblk *iocp;
862 	enum ioc_reply status;
863 	boolean_t need_privilege;
864 	int err;
865 	int cmd;
866 
867 	/*
868 	 * Validate the command before bothering with the mutex ...
869 	 */
870 	iocp = (struct iocblk *)mp->b_rptr;
871 	iocp->ioc_error = 0;
872 	need_privilege = B_TRUE;
873 	cmd = iocp->ioc_cmd;
874 	switch (cmd) {
875 	default:
876 		miocnak(wq, mp, 0, EINVAL);
877 		return;
878 
879 	case BGE_MII_READ:
880 	case BGE_MII_WRITE:
881 	case BGE_SEE_READ:
882 	case BGE_SEE_WRITE:
883 	case BGE_DIAG:
884 	case BGE_PEEK:
885 	case BGE_POKE:
886 	case BGE_PHY_RESET:
887 	case BGE_SOFT_RESET:
888 	case BGE_HARD_RESET:
889 		break;
890 
891 	case LB_GET_INFO_SIZE:
892 	case LB_GET_INFO:
893 	case LB_GET_MODE:
894 		need_privilege = B_FALSE;
895 		/* FALLTHRU */
896 	case LB_SET_MODE:
897 		break;
898 
899 	case ND_GET:
900 		need_privilege = B_FALSE;
901 		/* FALLTHRU */
902 	case ND_SET:
903 		break;
904 	}
905 
906 	if (need_privilege) {
907 		/*
908 		 * Check for specific net_config privilege on Solaris 10+.
909 		 * Otherwise just check for root access ...
910 		 */
911 		if (secpolicy_net_config != NULL)
912 			err = secpolicy_net_config(iocp->ioc_cr, B_FALSE);
913 		else
914 			err = drv_priv(iocp->ioc_cr);
915 		if (err != 0) {
916 			miocnak(wq, mp, 0, err);
917 			return;
918 		}
919 	}
920 
921 	mutex_enter(bgep->genlock);
922 	if (!(bgep->progress & PROGRESS_INTR)) {
923 		/* can happen during autorecovery */
924 		mutex_exit(bgep->genlock);
925 		miocnak(wq, mp, 0, EIO);
926 		return;
927 	}
928 
929 	switch (cmd) {
930 	default:
931 		_NOTE(NOTREACHED)
932 		status = IOC_INVAL;
933 		break;
934 
935 	case BGE_MII_READ:
936 	case BGE_MII_WRITE:
937 	case BGE_SEE_READ:
938 	case BGE_SEE_WRITE:
939 	case BGE_DIAG:
940 	case BGE_PEEK:
941 	case BGE_POKE:
942 	case BGE_PHY_RESET:
943 	case BGE_SOFT_RESET:
944 	case BGE_HARD_RESET:
945 		status = bge_chip_ioctl(bgep, wq, mp, iocp);
946 		break;
947 
948 	case LB_GET_INFO_SIZE:
949 	case LB_GET_INFO:
950 	case LB_GET_MODE:
951 	case LB_SET_MODE:
952 		status = bge_loop_ioctl(bgep, wq, mp, iocp);
953 		break;
954 
955 	case ND_GET:
956 	case ND_SET:
957 		status = bge_nd_ioctl(bgep, wq, mp, iocp);
958 		break;
959 	}
960 
961 	/*
962 	 * Do we need to reprogram the PHY and/or the MAC?
963 	 * Do it now, while we still have the mutex.
964 	 *
965 	 * Note: update the PHY first, 'cos it controls the
966 	 * speed/duplex parameters that the MAC code uses.
967 	 */
968 	switch (status) {
969 	case IOC_RESTART_REPLY:
970 	case IOC_RESTART_ACK:
971 		if (bge_phys_update(bgep) != DDI_SUCCESS) {
972 			ddi_fm_service_impact(bgep->devinfo,
973 			    DDI_SERVICE_DEGRADED);
974 			status = IOC_INVAL;
975 		}
976 #ifdef BGE_IPMI_ASF
977 		if (bge_chip_sync(bgep, B_FALSE) == DDI_FAILURE) {
978 #else
979 		if (bge_chip_sync(bgep) == DDI_FAILURE) {
980 #endif
981 			ddi_fm_service_impact(bgep->devinfo,
982 			    DDI_SERVICE_DEGRADED);
983 			status = IOC_INVAL;
984 		}
985 		if (bgep->intr_type == DDI_INTR_TYPE_MSI)
986 			bge_chip_msi_trig(bgep);
987 		break;
988 	}
989 
990 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
991 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
992 		status = IOC_INVAL;
993 	}
994 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
995 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
996 		status = IOC_INVAL;
997 	}
998 	mutex_exit(bgep->genlock);
999 
1000 	/*
1001 	 * Finally, decide how to reply
1002 	 */
1003 	switch (status) {
1004 	default:
1005 	case IOC_INVAL:
1006 		/*
1007 		 * Error, reply with a NAK and EINVAL or the specified error
1008 		 */
1009 		miocnak(wq, mp, 0, iocp->ioc_error == 0 ?
1010 			EINVAL : iocp->ioc_error);
1011 		break;
1012 
1013 	case IOC_DONE:
1014 		/*
1015 		 * OK, reply already sent
1016 		 */
1017 		break;
1018 
1019 	case IOC_RESTART_ACK:
1020 	case IOC_ACK:
1021 		/*
1022 		 * OK, reply with an ACK
1023 		 */
1024 		miocack(wq, mp, 0, 0);
1025 		break;
1026 
1027 	case IOC_RESTART_REPLY:
1028 	case IOC_REPLY:
1029 		/*
1030 		 * OK, send prepared reply as ACK or NAK
1031 		 */
1032 		mp->b_datap->db_type = iocp->ioc_error == 0 ?
1033 			M_IOCACK : M_IOCNAK;
1034 		qreply(wq, mp);
1035 		break;
1036 	}
1037 }
1038 
1039 static void
1040 bge_m_resources(void *arg)
1041 {
1042 	bge_t *bgep = arg;
1043 	recv_ring_t *rrp;
1044 	mac_rx_fifo_t mrf;
1045 	int ring;
1046 
1047 	mutex_enter(bgep->genlock);
1048 
1049 	/*
1050 	 * Register Rx rings as resources and save mac
1051 	 * resource id for future reference
1052 	 */
1053 	mrf.mrf_type = MAC_RX_FIFO;
1054 	mrf.mrf_blank = bge_chip_blank;
1055 	mrf.mrf_arg = (void *)bgep;
1056 	mrf.mrf_normal_blank_time = bge_rx_ticks_norm;
1057 	mrf.mrf_normal_pkt_count = bge_rx_count_norm;
1058 
1059 	for (ring = 0; ring < bgep->chipid.rx_rings; ring++) {
1060 		rrp = &bgep->recv[ring];
1061 		rrp->handle = mac_resource_add(bgep->macp,
1062 		    (mac_resource_t *)&mrf);
1063 	}
1064 
1065 	mutex_exit(bgep->genlock);
1066 }
1067 
1068 /*
1069  * ========== Per-instance setup/teardown code ==========
1070  */
1071 
1072 #undef	BGE_DBG
1073 #define	BGE_DBG		BGE_DBG_INIT	/* debug flag for this code	*/
1074 
1075 /*
1076  * Utility routine to carve a slice off a chunk of allocated memory,
1077  * updating the chunk descriptor accordingly.  The size of the slice
1078  * is given by the product of the <qty> and <size> parameters.
1079  */
1080 static void
1081 bge_slice_chunk(dma_area_t *slice, dma_area_t *chunk,
1082 	uint32_t qty, uint32_t size)
1083 {
1084 	static uint32_t sequence = 0xbcd5704a;
1085 	size_t totsize;
1086 
1087 	totsize = qty*size;
1088 	ASSERT(size >= 0);
1089 	ASSERT(totsize <= chunk->alength);
1090 
1091 	*slice = *chunk;
1092 	slice->nslots = qty;
1093 	slice->size = size;
1094 	slice->alength = totsize;
1095 	slice->token = ++sequence;
1096 
1097 	chunk->mem_va = (caddr_t)chunk->mem_va + totsize;
1098 	chunk->alength -= totsize;
1099 	chunk->offset += totsize;
1100 	chunk->cookie.dmac_laddress += totsize;
1101 	chunk->cookie.dmac_size -= totsize;
1102 }
1103 
1104 /*
1105  * Initialise the specified Receive Producer (Buffer) Ring, using
1106  * the information in the <dma_area> descriptors that it contains
1107  * to set up all the other fields. This routine should be called
1108  * only once for each ring.
1109  */
1110 static void
1111 bge_init_buff_ring(bge_t *bgep, uint64_t ring)
1112 {
1113 	buff_ring_t *brp;
1114 	bge_status_t *bsp;
1115 	sw_rbd_t *srbdp;
1116 	dma_area_t pbuf;
1117 	uint32_t bufsize;
1118 	uint32_t nslots;
1119 	uint32_t slot;
1120 	uint32_t split;
1121 
1122 	static bge_regno_t nic_ring_addrs[BGE_BUFF_RINGS_MAX] = {
1123 		NIC_MEM_SHADOW_BUFF_STD,
1124 		NIC_MEM_SHADOW_BUFF_JUMBO,
1125 		NIC_MEM_SHADOW_BUFF_MINI
1126 	};
1127 	static bge_regno_t mailbox_regs[BGE_BUFF_RINGS_MAX] = {
1128 		RECV_STD_PROD_INDEX_REG,
1129 		RECV_JUMBO_PROD_INDEX_REG,
1130 		RECV_MINI_PROD_INDEX_REG
1131 	};
1132 	static bge_regno_t buff_cons_xref[BGE_BUFF_RINGS_MAX] = {
1133 		STATUS_STD_BUFF_CONS_INDEX,
1134 		STATUS_JUMBO_BUFF_CONS_INDEX,
1135 		STATUS_MINI_BUFF_CONS_INDEX
1136 	};
1137 
1138 	BGE_TRACE(("bge_init_buff_ring($%p, %d)",
1139 		(void *)bgep, ring));
1140 
1141 	brp = &bgep->buff[ring];
1142 	nslots = brp->desc.nslots;
1143 	ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT);
1144 	bufsize = brp->buf[0].size;
1145 
1146 	/*
1147 	 * Set up the copy of the h/w RCB
1148 	 *
1149 	 * Note: unlike Send & Receive Return Rings, (where the max_len
1150 	 * field holds the number of slots), in a Receive Buffer Ring
1151 	 * this field indicates the size of each buffer in the ring.
1152 	 */
1153 	brp->hw_rcb.host_ring_addr = brp->desc.cookie.dmac_laddress;
1154 	brp->hw_rcb.max_len = bufsize;
1155 	brp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED;
1156 	brp->hw_rcb.nic_ring_addr = nic_ring_addrs[ring];
1157 
1158 	/*
1159 	 * Other one-off initialisation of per-ring data
1160 	 */
1161 	brp->bgep = bgep;
1162 	bsp = DMA_VPTR(bgep->status_block);
1163 	brp->cons_index_p = &bsp->buff_cons_index[buff_cons_xref[ring]];
1164 	brp->chip_mbx_reg = mailbox_regs[ring];
1165 	mutex_init(brp->rf_lock, NULL, MUTEX_DRIVER,
1166 	    DDI_INTR_PRI(bgep->intr_pri));
1167 
1168 	/*
1169 	 * Allocate the array of s/w Receive Buffer Descriptors
1170 	 */
1171 	srbdp = kmem_zalloc(nslots*sizeof (*srbdp), KM_SLEEP);
1172 	brp->sw_rbds = srbdp;
1173 
1174 	/*
1175 	 * Now initialise each array element once and for all
1176 	 */
1177 	for (split = 0; split < BGE_SPLIT; ++split) {
1178 		pbuf = brp->buf[split];
1179 		for (slot = 0; slot < nslots/BGE_SPLIT; ++srbdp, ++slot)
1180 			bge_slice_chunk(&srbdp->pbuf, &pbuf, 1, bufsize);
1181 		ASSERT(pbuf.alength == 0);
1182 	}
1183 }
1184 
1185 /*
1186  * Clean up initialisation done above before the memory is freed
1187  */
1188 static void
1189 bge_fini_buff_ring(bge_t *bgep, uint64_t ring)
1190 {
1191 	buff_ring_t *brp;
1192 	sw_rbd_t *srbdp;
1193 
1194 	BGE_TRACE(("bge_fini_buff_ring($%p, %d)",
1195 		(void *)bgep, ring));
1196 
1197 	brp = &bgep->buff[ring];
1198 	srbdp = brp->sw_rbds;
1199 	kmem_free(srbdp, brp->desc.nslots*sizeof (*srbdp));
1200 
1201 	mutex_destroy(brp->rf_lock);
1202 }
1203 
1204 /*
1205  * Initialise the specified Receive (Return) Ring, using the
1206  * information in the <dma_area> descriptors that it contains
1207  * to set up all the other fields. This routine should be called
1208  * only once for each ring.
1209  */
1210 static void
1211 bge_init_recv_ring(bge_t *bgep, uint64_t ring)
1212 {
1213 	recv_ring_t *rrp;
1214 	bge_status_t *bsp;
1215 	uint32_t nslots;
1216 
1217 	BGE_TRACE(("bge_init_recv_ring($%p, %d)",
1218 		(void *)bgep, ring));
1219 
1220 	/*
1221 	 * The chip architecture requires that receive return rings have
1222 	 * 512 or 1024 or 2048 elements per ring.  See 570X-PG108-R page 103.
1223 	 */
1224 	rrp = &bgep->recv[ring];
1225 	nslots = rrp->desc.nslots;
1226 	ASSERT(nslots == 0 || nslots == 512 ||
1227 		nslots == 1024 || nslots == 2048);
1228 
1229 	/*
1230 	 * Set up the copy of the h/w RCB
1231 	 */
1232 	rrp->hw_rcb.host_ring_addr = rrp->desc.cookie.dmac_laddress;
1233 	rrp->hw_rcb.max_len = nslots;
1234 	rrp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED;
1235 	rrp->hw_rcb.nic_ring_addr = 0;
1236 
1237 	/*
1238 	 * Other one-off initialisation of per-ring data
1239 	 */
1240 	rrp->bgep = bgep;
1241 	bsp = DMA_VPTR(bgep->status_block);
1242 	rrp->prod_index_p = RECV_INDEX_P(bsp, ring);
1243 	rrp->chip_mbx_reg = RECV_RING_CONS_INDEX_REG(ring);
1244 	mutex_init(rrp->rx_lock, NULL, MUTEX_DRIVER,
1245 	    DDI_INTR_PRI(bgep->intr_pri));
1246 }
1247 
1248 
1249 /*
1250  * Clean up initialisation done above before the memory is freed
1251  */
1252 static void
1253 bge_fini_recv_ring(bge_t *bgep, uint64_t ring)
1254 {
1255 	recv_ring_t *rrp;
1256 
1257 	BGE_TRACE(("bge_fini_recv_ring($%p, %d)",
1258 		(void *)bgep, ring));
1259 
1260 	rrp = &bgep->recv[ring];
1261 	if (rrp->rx_softint)
1262 		ddi_remove_softintr(rrp->rx_softint);
1263 	mutex_destroy(rrp->rx_lock);
1264 }
1265 
1266 /*
1267  * Initialise the specified Send Ring, using the information in the
1268  * <dma_area> descriptors that it contains to set up all the other
1269  * fields. This routine should be called only once for each ring.
1270  */
1271 static void
1272 bge_init_send_ring(bge_t *bgep, uint64_t ring)
1273 {
1274 	send_ring_t *srp;
1275 	bge_status_t *bsp;
1276 	sw_sbd_t *ssbdp;
1277 	dma_area_t desc;
1278 	dma_area_t pbuf;
1279 	uint32_t nslots;
1280 	uint32_t slot;
1281 	uint32_t split;
1282 
1283 	BGE_TRACE(("bge_init_send_ring($%p, %d)",
1284 		(void *)bgep, ring));
1285 
1286 	/*
1287 	 * The chip architecture requires that host-based send rings
1288 	 * have 512 elements per ring.  See 570X-PG102-R page 56.
1289 	 */
1290 	srp = &bgep->send[ring];
1291 	nslots = srp->desc.nslots;
1292 	ASSERT(nslots == 0 || nslots == 512);
1293 
1294 	/*
1295 	 * Set up the copy of the h/w RCB
1296 	 */
1297 	srp->hw_rcb.host_ring_addr = srp->desc.cookie.dmac_laddress;
1298 	srp->hw_rcb.max_len = nslots;
1299 	srp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED;
1300 	srp->hw_rcb.nic_ring_addr = NIC_MEM_SHADOW_SEND_RING(ring, nslots);
1301 
1302 	/*
1303 	 * Other one-off initialisation of per-ring data
1304 	 */
1305 	srp->bgep = bgep;
1306 	bsp = DMA_VPTR(bgep->status_block);
1307 	srp->cons_index_p = SEND_INDEX_P(bsp, ring);
1308 	srp->chip_mbx_reg = SEND_RING_HOST_INDEX_REG(ring);
1309 	mutex_init(srp->tx_lock, NULL, MUTEX_DRIVER,
1310 	    DDI_INTR_PRI(bgep->intr_pri));
1311 	mutex_init(srp->tc_lock, NULL, MUTEX_DRIVER,
1312 	    DDI_INTR_PRI(bgep->intr_pri));
1313 
1314 	/*
1315 	 * Allocate the array of s/w Send Buffer Descriptors
1316 	 */
1317 	ssbdp = kmem_zalloc(nslots*sizeof (*ssbdp), KM_SLEEP);
1318 	srp->sw_sbds = ssbdp;
1319 
1320 	/*
1321 	 * Now initialise each array element once and for all
1322 	 */
1323 	desc = srp->desc;
1324 	for (split = 0; split < BGE_SPLIT; ++split) {
1325 		pbuf = srp->buf[split];
1326 		for (slot = 0; slot < nslots/BGE_SPLIT; ++ssbdp, ++slot) {
1327 			bge_slice_chunk(&ssbdp->desc, &desc, 1,
1328 				sizeof (bge_sbd_t));
1329 			bge_slice_chunk(&ssbdp->pbuf, &pbuf, 1,
1330 				bgep->chipid.snd_buff_size);
1331 		}
1332 		ASSERT(pbuf.alength == 0);
1333 	}
1334 	ASSERT(desc.alength == 0);
1335 }
1336 
1337 /*
1338  * Clean up initialisation done above before the memory is freed
1339  */
1340 static void
1341 bge_fini_send_ring(bge_t *bgep, uint64_t ring)
1342 {
1343 	send_ring_t *srp;
1344 	sw_sbd_t *ssbdp;
1345 
1346 	BGE_TRACE(("bge_fini_send_ring($%p, %d)",
1347 		(void *)bgep, ring));
1348 
1349 	srp = &bgep->send[ring];
1350 	ssbdp = srp->sw_sbds;
1351 	kmem_free(ssbdp, srp->desc.nslots*sizeof (*ssbdp));
1352 
1353 	mutex_destroy(srp->tx_lock);
1354 	mutex_destroy(srp->tc_lock);
1355 }
1356 
1357 /*
1358  * Initialise all transmit, receive, and buffer rings.
1359  */
1360 void
1361 bge_init_rings(bge_t *bgep)
1362 {
1363 	uint64_t ring;
1364 
1365 	BGE_TRACE(("bge_init_rings($%p)", (void *)bgep));
1366 
1367 	/*
1368 	 * Perform one-off initialisation of each ring ...
1369 	 */
1370 	for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring)
1371 		bge_init_send_ring(bgep, ring);
1372 	for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring)
1373 		bge_init_recv_ring(bgep, ring);
1374 	for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring)
1375 		bge_init_buff_ring(bgep, ring);
1376 }
1377 
1378 /*
1379  * Undo the work of bge_init_rings() above before the memory is freed
1380  */
1381 void
1382 bge_fini_rings(bge_t *bgep)
1383 {
1384 	uint64_t ring;
1385 
1386 	BGE_TRACE(("bge_fini_rings($%p)", (void *)bgep));
1387 
1388 	for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring)
1389 		bge_fini_buff_ring(bgep, ring);
1390 	for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring)
1391 		bge_fini_recv_ring(bgep, ring);
1392 	for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring)
1393 		bge_fini_send_ring(bgep, ring);
1394 }
1395 
1396 /*
1397  * Allocate an area of memory and a DMA handle for accessing it
1398  */
1399 static int
1400 bge_alloc_dma_mem(bge_t *bgep, size_t memsize, ddi_device_acc_attr_t *attr_p,
1401 	uint_t dma_flags, dma_area_t *dma_p)
1402 {
1403 	caddr_t va;
1404 	int err;
1405 
1406 	BGE_TRACE(("bge_alloc_dma_mem($%p, %ld, $%p, 0x%x, $%p)",
1407 		(void *)bgep, memsize, attr_p, dma_flags, dma_p));
1408 
1409 	/*
1410 	 * Allocate handle
1411 	 */
1412 	err = ddi_dma_alloc_handle(bgep->devinfo, &dma_attr,
1413 		DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl);
1414 	if (err != DDI_SUCCESS)
1415 		return (DDI_FAILURE);
1416 
1417 	/*
1418 	 * Allocate memory
1419 	 */
1420 	err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, attr_p,
1421 		dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING),
1422 		DDI_DMA_SLEEP, NULL, &va, &dma_p->alength, &dma_p->acc_hdl);
1423 	if (err != DDI_SUCCESS)
1424 		return (DDI_FAILURE);
1425 
1426 	/*
1427 	 * Bind the two together
1428 	 */
1429 	dma_p->mem_va = va;
1430 	err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL,
1431 		va, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL,
1432 		&dma_p->cookie, &dma_p->ncookies);
1433 
1434 	BGE_DEBUG(("bge_alloc_dma_mem(): bind %d bytes; err %d, %d cookies",
1435 		dma_p->alength, err, dma_p->ncookies));
1436 
1437 	if (err != DDI_DMA_MAPPED || dma_p->ncookies != 1)
1438 		return (DDI_FAILURE);
1439 
1440 	dma_p->nslots = ~0U;
1441 	dma_p->size = ~0U;
1442 	dma_p->token = ~0U;
1443 	dma_p->offset = 0;
1444 	return (DDI_SUCCESS);
1445 }
1446 
1447 /*
1448  * Free one allocated area of DMAable memory
1449  */
1450 static void
1451 bge_free_dma_mem(dma_area_t *dma_p)
1452 {
1453 	if (dma_p->dma_hdl != NULL) {
1454 		if (dma_p->ncookies) {
1455 			(void) ddi_dma_unbind_handle(dma_p->dma_hdl);
1456 			dma_p->ncookies = 0;
1457 		}
1458 		ddi_dma_free_handle(&dma_p->dma_hdl);
1459 		dma_p->dma_hdl = NULL;
1460 	}
1461 
1462 	if (dma_p->acc_hdl != NULL) {
1463 		ddi_dma_mem_free(&dma_p->acc_hdl);
1464 		dma_p->acc_hdl = NULL;
1465 	}
1466 }
1467 
1468 /*
1469  * This function allocates all the transmit and receive buffers
1470  * and descriptors, in four chunks (or one, if MONOLITHIC).
1471  */
1472 int
1473 bge_alloc_bufs(bge_t *bgep)
1474 {
1475 	dma_area_t area;
1476 	size_t rxbuffsize;
1477 	size_t txbuffsize;
1478 	size_t rxbuffdescsize;
1479 	size_t rxdescsize;
1480 	size_t txdescsize;
1481 	uint64_t ring;
1482 	uint64_t rx_rings = bgep->chipid.rx_rings;
1483 	uint64_t tx_rings = bgep->chipid.tx_rings;
1484 	int split;
1485 	int err;
1486 
1487 	BGE_TRACE(("bge_alloc_bufs($%p)",
1488 		(void *)bgep));
1489 
1490 	rxbuffsize = BGE_STD_SLOTS_USED*BGE_STD_BUFF_SIZE;
1491 	rxbuffsize += bgep->chipid.jumbo_slots*bgep->chipid.recv_jumbo_size;
1492 	rxbuffsize += BGE_MINI_SLOTS_USED*BGE_MINI_BUFF_SIZE;
1493 
1494 	txbuffsize = BGE_SEND_SLOTS_USED*bgep->chipid.snd_buff_size;
1495 	txbuffsize *= tx_rings;
1496 
1497 	rxdescsize = rx_rings*bgep->chipid.recv_slots;
1498 	rxdescsize *= sizeof (bge_rbd_t);
1499 
1500 	rxbuffdescsize = BGE_STD_SLOTS_USED;
1501 	rxbuffdescsize += bgep->chipid.jumbo_slots;
1502 	rxbuffdescsize += BGE_MINI_SLOTS_USED;
1503 	rxbuffdescsize *= sizeof (bge_rbd_t);
1504 
1505 	txdescsize = tx_rings*BGE_SEND_SLOTS_USED;
1506 	txdescsize *= sizeof (bge_sbd_t);
1507 	txdescsize += sizeof (bge_statistics_t);
1508 	txdescsize += sizeof (bge_status_t);
1509 	txdescsize += BGE_STATUS_PADDING;
1510 
1511 #if	BGE_MONOLITHIC
1512 
1513 	err = bge_alloc_dma_mem(bgep,
1514 		rxbuffsize+txbuffsize+rxbuffdescsize+rxdescsize+txdescsize,
1515 		&bge_data_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &area);
1516 	if (err != DDI_SUCCESS)
1517 		return (DDI_FAILURE);
1518 
1519 	BGE_DEBUG(("allocated range $%p-$%p (0x%lx-0x%lx)",
1520 		DMA_VPTR(area),
1521 		(caddr_t)DMA_VPTR(area)+area.alength,
1522 		area.cookie.dmac_laddress,
1523 		area.cookie.dmac_laddress+area.alength));
1524 
1525 	bge_slice_chunk(&bgep->rx_buff[0], &area, 1, rxbuffsize);
1526 	bge_slice_chunk(&bgep->tx_buff[0], &area, 1, txbuffsize);
1527 	bge_slice_chunk(&bgep->rx_desc[0], &area, 1, rxdescsize);
1528 	bge_slice_chunk(&bgep->tx_desc, &area, 1, txdescsize);
1529 
1530 #else
1531 	/*
1532 	 * Allocate memory & handles for RX buffers
1533 	 */
1534 	ASSERT((rxbuffsize % BGE_SPLIT) == 0);
1535 	for (split = 0; split < BGE_SPLIT; ++split) {
1536 		err = bge_alloc_dma_mem(bgep, rxbuffsize/BGE_SPLIT,
1537 			&bge_data_accattr, DDI_DMA_READ | BGE_DMA_MODE,
1538 			&bgep->rx_buff[split]);
1539 		if (err != DDI_SUCCESS)
1540 			return (DDI_FAILURE);
1541 	}
1542 
1543 	/*
1544 	 * Allocate memory & handles for TX buffers
1545 	 */
1546 	ASSERT((txbuffsize % BGE_SPLIT) == 0);
1547 	for (split = 0; split < BGE_SPLIT; ++split) {
1548 		err = bge_alloc_dma_mem(bgep, txbuffsize/BGE_SPLIT,
1549 			&bge_data_accattr, DDI_DMA_WRITE | BGE_DMA_MODE,
1550 			&bgep->tx_buff[split]);
1551 		if (err != DDI_SUCCESS)
1552 			return (DDI_FAILURE);
1553 	}
1554 
1555 	/*
1556 	 * Allocate memory & handles for receive return rings
1557 	 */
1558 	ASSERT((rxdescsize % rx_rings) == 0);
1559 	for (split = 0; split < rx_rings; ++split) {
1560 		err = bge_alloc_dma_mem(bgep, rxdescsize/rx_rings,
1561 			&bge_desc_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
1562 			&bgep->rx_desc[split]);
1563 		if (err != DDI_SUCCESS)
1564 			return (DDI_FAILURE);
1565 	}
1566 
1567 	/*
1568 	 * Allocate memory & handles for buffer (producer) descriptor rings
1569 	 */
1570 	err = bge_alloc_dma_mem(bgep, rxbuffdescsize, &bge_desc_accattr,
1571 		DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->rx_desc[split]);
1572 	if (err != DDI_SUCCESS)
1573 		return (DDI_FAILURE);
1574 
1575 	/*
1576 	 * Allocate memory & handles for TX descriptor rings,
1577 	 * status block, and statistics area
1578 	 */
1579 	err = bge_alloc_dma_mem(bgep, txdescsize, &bge_desc_accattr,
1580 		DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->tx_desc);
1581 	if (err != DDI_SUCCESS)
1582 		return (DDI_FAILURE);
1583 
1584 #endif	/* BGE_MONOLITHIC */
1585 
1586 	/*
1587 	 * Now carve up each of the allocated areas ...
1588 	 */
1589 	for (split = 0; split < BGE_SPLIT; ++split) {
1590 		area = bgep->rx_buff[split];
1591 		bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].buf[split],
1592 			&area, BGE_STD_SLOTS_USED/BGE_SPLIT,
1593 			BGE_STD_BUFF_SIZE);
1594 		bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].buf[split],
1595 			&area, bgep->chipid.jumbo_slots/BGE_SPLIT,
1596 			bgep->chipid.recv_jumbo_size);
1597 		bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].buf[split],
1598 			&area, BGE_MINI_SLOTS_USED/BGE_SPLIT,
1599 			BGE_MINI_BUFF_SIZE);
1600 		ASSERT(area.alength >= 0);
1601 	}
1602 
1603 	for (split = 0; split < BGE_SPLIT; ++split) {
1604 		area = bgep->tx_buff[split];
1605 		for (ring = 0; ring < tx_rings; ++ring)
1606 			bge_slice_chunk(&bgep->send[ring].buf[split],
1607 				&area, BGE_SEND_SLOTS_USED/BGE_SPLIT,
1608 				bgep->chipid.snd_buff_size);
1609 		for (; ring < BGE_SEND_RINGS_MAX; ++ring)
1610 			bge_slice_chunk(&bgep->send[ring].buf[split],
1611 				&area, 0/BGE_SPLIT,
1612 				bgep->chipid.snd_buff_size);
1613 		ASSERT(area.alength >= 0);
1614 	}
1615 
1616 	for (ring = 0; ring < rx_rings; ++ring)
1617 		bge_slice_chunk(&bgep->recv[ring].desc, &bgep->rx_desc[ring],
1618 			bgep->chipid.recv_slots, sizeof (bge_rbd_t));
1619 
1620 	area = bgep->rx_desc[rx_rings];
1621 	for (; ring < BGE_RECV_RINGS_MAX; ++ring)
1622 		bge_slice_chunk(&bgep->recv[ring].desc, &area,
1623 			0, sizeof (bge_rbd_t));
1624 	bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].desc, &area,
1625 		BGE_STD_SLOTS_USED, sizeof (bge_rbd_t));
1626 	bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].desc, &area,
1627 		bgep->chipid.jumbo_slots, sizeof (bge_rbd_t));
1628 	bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].desc, &area,
1629 		BGE_MINI_SLOTS_USED, sizeof (bge_rbd_t));
1630 	ASSERT(area.alength == 0);
1631 
1632 	area = bgep->tx_desc;
1633 	for (ring = 0; ring < tx_rings; ++ring)
1634 		bge_slice_chunk(&bgep->send[ring].desc, &area,
1635 			BGE_SEND_SLOTS_USED, sizeof (bge_sbd_t));
1636 	for (; ring < BGE_SEND_RINGS_MAX; ++ring)
1637 		bge_slice_chunk(&bgep->send[ring].desc, &area,
1638 			0, sizeof (bge_sbd_t));
1639 	bge_slice_chunk(&bgep->statistics, &area, 1, sizeof (bge_statistics_t));
1640 	bge_slice_chunk(&bgep->status_block, &area, 1, sizeof (bge_status_t));
1641 	ASSERT(area.alength == BGE_STATUS_PADDING);
1642 	DMA_ZERO(bgep->status_block);
1643 
1644 	return (DDI_SUCCESS);
1645 }
1646 
1647 /*
1648  * This routine frees the transmit and receive buffers and descriptors.
1649  * Make sure the chip is stopped before calling it!
1650  */
1651 void
1652 bge_free_bufs(bge_t *bgep)
1653 {
1654 	int split;
1655 
1656 	BGE_TRACE(("bge_free_bufs($%p)",
1657 		(void *)bgep));
1658 
1659 #if	BGE_MONOLITHIC
1660 	bge_free_dma_mem(&bgep->rx_buff[0]);
1661 #else
1662 	bge_free_dma_mem(&bgep->tx_desc);
1663 	for (split = 0; split < BGE_RECV_RINGS_SPLIT; ++split)
1664 		bge_free_dma_mem(&bgep->rx_desc[split]);
1665 	for (split = 0; split < BGE_SPLIT; ++split)
1666 		bge_free_dma_mem(&bgep->tx_buff[split]);
1667 	for (split = 0; split < BGE_SPLIT; ++split)
1668 		bge_free_dma_mem(&bgep->rx_buff[split]);
1669 #endif	/* BGE_MONOLITHIC */
1670 }
1671 
1672 /*
1673  * Determine (initial) MAC address ("BIA") to use for this interface
1674  */
1675 
1676 static void
1677 bge_find_mac_address(bge_t *bgep, chip_id_t *cidp)
1678 {
1679 	struct ether_addr sysaddr;
1680 	char propbuf[8];		/* "true" or "false", plus NUL	*/
1681 	uchar_t *bytes;
1682 	int *ints;
1683 	uint_t nelts;
1684 	int err;
1685 
1686 	BGE_TRACE(("bge_find_mac_address($%p)",
1687 		(void *)bgep));
1688 
1689 	BGE_DEBUG(("bge_find_mac_address: hw_mac_addr %012llx, => %s (%sset)",
1690 		cidp->hw_mac_addr,
1691 		ether_sprintf((void *)cidp->vendor_addr.addr),
1692 		cidp->vendor_addr.set ? "" : "not "));
1693 
1694 	/*
1695 	 * The "vendor's factory-set address" may already have
1696 	 * been extracted from the chip, but if the property
1697 	 * "local-mac-address" is set we use that instead.  It
1698 	 * will normally be set by OBP, but it could also be
1699 	 * specified in a .conf file(!)
1700 	 *
1701 	 * There doesn't seem to be a way to define byte-array
1702 	 * properties in a .conf, so we check whether it looks
1703 	 * like an array of 6 ints instead.
1704 	 *
1705 	 * Then, we check whether it looks like an array of 6
1706 	 * bytes (which it should, if OBP set it).  If we can't
1707 	 * make sense of it either way, we'll ignore it.
1708 	 */
1709 	err = ddi_prop_lookup_int_array(DDI_DEV_T_ANY, bgep->devinfo,
1710 		DDI_PROP_DONTPASS, localmac_propname, &ints, &nelts);
1711 	if (err == DDI_PROP_SUCCESS) {
1712 		if (nelts == ETHERADDRL) {
1713 			while (nelts--)
1714 				cidp->vendor_addr.addr[nelts] = ints[nelts];
1715 			cidp->vendor_addr.set = 1;
1716 		}
1717 		ddi_prop_free(ints);
1718 	}
1719 
1720 	err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo,
1721 		DDI_PROP_DONTPASS, localmac_propname, &bytes, &nelts);
1722 	if (err == DDI_PROP_SUCCESS) {
1723 		if (nelts == ETHERADDRL) {
1724 			while (nelts--)
1725 				cidp->vendor_addr.addr[nelts] = bytes[nelts];
1726 			cidp->vendor_addr.set = 1;
1727 		}
1728 		ddi_prop_free(bytes);
1729 	}
1730 
1731 	BGE_DEBUG(("bge_find_mac_address: +local %s (%sset)",
1732 		ether_sprintf((void *)cidp->vendor_addr.addr),
1733 		cidp->vendor_addr.set ? "" : "not "));
1734 
1735 	/*
1736 	 * Look up the OBP property "local-mac-address?".  Note that even
1737 	 * though its value is a string (which should be "true" or "false"),
1738 	 * it can't be decoded by ddi_prop_lookup_string(9F).  So, we zero
1739 	 * the buffer first and then fetch the property as an untyped array;
1740 	 * this may or may not include a final NUL, but since there will
1741 	 * always be one left at the end of the buffer we can now treat it
1742 	 * as a string anyway.
1743 	 */
1744 	nelts = sizeof (propbuf);
1745 	bzero(propbuf, nelts--);
1746 	err = ddi_getlongprop_buf(DDI_DEV_T_ANY, bgep->devinfo,
1747 		DDI_PROP_CANSLEEP, localmac_boolname, propbuf, (int *)&nelts);
1748 
1749 	/*
1750 	 * Now, if the address still isn't set from the hardware (SEEPROM)
1751 	 * or the OBP or .conf property, OR if the user has foolishly set
1752 	 * 'local-mac-address? = false', use "the system address" instead
1753 	 * (but only if it's non-null i.e. has been set from the IDPROM).
1754 	 */
1755 	if (cidp->vendor_addr.set == 0 || strcmp(propbuf, "false") == 0)
1756 		if (localetheraddr(NULL, &sysaddr) != 0) {
1757 			ethaddr_copy(&sysaddr, cidp->vendor_addr.addr);
1758 			cidp->vendor_addr.set = 1;
1759 		}
1760 
1761 	BGE_DEBUG(("bge_find_mac_address: +system %s (%sset)",
1762 		ether_sprintf((void *)cidp->vendor_addr.addr),
1763 		cidp->vendor_addr.set ? "" : "not "));
1764 
1765 	/*
1766 	 * Finally(!), if there's a valid "mac-address" property (created
1767 	 * if we netbooted from this interface), we must use this instead
1768 	 * of any of the above to ensure that the NFS/install server doesn't
1769 	 * get confused by the address changing as Solaris takes over!
1770 	 */
1771 	err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo,
1772 		DDI_PROP_DONTPASS, macaddr_propname, &bytes, &nelts);
1773 	if (err == DDI_PROP_SUCCESS) {
1774 		if (nelts == ETHERADDRL) {
1775 			while (nelts--)
1776 				cidp->vendor_addr.addr[nelts] = bytes[nelts];
1777 			cidp->vendor_addr.set = 1;
1778 		}
1779 		ddi_prop_free(bytes);
1780 	}
1781 
1782 	BGE_DEBUG(("bge_find_mac_address: =final %s (%sset)",
1783 		ether_sprintf((void *)cidp->vendor_addr.addr),
1784 		cidp->vendor_addr.set ? "" : "not "));
1785 }
1786 
1787 
1788 /*ARGSUSED*/
1789 int
1790 bge_check_acc_handle(bge_t *bgep, ddi_acc_handle_t handle)
1791 {
1792 	ddi_fm_error_t de;
1793 
1794 	ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION);
1795 	ddi_fm_acc_err_clear(handle, DDI_FME_VERSION);
1796 	return (de.fme_status);
1797 }
1798 
1799 /*ARGSUSED*/
1800 int
1801 bge_check_dma_handle(bge_t *bgep, ddi_dma_handle_t handle)
1802 {
1803 	ddi_fm_error_t de;
1804 
1805 	ASSERT(bgep->progress & PROGRESS_BUFS);
1806 	ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION);
1807 	return (de.fme_status);
1808 }
1809 
1810 /*
1811  * The IO fault service error handling callback function
1812  */
1813 /*ARGSUSED*/
1814 static int
1815 bge_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
1816 {
1817 	/*
1818 	 * as the driver can always deal with an error in any dma or
1819 	 * access handle, we can just return the fme_status value.
1820 	 */
1821 	pci_ereport_post(dip, err, NULL);
1822 	return (err->fme_status);
1823 }
1824 
1825 static void
1826 bge_fm_init(bge_t *bgep)
1827 {
1828 	ddi_iblock_cookie_t iblk;
1829 
1830 	/* Only register with IO Fault Services if we have some capability */
1831 	if (bgep->fm_capabilities) {
1832 		bge_reg_accattr.devacc_attr_access = DDI_FLAGERR_ACC;
1833 		bge_desc_accattr.devacc_attr_access = DDI_FLAGERR_ACC;
1834 		dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
1835 
1836 		/* Register capabilities with IO Fault Services */
1837 		ddi_fm_init(bgep->devinfo, &bgep->fm_capabilities, &iblk);
1838 
1839 		/*
1840 		 * Initialize pci ereport capabilities if ereport capable
1841 		 */
1842 		if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) ||
1843 		    DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
1844 			pci_ereport_setup(bgep->devinfo);
1845 
1846 		/*
1847 		 * Register error callback if error callback capable
1848 		 */
1849 		if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
1850 			ddi_fm_handler_register(bgep->devinfo,
1851 			bge_fm_error_cb, (void*) bgep);
1852 	} else {
1853 		/*
1854 		 * These fields have to be cleared of FMA if there are no
1855 		 * FMA capabilities at runtime.
1856 		 */
1857 		bge_reg_accattr.devacc_attr_access = DDI_DEFAULT_ACC;
1858 		bge_desc_accattr.devacc_attr_access = DDI_DEFAULT_ACC;
1859 		dma_attr.dma_attr_flags = 0;
1860 	}
1861 }
1862 
1863 static void
1864 bge_fm_fini(bge_t *bgep)
1865 {
1866 	/* Only unregister FMA capabilities if we registered some */
1867 	if (bgep->fm_capabilities) {
1868 
1869 		/*
1870 		 * Release any resources allocated by pci_ereport_setup()
1871 		 */
1872 		if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) ||
1873 		    DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
1874 			pci_ereport_teardown(bgep->devinfo);
1875 
1876 		/*
1877 		 * Un-register error callback if error callback capable
1878 		 */
1879 		if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
1880 			ddi_fm_handler_unregister(bgep->devinfo);
1881 
1882 		/* Unregister from IO Fault Services */
1883 		ddi_fm_fini(bgep->devinfo);
1884 	}
1885 }
1886 
1887 static void
1888 #ifdef BGE_IPMI_ASF
1889 bge_unattach(bge_t *bgep, uint_t asf_mode)
1890 #else
1891 bge_unattach(bge_t *bgep)
1892 #endif
1893 {
1894 	mac_t	*macp;
1895 
1896 	BGE_TRACE(("bge_unattach($%p)",
1897 		(void *)bgep));
1898 
1899 	/*
1900 	 * Flag that no more activity may be initiated
1901 	 */
1902 	bgep->progress &= ~PROGRESS_READY;
1903 
1904 	/*
1905 	 * Quiesce the PHY and MAC (leave it reset but still powered).
1906 	 * Clean up and free all BGE data structures
1907 	 */
1908 	if (bgep->cyclic_id) {
1909 		mutex_enter(&cpu_lock);
1910 		cyclic_remove(bgep->cyclic_id);
1911 		mutex_exit(&cpu_lock);
1912 	}
1913 	if (bgep->progress & PROGRESS_KSTATS)
1914 		bge_fini_kstats(bgep);
1915 	if (bgep->progress & PROGRESS_NDD)
1916 		bge_nd_cleanup(bgep);
1917 	if (bgep->progress & PROGRESS_PHY)
1918 		bge_phys_reset(bgep);
1919 	if (bgep->progress & PROGRESS_HWINT) {
1920 		mutex_enter(bgep->genlock);
1921 #ifdef BGE_IPMI_ASF
1922 		if (bge_chip_reset(bgep, B_FALSE, asf_mode) != DDI_SUCCESS)
1923 #else
1924 		if (bge_chip_reset(bgep, B_FALSE) != DDI_SUCCESS)
1925 #endif
1926 			ddi_fm_service_impact(bgep->devinfo,
1927 			    DDI_SERVICE_UNAFFECTED);
1928 #ifdef BGE_IPMI_ASF
1929 		if (bgep->asf_enabled) {
1930 			/*
1931 			 * This register has been overlaid. We restore its
1932 			 * initial value here.
1933 			 */
1934 			bge_nic_put32(bgep, BGE_NIC_DATA_SIG_ADDR,
1935 			    BGE_NIC_DATA_SIG);
1936 		}
1937 #endif
1938 		if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK)
1939 			ddi_fm_service_impact(bgep->devinfo,
1940 			    DDI_SERVICE_UNAFFECTED);
1941 		if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK)
1942 			ddi_fm_service_impact(bgep->devinfo,
1943 			    DDI_SERVICE_UNAFFECTED);
1944 		mutex_exit(bgep->genlock);
1945 	}
1946 	if (bgep->progress & PROGRESS_INTR) {
1947 		bge_intr_disable(bgep);
1948 		bge_fini_rings(bgep);
1949 	}
1950 	if (bgep->progress & PROGRESS_HWINT) {
1951 		bge_rem_intrs(bgep);
1952 		rw_destroy(bgep->errlock);
1953 		mutex_destroy(bgep->softintrlock);
1954 		mutex_destroy(bgep->genlock);
1955 	}
1956 	if (bgep->progress & PROGRESS_FACTOTUM)
1957 		ddi_remove_softintr(bgep->factotum_id);
1958 	if (bgep->progress & PROGRESS_RESCHED)
1959 		ddi_remove_softintr(bgep->resched_id);
1960 	if (bgep->progress & PROGRESS_BUFS)
1961 		bge_free_bufs(bgep);
1962 	if (bgep->progress & PROGRESS_REGS)
1963 		ddi_regs_map_free(&bgep->io_handle);
1964 	if (bgep->progress & PROGRESS_CFG)
1965 		pci_config_teardown(&bgep->cfg_handle);
1966 
1967 	bge_fm_fini(bgep);
1968 
1969 	ddi_remove_minor_node(bgep->devinfo, NULL);
1970 	macp = bgep->macp;
1971 	kmem_free(macp, sizeof (*macp));
1972 	kmem_free(bgep, sizeof (*bgep));
1973 }
1974 
1975 static int
1976 bge_resume(dev_info_t *devinfo)
1977 {
1978 	bge_t *bgep;				/* Our private data	*/
1979 	chip_id_t *cidp;
1980 	chip_id_t chipid;
1981 
1982 	bgep = ddi_get_driver_private(devinfo);
1983 	if (bgep == NULL)
1984 		return (DDI_FAILURE);
1985 
1986 	/*
1987 	 * Refuse to resume if the data structures aren't consistent
1988 	 */
1989 	if (bgep->devinfo != devinfo)
1990 		return (DDI_FAILURE);
1991 
1992 #ifdef BGE_IPMI_ASF
1993 	/*
1994 	 * Power management hasn't been supported in BGE now. If you
1995 	 * want to implement it, please add the ASF/IPMI related
1996 	 * code here.
1997 	 */
1998 
1999 #endif
2000 
2001 	/*
2002 	 * Read chip ID & set up config space command register(s)
2003 	 * Refuse to resume if the chip has changed its identity!
2004 	 */
2005 	cidp = &bgep->chipid;
2006 	mutex_enter(bgep->genlock);
2007 	bge_chip_cfg_init(bgep, &chipid, B_FALSE);
2008 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
2009 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2010 		mutex_exit(bgep->genlock);
2011 		return (DDI_FAILURE);
2012 	}
2013 	mutex_exit(bgep->genlock);
2014 	if (chipid.vendor != cidp->vendor)
2015 		return (DDI_FAILURE);
2016 	if (chipid.device != cidp->device)
2017 		return (DDI_FAILURE);
2018 	if (chipid.revision != cidp->revision)
2019 		return (DDI_FAILURE);
2020 	if (chipid.asic_rev != cidp->asic_rev)
2021 		return (DDI_FAILURE);
2022 
2023 	/*
2024 	 * All OK, reinitialise h/w & kick off GLD scheduling
2025 	 */
2026 	mutex_enter(bgep->genlock);
2027 	if (bge_restart(bgep, B_TRUE) != DDI_SUCCESS) {
2028 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
2029 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
2030 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2031 		mutex_exit(bgep->genlock);
2032 		return (DDI_FAILURE);
2033 	}
2034 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
2035 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2036 		mutex_exit(bgep->genlock);
2037 		return (DDI_FAILURE);
2038 	}
2039 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
2040 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2041 		mutex_exit(bgep->genlock);
2042 		return (DDI_FAILURE);
2043 	}
2044 	mutex_exit(bgep->genlock);
2045 	return (DDI_SUCCESS);
2046 }
2047 
2048 static uint8_t ether_brdcst[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
2049 
2050 /*
2051  * attach(9E) -- Attach a device to the system
2052  *
2053  * Called once for each board successfully probed.
2054  */
2055 static int
2056 bge_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd)
2057 {
2058 	bge_t *bgep;				/* Our private data	*/
2059 	mac_t *macp;
2060 	chip_id_t *cidp;
2061 	cyc_handler_t cychand;
2062 	cyc_time_t cyctime;
2063 	caddr_t regs;
2064 	int instance;
2065 	int err;
2066 	mac_info_t *mip;
2067 	int intr_types;
2068 #ifdef BGE_IPMI_ASF
2069 	uint32_t mhcrValue;
2070 #endif
2071 
2072 	instance = ddi_get_instance(devinfo);
2073 
2074 	BGE_GTRACE(("bge_attach($%p, %d) instance %d",
2075 		(void *)devinfo, cmd, instance));
2076 	BGE_BRKPT(NULL, "bge_attach");
2077 
2078 	switch (cmd) {
2079 	default:
2080 		return (DDI_FAILURE);
2081 
2082 	case DDI_RESUME:
2083 		return (bge_resume(devinfo));
2084 
2085 	case DDI_ATTACH:
2086 		break;
2087 	}
2088 
2089 	/*
2090 	 * Allocate mac_t and BGE private structures, and
2091 	 * cross-link them so that given either one of these or
2092 	 * the devinfo the others can be derived.
2093 	 */
2094 	macp = kmem_zalloc(sizeof (*macp), KM_SLEEP);
2095 	bgep = kmem_zalloc(sizeof (*bgep), KM_SLEEP);
2096 	ddi_set_driver_private(devinfo, bgep);
2097 	bgep->bge_guard = BGE_GUARD;
2098 	bgep->devinfo = devinfo;
2099 	bgep->macp = macp;
2100 	macp->m_driver = bgep;
2101 
2102 	/*
2103 	 * Initialize more fields in BGE private data
2104 	 */
2105 	bgep->debug = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2106 		DDI_PROP_DONTPASS, debug_propname, bge_debug);
2107 	(void) snprintf(bgep->ifname, sizeof (bgep->ifname), "%s%d",
2108 		BGE_DRIVER_NAME, instance);
2109 
2110 	/*
2111 	 * Initialize for fma support
2112 	 */
2113 	bgep->fm_capabilities = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2114 	    DDI_PROP_DONTPASS, fm_cap,
2115 	    DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE |
2116 	    DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE);
2117 	BGE_DEBUG(("bgep->fm_capabilities = %d", bgep->fm_capabilities));
2118 	bge_fm_init(bgep);
2119 
2120 	/*
2121 	 * Look up the IOMMU's page size for DVMA mappings (must be
2122 	 * a power of 2) and convert to a mask.  This can be used to
2123 	 * determine whether a message buffer crosses a page boundary.
2124 	 * Note: in 2s complement binary notation, if X is a power of
2125 	 * 2, then -X has the representation "11...1100...00".
2126 	 */
2127 	bgep->pagemask = dvma_pagesize(devinfo);
2128 	ASSERT(ddi_ffs(bgep->pagemask) == ddi_fls(bgep->pagemask));
2129 	bgep->pagemask = -bgep->pagemask;
2130 
2131 	/*
2132 	 * Map config space registers
2133 	 * Read chip ID & set up config space command register(s)
2134 	 *
2135 	 * Note: this leaves the chip accessible by Memory Space
2136 	 * accesses, but with interrupts and Bus Mastering off.
2137 	 * This should ensure that nothing untoward will happen
2138 	 * if it has been left active by the (net-)bootloader.
2139 	 * We'll re-enable Bus Mastering once we've reset the chip,
2140 	 * and allow interrupts only when everything else is set up.
2141 	 */
2142 	err = pci_config_setup(devinfo, &bgep->cfg_handle);
2143 #ifdef BGE_IPMI_ASF
2144 	mhcrValue = pci_config_get32(bgep->cfg_handle, PCI_CONF_BGE_MHCR);
2145 	if (mhcrValue & MHCR_ENABLE_ENDIAN_WORD_SWAP) {
2146 		bgep->asf_wordswapped = B_TRUE;
2147 	} else {
2148 		bgep->asf_wordswapped = B_FALSE;
2149 	}
2150 	bge_asf_get_config(bgep);
2151 #endif
2152 	if (err != DDI_SUCCESS) {
2153 		bge_problem(bgep, "pci_config_setup() failed");
2154 		goto attach_fail;
2155 	}
2156 	bgep->progress |= PROGRESS_CFG;
2157 	cidp = &bgep->chipid;
2158 	bzero(cidp, sizeof (*cidp));
2159 	bge_chip_cfg_init(bgep, cidp, B_FALSE);
2160 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
2161 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2162 		goto attach_fail;
2163 	}
2164 
2165 #ifdef BGE_IPMI_ASF
2166 	if (DEVICE_5721_SERIES_CHIPSETS(bgep) ||
2167 	    DEVICE_5714_SERIES_CHIPSETS(bgep)) {
2168 		bgep->asf_newhandshake = B_TRUE;
2169 	} else {
2170 		bgep->asf_newhandshake = B_FALSE;
2171 	}
2172 #endif
2173 
2174 	/*
2175 	 * Update those parts of the chip ID derived from volatile
2176 	 * registers with the values seen by OBP (in case the chip
2177 	 * has been reset externally and therefore lost them).
2178 	 */
2179 	cidp->subven = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2180 		DDI_PROP_DONTPASS, subven_propname, cidp->subven);
2181 	cidp->subdev = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2182 		DDI_PROP_DONTPASS, subdev_propname, cidp->subdev);
2183 	cidp->clsize = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2184 		DDI_PROP_DONTPASS, clsize_propname, cidp->clsize);
2185 	cidp->latency = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2186 		DDI_PROP_DONTPASS, latency_propname, cidp->latency);
2187 	cidp->rx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2188 		DDI_PROP_DONTPASS, rxrings_propname, cidp->rx_rings);
2189 	cidp->tx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2190 		DDI_PROP_DONTPASS, txrings_propname, cidp->tx_rings);
2191 
2192 	if (bge_jumbo_enable == B_TRUE) {
2193 		cidp->default_mtu = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
2194 			DDI_PROP_DONTPASS, default_mtu, BGE_DEFAULT_MTU);
2195 		if ((cidp->default_mtu < BGE_DEFAULT_MTU)||
2196 			(cidp->default_mtu > BGE_MAXIMUM_MTU)) {
2197 			cidp->default_mtu = BGE_DEFAULT_MTU;
2198 		}
2199 	}
2200 	/*
2201 	 * Map operating registers
2202 	 */
2203 	err = ddi_regs_map_setup(devinfo, BGE_PCI_OPREGS_RNUMBER,
2204 		&regs, 0, 0, &bge_reg_accattr, &bgep->io_handle);
2205 	if (err != DDI_SUCCESS) {
2206 		bge_problem(bgep, "ddi_regs_map_setup() failed");
2207 		goto attach_fail;
2208 	}
2209 	bgep->io_regs = regs;
2210 	bgep->progress |= PROGRESS_REGS;
2211 
2212 	/*
2213 	 * Characterise the device, so we know its requirements.
2214 	 * Then allocate the appropriate TX and RX descriptors & buffers.
2215 	 */
2216 	if (bge_chip_id_init(bgep) == EIO) {
2217 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2218 		goto attach_fail;
2219 	}
2220 	err = bge_alloc_bufs(bgep);
2221 	if (err != DDI_SUCCESS) {
2222 		bge_problem(bgep, "DMA buffer allocation failed");
2223 		goto attach_fail;
2224 	}
2225 	bgep->progress |= PROGRESS_BUFS;
2226 
2227 	/*
2228 	 * Add the softint handlers:
2229 	 *
2230 	 * Both of these handlers are used to avoid restrictions on the
2231 	 * context and/or mutexes required for some operations.  In
2232 	 * particular, the hardware interrupt handler and its subfunctions
2233 	 * can detect a number of conditions that we don't want to handle
2234 	 * in that context or with that set of mutexes held.  So, these
2235 	 * softints are triggered instead:
2236 	 *
2237 	 * the <resched> softint is triggered if if we have previously
2238 	 * had to refuse to send a packet because of resource shortage
2239 	 * (we've run out of transmit buffers), but the send completion
2240 	 * interrupt handler has now detected that more buffers have
2241 	 * become available.
2242 	 *
2243 	 * the <factotum> is triggered if the h/w interrupt handler
2244 	 * sees the <link state changed> or <error> bits in the status
2245 	 * block.  It's also triggered periodically to poll the link
2246 	 * state, just in case we aren't getting link status change
2247 	 * interrupts ...
2248 	 */
2249 	err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->resched_id,
2250 		NULL, NULL, bge_reschedule, (caddr_t)bgep);
2251 	if (err != DDI_SUCCESS) {
2252 		bge_problem(bgep, "ddi_add_softintr() failed");
2253 		goto attach_fail;
2254 	}
2255 	bgep->progress |= PROGRESS_RESCHED;
2256 	err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->factotum_id,
2257 		NULL, NULL, bge_chip_factotum, (caddr_t)bgep);
2258 	if (err != DDI_SUCCESS) {
2259 		bge_problem(bgep, "ddi_add_softintr() failed");
2260 		goto attach_fail;
2261 	}
2262 	bgep->progress |= PROGRESS_FACTOTUM;
2263 
2264 	/* Get supported interrupt types */
2265 	if (ddi_intr_get_supported_types(devinfo, &intr_types) != DDI_SUCCESS) {
2266 		bge_error(bgep, "ddi_intr_get_supported_types failed\n");
2267 
2268 		goto attach_fail;
2269 	}
2270 
2271 	bge_log(bgep, "ddi_intr_get_supported_types() returned: %x",
2272 	    intr_types);
2273 
2274 	if ((intr_types & DDI_INTR_TYPE_MSI) && bgep->chipid.msi_enabled) {
2275 		if (bge_add_intrs(bgep, DDI_INTR_TYPE_MSI) != DDI_SUCCESS) {
2276 			bge_error(bgep, "MSI registration failed, "
2277 			    "trying FIXED interrupt type\n");
2278 		} else {
2279 			bge_log(bgep, "Using MSI interrupt type\n");
2280 
2281 			bgep->intr_type = DDI_INTR_TYPE_MSI;
2282 			bgep->progress |= PROGRESS_HWINT;
2283 		}
2284 	}
2285 
2286 	if (!(bgep->progress & PROGRESS_HWINT) &&
2287 	    (intr_types & DDI_INTR_TYPE_FIXED)) {
2288 		if (bge_add_intrs(bgep, DDI_INTR_TYPE_FIXED) != DDI_SUCCESS) {
2289 			bge_error(bgep, "FIXED interrupt "
2290 			    "registration failed\n");
2291 			goto attach_fail;
2292 		}
2293 
2294 		bge_log(bgep, "Using FIXED interrupt type\n");
2295 
2296 		bgep->intr_type = DDI_INTR_TYPE_FIXED;
2297 		bgep->progress |= PROGRESS_HWINT;
2298 	}
2299 
2300 	if (!(bgep->progress & PROGRESS_HWINT)) {
2301 		bge_error(bgep, "No interrupts registered\n");
2302 		goto attach_fail;
2303 	}
2304 
2305 	/*
2306 	 * Note that interrupts are not enabled yet as
2307 	 * mutex locks are not initialized. Initialize mutex locks.
2308 	 */
2309 	mutex_init(bgep->genlock, NULL, MUTEX_DRIVER,
2310 	    DDI_INTR_PRI(bgep->intr_pri));
2311 	mutex_init(bgep->softintrlock, NULL, MUTEX_DRIVER,
2312 	    DDI_INTR_PRI(bgep->intr_pri));
2313 	rw_init(bgep->errlock, NULL, RW_DRIVER,
2314 	    DDI_INTR_PRI(bgep->intr_pri));
2315 
2316 	/*
2317 	 * Initialize rings.
2318 	 */
2319 	bge_init_rings(bgep);
2320 
2321 	/*
2322 	 * Now that mutex locks are initialized, enable interrupts.
2323 	 */
2324 	bge_intr_enable(bgep);
2325 	bgep->progress |= PROGRESS_INTR;
2326 
2327 	/*
2328 	 * Initialise link state variables
2329 	 * Stop, reset & reinitialise the chip.
2330 	 * Initialise the (internal) PHY.
2331 	 */
2332 	bgep->link_state = LINK_STATE_UNKNOWN;
2333 	bgep->link_up_msg = bgep->link_down_msg = " (initialized)";
2334 
2335 	mutex_enter(bgep->genlock);
2336 
2337 	/*
2338 	 * Reset chip & rings to initial state; also reset address
2339 	 * filtering, promiscuity, loopback mode.
2340 	 */
2341 #ifdef BGE_IPMI_ASF
2342 	if (bge_reset(bgep, ASF_MODE_SHUTDOWN) != DDI_SUCCESS) {
2343 #else
2344 	if (bge_reset(bgep) != DDI_SUCCESS) {
2345 #endif
2346 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
2347 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
2348 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2349 		mutex_exit(bgep->genlock);
2350 		goto attach_fail;
2351 	}
2352 
2353 	bzero(bgep->mcast_hash, sizeof (bgep->mcast_hash));
2354 	bzero(bgep->mcast_refs, sizeof (bgep->mcast_refs));
2355 	bgep->promisc = B_FALSE;
2356 	bgep->param_loop_mode = BGE_LOOP_NONE;
2357 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
2358 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2359 		mutex_exit(bgep->genlock);
2360 		goto attach_fail;
2361 	}
2362 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
2363 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2364 		mutex_exit(bgep->genlock);
2365 		goto attach_fail;
2366 	}
2367 
2368 	mutex_exit(bgep->genlock);
2369 
2370 	if (bge_phys_init(bgep) == EIO) {
2371 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
2372 		goto attach_fail;
2373 	}
2374 	bgep->progress |= PROGRESS_PHY;
2375 
2376 	/*
2377 	 * Register NDD-tweakable parameters
2378 	 */
2379 	if (bge_nd_init(bgep)) {
2380 		bge_problem(bgep, "bge_nd_init() failed");
2381 		goto attach_fail;
2382 	}
2383 	bgep->progress |= PROGRESS_NDD;
2384 
2385 	/*
2386 	 * Create & initialise named kstats
2387 	 */
2388 	bge_init_kstats(bgep, instance);
2389 	bgep->progress |= PROGRESS_KSTATS;
2390 
2391 	/*
2392 	 * Determine whether to override the chip's own MAC address
2393 	 */
2394 	bge_find_mac_address(bgep, cidp);
2395 	ethaddr_copy(cidp->vendor_addr.addr, bgep->curr_addr.addr);
2396 	bgep->curr_addr.set = 1;
2397 
2398 	/*
2399 	 * Initialize pointers to device specific functions which
2400 	 * will be used by the generic layer.
2401 	 */
2402 	mip = &(macp->m_info);
2403 	mip->mi_media = DL_ETHER;
2404 	mip->mi_sdu_min = 0;
2405 	mip->mi_sdu_max = cidp->ethmax_size - sizeof (struct ether_header);
2406 	mip->mi_poll = DL_CAPAB_POLL;
2407 
2408 	/*
2409 	 * Workaround for Incorrect pseudo-header checksum calculation.
2410 	 * 	Use partial checksum offload for all affected chips.
2411 	 */
2412 	if (DEVICE_5704_SERIES_CHIPSETS(bgep))
2413 		mip->mi_cksum = HCKSUM_INET_PARTIAL | HCKSUM_IPHDRCKSUM;
2414 	else
2415 		mip->mi_cksum = HCKSUM_INET_FULL_V4 | HCKSUM_IPHDRCKSUM;
2416 
2417 	mip->mi_addr_length = ETHERADDRL;
2418 	bcopy(ether_brdcst, mip->mi_brdcst_addr, ETHERADDRL);
2419 	bcopy(bgep->curr_addr.addr, mip->mi_unicst_addr, ETHERADDRL);
2420 
2421 	MAC_STAT_MIB(mip->mi_stat);
2422 	mip->mi_stat[MAC_STAT_UNKNOWNS] = B_FALSE;
2423 	MAC_STAT_ETHER(mip->mi_stat);
2424 	mip->mi_stat[MAC_STAT_SQE_ERRORS] = B_FALSE;
2425 	mip->mi_stat[MAC_STAT_MACRCV_ERRORS] = B_FALSE;
2426 	if (!(bgep->chipid.flags & CHIP_FLAG_SERDES))
2427 		MAC_STAT_MII(mip->mi_stat);
2428 
2429 	macp->m_stat = bge_m_stat;
2430 	macp->m_stop = bge_m_stop;
2431 	macp->m_start = bge_m_start;
2432 	macp->m_unicst = bge_m_unicst;
2433 	macp->m_multicst = bge_m_multicst;
2434 	macp->m_promisc = bge_m_promisc;
2435 	macp->m_tx = bge_m_tx;
2436 	macp->m_resources = bge_m_resources;
2437 	macp->m_ioctl = bge_m_ioctl;
2438 
2439 	macp->m_dip = devinfo;
2440 	macp->m_ident = MAC_IDENT;
2441 
2442 	/*
2443 	 * Finally, we're ready to register ourselves with the MAC layer
2444 	 * interface; if this succeeds, we're all ready to start()
2445 	 */
2446 	if (mac_register(macp) != 0)
2447 		goto attach_fail;
2448 
2449 	cychand.cyh_func = bge_chip_cyclic;
2450 	cychand.cyh_arg = bgep;
2451 	cychand.cyh_level = CY_LOCK_LEVEL;
2452 	cyctime.cyt_when = 0;
2453 	cyctime.cyt_interval = BGE_CYCLIC_PERIOD;
2454 	mutex_enter(&cpu_lock);
2455 	bgep->cyclic_id = cyclic_add(&cychand, &cyctime);
2456 	mutex_exit(&cpu_lock);
2457 
2458 	bgep->progress |= PROGRESS_READY;
2459 	ASSERT(bgep->bge_guard == BGE_GUARD);
2460 	return (DDI_SUCCESS);
2461 
2462 attach_fail:
2463 #ifdef BGE_IPMI_ASF
2464 	bge_unattach(bgep, ASF_MODE_NONE);
2465 #else
2466 	bge_unattach(bgep);
2467 #endif
2468 	return (DDI_FAILURE);
2469 }
2470 
2471 /*
2472  *	bge_suspend() -- suspend transmit/receive for powerdown
2473  */
2474 static int
2475 bge_suspend(bge_t *bgep)
2476 {
2477 	/*
2478 	 * Stop processing and idle (powerdown) the PHY ...
2479 	 */
2480 	mutex_enter(bgep->genlock);
2481 #ifdef BGE_IPMI_ASF
2482 	/*
2483 	 * Power management hasn't been supported in BGE now. If you
2484 	 * want to implement it, please add the ASF/IPMI related
2485 	 * code here.
2486 	 */
2487 #endif
2488 	bge_stop(bgep);
2489 	if (bge_phys_idle(bgep) != DDI_SUCCESS) {
2490 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
2491 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
2492 		mutex_exit(bgep->genlock);
2493 		return (DDI_FAILURE);
2494 	}
2495 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
2496 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
2497 		mutex_exit(bgep->genlock);
2498 		return (DDI_FAILURE);
2499 	}
2500 	mutex_exit(bgep->genlock);
2501 
2502 	return (DDI_SUCCESS);
2503 }
2504 
2505 /*
2506  * detach(9E) -- Detach a device from the system
2507  */
2508 static int
2509 bge_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd)
2510 {
2511 	bge_t *bgep;
2512 #ifdef BGE_IPMI_ASF
2513 	uint_t asf_mode;
2514 	asf_mode = ASF_MODE_NONE;
2515 #endif
2516 
2517 	BGE_GTRACE(("bge_detach($%p, %d)", (void *)devinfo, cmd));
2518 
2519 	bgep = ddi_get_driver_private(devinfo);
2520 
2521 	switch (cmd) {
2522 	default:
2523 		return (DDI_FAILURE);
2524 
2525 	case DDI_SUSPEND:
2526 		return (bge_suspend(bgep));
2527 
2528 	case DDI_DETACH:
2529 		break;
2530 	}
2531 
2532 #ifdef BGE_IPMI_ASF
2533 	mutex_enter(bgep->genlock);
2534 	if (bgep->asf_enabled && (bgep->asf_status == ASF_STAT_RUN)) {
2535 
2536 		bge_asf_update_status(bgep);
2537 		bge_asf_stop_timer(bgep);
2538 		bgep->asf_status = ASF_STAT_STOP;
2539 
2540 		bge_asf_pre_reset_operations(bgep, BGE_SHUTDOWN_RESET);
2541 
2542 		if (bgep->asf_pseudostop) {
2543 			bgep->link_up_msg = bgep->link_down_msg = " (stopped)";
2544 			bge_chip_stop(bgep, B_FALSE);
2545 			bgep->bge_mac_state = BGE_MAC_STOPPED;
2546 			bgep->asf_pseudostop = B_FALSE;
2547 		}
2548 
2549 		asf_mode = ASF_MODE_POST_SHUTDOWN;
2550 
2551 		if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK)
2552 			ddi_fm_service_impact(bgep->devinfo,
2553 			    DDI_SERVICE_UNAFFECTED);
2554 		if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK)
2555 			ddi_fm_service_impact(bgep->devinfo,
2556 			    DDI_SERVICE_UNAFFECTED);
2557 	}
2558 	mutex_exit(bgep->genlock);
2559 #endif
2560 
2561 	/*
2562 	 * Unregister from the GLD subsystem.  This can fail, in
2563 	 * particular if there are DLPI style-2 streams still open -
2564 	 * in which case we just return failure without shutting
2565 	 * down chip operations.
2566 	 */
2567 	if (mac_unregister(bgep->macp) != 0)
2568 		return (DDI_FAILURE);
2569 
2570 	/*
2571 	 * All activity stopped, so we can clean up & exit
2572 	 */
2573 #ifdef BGE_IPMI_ASF
2574 	bge_unattach(bgep, asf_mode);
2575 #else
2576 	bge_unattach(bgep);
2577 #endif
2578 	return (DDI_SUCCESS);
2579 }
2580 
2581 
2582 /*
2583  * ========== Module Loading Data & Entry Points ==========
2584  */
2585 
2586 #undef	BGE_DBG
2587 #define	BGE_DBG		BGE_DBG_INIT	/* debug flag for this code	*/
2588 
2589 DDI_DEFINE_STREAM_OPS(bge_dev_ops, nulldev, nulldev, bge_attach, bge_detach,
2590     nodev, NULL, D_MP, NULL);
2591 
2592 static struct modldrv bge_modldrv = {
2593 	&mod_driverops,		/* Type of module.  This one is a driver */
2594 	bge_ident,		/* short description */
2595 	&bge_dev_ops		/* driver specific ops */
2596 };
2597 
2598 static struct modlinkage modlinkage = {
2599 	MODREV_1, (void *)&bge_modldrv, NULL
2600 };
2601 
2602 
2603 int
2604 _info(struct modinfo *modinfop)
2605 {
2606 	return (mod_info(&modlinkage, modinfop));
2607 }
2608 
2609 int
2610 _init(void)
2611 {
2612 	int status;
2613 
2614 	mac_init_ops(&bge_dev_ops, "bge");
2615 	status = mod_install(&modlinkage);
2616 	if (status == DDI_SUCCESS)
2617 		mutex_init(bge_log_mutex, NULL, MUTEX_DRIVER, NULL);
2618 	else
2619 		mac_fini_ops(&bge_dev_ops);
2620 	return (status);
2621 }
2622 
2623 int
2624 _fini(void)
2625 {
2626 	int status;
2627 
2628 	status = mod_remove(&modlinkage);
2629 	if (status == DDI_SUCCESS) {
2630 		mac_fini_ops(&bge_dev_ops);
2631 		mutex_destroy(bge_log_mutex);
2632 	}
2633 	return (status);
2634 }
2635 
2636 
2637 /*
2638  * bge_add_intrs:
2639  *
2640  * Register FIXED or MSI interrupts.
2641  */
2642 static int
2643 bge_add_intrs(bge_t *bgep, int	intr_type)
2644 {
2645 	dev_info_t	*dip = bgep->devinfo;
2646 	int		avail, actual, intr_size, count = 0;
2647 	int		i, flag, ret;
2648 
2649 	bge_log(bgep, "bge_add_intrs: interrupt type 0x%x\n", intr_type);
2650 
2651 	/* Get number of interrupts */
2652 	ret = ddi_intr_get_nintrs(dip, intr_type, &count);
2653 	if ((ret != DDI_SUCCESS) || (count == 0)) {
2654 		bge_error(bgep, "ddi_intr_get_nintrs() failure, ret: %d, "
2655 		    "count: %d", ret, count);
2656 
2657 		return (DDI_FAILURE);
2658 	}
2659 
2660 	/* Get number of available interrupts */
2661 	ret = ddi_intr_get_navail(dip, intr_type, &avail);
2662 	if ((ret != DDI_SUCCESS) || (avail == 0)) {
2663 		bge_error(bgep, "ddi_intr_get_navail() failure, "
2664 		    "ret: %d, avail: %d\n", ret, avail);
2665 
2666 		return (DDI_FAILURE);
2667 	}
2668 
2669 	if (avail < count) {
2670 		bge_log(bgep, "nitrs() returned %d, navail returned %d\n",
2671 		    count, avail);
2672 	}
2673 
2674 	/*
2675 	 * BGE hardware generates only single MSI even though it claims
2676 	 * to support multiple MSIs. So, hard code MSI count value to 1.
2677 	 */
2678 	if (intr_type == DDI_INTR_TYPE_MSI) {
2679 		count = 1;
2680 		flag = DDI_INTR_ALLOC_STRICT;
2681 	} else {
2682 		flag = DDI_INTR_ALLOC_NORMAL;
2683 	}
2684 
2685 	/* Allocate an array of interrupt handles */
2686 	intr_size = count * sizeof (ddi_intr_handle_t);
2687 	bgep->htable = kmem_alloc(intr_size, KM_SLEEP);
2688 
2689 	/* Call ddi_intr_alloc() */
2690 	ret = ddi_intr_alloc(dip, bgep->htable, intr_type, 0,
2691 	    count, &actual, flag);
2692 
2693 	if ((ret != DDI_SUCCESS) || (actual == 0)) {
2694 		bge_error(bgep, "ddi_intr_alloc() failed %d\n", ret);
2695 
2696 		kmem_free(bgep->htable, intr_size);
2697 		return (DDI_FAILURE);
2698 	}
2699 
2700 	if (actual < count) {
2701 		bge_log(bgep, "Requested: %d, Received: %d\n", count, actual);
2702 	}
2703 
2704 	bgep->intr_cnt = actual;
2705 
2706 	/*
2707 	 * Get priority for first msi, assume remaining are all the same
2708 	 */
2709 	if ((ret = ddi_intr_get_pri(bgep->htable[0], &bgep->intr_pri)) !=
2710 	    DDI_SUCCESS) {
2711 		bge_error(bgep, "ddi_intr_get_pri() failed %d\n", ret);
2712 
2713 		/* Free already allocated intr */
2714 		for (i = 0; i < actual; i++) {
2715 			(void) ddi_intr_free(bgep->htable[i]);
2716 		}
2717 
2718 		kmem_free(bgep->htable, intr_size);
2719 		return (DDI_FAILURE);
2720 	}
2721 
2722 	/* Call ddi_intr_add_handler() */
2723 	for (i = 0; i < actual; i++) {
2724 		if ((ret = ddi_intr_add_handler(bgep->htable[i], bge_intr,
2725 		    (caddr_t)bgep, (caddr_t)(uintptr_t)i)) != DDI_SUCCESS) {
2726 			bge_error(bgep, "ddi_intr_add_handler() "
2727 			    "failed %d\n", ret);
2728 
2729 			/* Free already allocated intr */
2730 			for (i = 0; i < actual; i++) {
2731 				(void) ddi_intr_free(bgep->htable[i]);
2732 			}
2733 
2734 			kmem_free(bgep->htable, intr_size);
2735 			return (DDI_FAILURE);
2736 		}
2737 	}
2738 
2739 	if ((ret = ddi_intr_get_cap(bgep->htable[0], &bgep->intr_cap))
2740 		!= DDI_SUCCESS) {
2741 		bge_error(bgep, "ddi_intr_get_cap() failed %d\n", ret);
2742 
2743 		for (i = 0; i < actual; i++) {
2744 			(void) ddi_intr_remove_handler(bgep->htable[i]);
2745 			(void) ddi_intr_free(bgep->htable[i]);
2746 		}
2747 
2748 		kmem_free(bgep->htable, intr_size);
2749 		return (DDI_FAILURE);
2750 	}
2751 
2752 	return (DDI_SUCCESS);
2753 }
2754 
2755 /*
2756  * bge_rem_intrs:
2757  *
2758  * Unregister FIXED or MSI interrupts
2759  */
2760 static void
2761 bge_rem_intrs(bge_t *bgep)
2762 {
2763 	int	i;
2764 
2765 	bge_log(bgep, "bge_rem_intrs\n");
2766 
2767 	/* Call ddi_intr_remove_handler() */
2768 	for (i = 0; i < bgep->intr_cnt; i++) {
2769 		(void) ddi_intr_remove_handler(bgep->htable[i]);
2770 		(void) ddi_intr_free(bgep->htable[i]);
2771 	}
2772 
2773 	kmem_free(bgep->htable, bgep->intr_cnt * sizeof (ddi_intr_handle_t));
2774 }
2775 
2776 
2777 void
2778 bge_intr_enable(bge_t *bgep)
2779 {
2780 	int i;
2781 
2782 	if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) {
2783 		/* Call ddi_intr_block_enable() for MSI interrupts */
2784 		(void) ddi_intr_block_enable(bgep->htable, bgep->intr_cnt);
2785 	} else {
2786 		/* Call ddi_intr_enable for MSI or FIXED interrupts */
2787 		for (i = 0; i < bgep->intr_cnt; i++) {
2788 			(void) ddi_intr_enable(bgep->htable[i]);
2789 		}
2790 	}
2791 }
2792 
2793 
2794 void
2795 bge_intr_disable(bge_t *bgep)
2796 {
2797 	int i;
2798 
2799 	if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) {
2800 		/* Call ddi_intr_block_disable() */
2801 		(void) ddi_intr_block_disable(bgep->htable, bgep->intr_cnt);
2802 	} else {
2803 		for (i = 0; i < bgep->intr_cnt; i++) {
2804 			(void) ddi_intr_disable(bgep->htable[i]);
2805 		}
2806 	}
2807 }
2808