1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21/* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26#pragma dictionary "PCIEX" 27 28#include <fm/topo_hc.h> 29 30/* 31 * FIT rates - assume leaf devices are somewhat less reliable than 32 * root complexes, switches and bridges 33 */ 34#define PCIEX_RC_FIT 500 35#define PCIEX_SW_FIT 500 36#define PCIEX_BDG_FIT 500 37#define PCIEX_DEV_FIT 1000 38#define PCIEX_RC_INV_FIT 500 39#define PCIEX_DEV_INV_FIT 1000 40#define PCIEX_RC_NR_FIT 500 41#define PCIEX_SW_NR_FIT 500 42#define PCIEX_BDG_NR_FIT 500 43#define PCIEX_DEV_NR_FIT 1000 44#define PCIEX_BUS_FIT 500 45#define PCIEX_BUS_NR_FIT 500 46 47/* 48 * SERD parameters. 49 * 50 * PCI Express correctable link errors are automatically handled by the 51 * hardware, so have relatively little impact and we can allow quite a 52 * high frequency. We will also be quite conservative about nonfatal internal 53 * errors reported by the driver. 54 * 55 * Nonfatal dpe errors (ptlp/ecrc errors) have to be recovered by the hardened 56 * driver which may cause intermittant performance/responsiveness problems, so 57 * we have tighter serd parameters for these. These are most likely errors in 58 * buffers/caches within devices and bridges, so use similar rates to cpu 59 * data cache parity errors. 60 */ 61#define CORRLINK_COUNT 6 62#define CORRLINK_TIME 2h 63#define BTLP_COUNT 6 64#define BTLP_TIME 2h 65#define BDLLP_COUNT 6 66#define BDLLP_TIME 2h 67#define RTO_COUNT 6 68#define RTO_TIME 2h 69#define RNR_COUNT 6 70#define RNR_TIME 2h 71#define RE_COUNT 6 72#define RE_TIME 2h 73#define NONFATAL_DPE_COUNT 3 74#define NONFATAL_DPE_TIME 168h 75 76/* 77 * if the source-id payload is valid, then check it matches 78 */ 79#define SOURCE_ID_MATCHES_BDF \ 80 (!payloadprop_defined("source-valid") || \ 81 payloadprop("source-valid") == 0 || \ 82 payloadprop("source-id") == ((b << 8) | (d << 3) | f)) 83 84#define SOURCE_ID_MATCHES_OWN_BDF \ 85 (payloadprop_defined("source-valid") && \ 86 payloadprop("source-valid") == 1 && \ 87 payloadprop("source-id") == (confprop(pciexrc, TOPO_PCI_BDF) + 0)) 88 89/* 90 * Other useful macros. These use the EXCAP property (PCI Express Capabilities 91 * register) to find the type for PCI Express devices, and the CLASS-CODE 92 * property (PCI Class Code register) for to find the type of PCI devices behind 93 * a PCI Express-PCI bridge - note that 60400 and 60401 are defined as PCI-PCI 94 * bridges, everything else is consider a PCI leaf device. 95 */ 96#define PCIEXFN pciexbus/pciexdev/pciexfn 97#define PCIEXFNHZ pciexbus<>/pciexdev<>/pciexfn<> 98#define PCIEXFN1 pciexbus[b]/pciexdev[d]/pciexfn[f] 99#define PCIFN pcibus/pcidev/pcifn 100#define PCIFNHZ pcibus<>/pcidev<>/pcifn<> 101#define PCIFN1 pcibus[b]/pcidev[d]/pcifn[f] 102#define IS_LF(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexdev") 103#define IS_BG(f) (confprop(f, TOPO_PCI_EXCAP) == "pcibus") 104#define IS_SD(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexswd") 105#define IS_SU(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexswu") 106#define IS_PCI_LF(f) (confprop_defined(f, TOPO_PCI_CLASS) && \ 107 confprop(f, TOPO_PCI_CLASS) != "60400" && \ 108 confprop(f, TOPO_PCI_CLASS) != "60401") 109 110/* 111 * define faults 112 */ 113event fault.io.pciex.fw_corrupt@PCIEXFN, FITrate=PCIEX_DEV_FIT, retire=0; 114event fault.io.pciex.fw_mismatch@PCIEXFN, FITrate=PCIEX_DEV_FIT, retire=0; 115 116event fault.io.pciex.device-interr@PCIEXFN, FITrate=PCIEX_DEV_FIT; 117 118event fault.io.pciex.device-interr-deg@PCIEXFN, FITrate=PCIEX_DEV_FIT, retire=0; 119 120engine serd.io.pciex.flt-nf@PCIEXFN, N=NONFATAL_DPE_COUNT, T=NONFATAL_DPE_TIME; 121event fault.io.pciex.device-interr-unaf@PCIEXFN, FITrate=PCIEX_DEV_FIT, 122 engine=serd.io.pciex.flt-nf@PCIEXFN; 123 124engine serd.io.device.nonfatal@PCIEXFN, N=CORRLINK_COUNT, T=CORRLINK_TIME; 125event fault.io.pciex.device-interr-corr@PCIEXFN, FITrate=PCIEX_DEV_FIT, 126 engine=serd.io.device.nonfatal@PCIEXFN; 127engine serd.io.device.nonfatal@PCIEXFN/PCIEXFN, 128 N=CORRLINK_COUNT, T=CORRLINK_TIME; 129event fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN, FITrate=PCIEX_DEV_FIT, 130 engine=serd.io.device.nonfatal@PCIEXFN/PCIEXFN; 131engine serd.io.device.nonfatal@pciexrc/PCIEXFN, 132 N=CORRLINK_COUNT, T=CORRLINK_TIME; 133event fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN, FITrate=PCIEX_DEV_FIT, 134 engine=serd.io.device.nonfatal@pciexrc/PCIEXFN; 135 136event fault.io.pciex.device-interr@pciexrc, FITrate=PCIEX_RC_FIT; 137 138event fault.io.pciex.device-interr-deg@pciexrc, FITrate=PCIEX_RC_FIT, retire=0; 139 140engine serd.io.pciex.flt-nf@pciexrc, N=NONFATAL_DPE_COUNT, T=NONFATAL_DPE_TIME; 141event fault.io.pciex.device-interr-unaf@pciexrc, FITrate=PCIEX_RC_FIT, 142 engine=serd.io.pciex.flt-nf@pciexrc; 143 144engine serd.io.device.nonfatal@pciexrc, N=CORRLINK_COUNT, T=CORRLINK_TIME; 145event fault.io.pciex.device-interr-corr@pciexrc, FITrate=PCIEX_RC_FIT, 146 engine=serd.io.device.nonfatal@pciexrc; 147 148event fault.io.pciex.device-invreq@PCIEXFN, FITrate=PCIEX_DEV_INV_FIT; 149 150event fault.io.pciex.device-invreq@pciexrc, FITrate=PCIEX_RC_FIT; 151 152event fault.io.pciex.device-noresp@PCIEXFN, FITrate=PCIEX_DEV_NR_FIT; 153 154event fault.io.pciex.device-noresp@pciexrc, FITrate=PCIEX_RC_NR_FIT; 155 156event fault.io.pciex.bus-noresp@PCIEXFN, FITrate=PCIEX_BUS_NR_FIT; 157 158event fault.io.pciex.bus-linkerr@PCIEXFN, FITrate=PCIEX_BUS_FIT; 159 160engine serd.io.pciex.corrlink-bus@pciexrc/PCIEXFN, 161 N=CORRLINK_COUNT, T=CORRLINK_TIME; 162event fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN, FITrate=PCIEX_BUS_FIT, 163 engine=serd.io.pciex.corrlink-bus@pciexrc/PCIEXFN; 164engine serd.io.pciex.corrlink-bus@PCIEXFN/PCIEXFN, 165 N=CORRLINK_COUNT, T=CORRLINK_TIME; 166event fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN, FITrate=PCIEX_BUS_FIT, 167 engine=serd.io.pciex.corrlink-bus@PCIEXFN/PCIEXFN; 168 169/* 170 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 171 * Handling of leaf driver detected internal errors. Use serd engine if 172 * no service impact - otherwise fail immediately 173 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 174 */ 175event ereport.io.device.inval_state@PCIEXFN{within(5s)}; 176event ereport.io.device.no_response@PCIEXFN{within(5s)}; 177event ereport.io.device.stall@PCIEXFN{within(5s)}; 178event ereport.io.device.badint_limit@PCIEXFN{within(5s)}; 179event ereport.io.device.intern_corr@PCIEXFN{within(5s)}; 180event ereport.io.device.intern_uncorr@PCIEXFN{within(5s)}; 181event ereport.io.service.lost@PCIEXFN{within(5s)}; 182event ereport.io.service.degraded@PCIEXFN{within(5s)}; 183event ereport.io.service.unaffected@PCIEXFN{within(5s)}; 184event ereport.io.service.restored@PCIEXFN{within(30s)}; 185event ereport.io.service.lost@PCIFN{within(5s)}; 186event ereport.io.service.degraded@PCIFN{within(5s)}; 187event ereport.io.service.unaffected@PCIFN{within(5s)}; 188 189event error.io.pciex.noimpact-d@PCIEXFN; 190event error.io.pciex.noimpact-d@PCIEXFN/PCIEXFN; 191event error.io.pciex.noimpact-d@PCIEXFN/PCIFN; 192event error.io.pciex.noimpact-d@PCIFN/PCIFN; 193event error.io.pciex.noimpact-d@PCIFN; 194event error.io.pciex.degraded-d@PCIEXFN; 195event error.io.pciex.degraded-d@PCIEXFN/PCIEXFN; 196event error.io.pciex.degraded-d@PCIEXFN/PCIFN; 197event error.io.pciex.degraded-d@PCIFN/PCIFN; 198event error.io.pciex.degraded-d@PCIFN; 199event error.io.pciex.lost-d@PCIEXFN; 200event error.io.pciex.lost-d@PCIEXFN/PCIEXFN; 201event error.io.pciex.lost-d@PCIEXFN/PCIFN; 202event error.io.pciex.lost-d@PCIFN/PCIFN; 203event error.io.pciex.lost-d@PCIFN; 204event error.io.service.restored@PCIEXFN; 205event error.io.service.restored@PCIFN; 206event error.io.device.nf-device@PCIEXFN; 207event error.io.device.deg-device@PCIEXFN; 208event error.io.device.f-device@PCIEXFN; 209 210prop error.io.device.f-device@PCIEXFN (1)-> 211 ereport.io.device.inval_state@PCIEXFN, 212 ereport.io.device.no_response@PCIEXFN, 213 ereport.io.device.stall@PCIEXFN, 214 ereport.io.device.badint_limit@PCIEXFN, 215 ereport.io.device.intern_corr@PCIEXFN, 216 ereport.io.device.intern_uncorr@PCIEXFN; 217 218prop error.io.device.f-device@PCIEXFN (0)-> 219 error.io.pciex.lost-d@PCIEXFN; 220 221prop error.io.device.deg-device@PCIEXFN (1)-> 222 ereport.io.device.inval_state@PCIEXFN, 223 ereport.io.device.no_response@PCIEXFN, 224 ereport.io.device.stall@PCIEXFN, 225 ereport.io.device.badint_limit@PCIEXFN, 226 ereport.io.device.intern_corr@PCIEXFN, 227 ereport.io.device.intern_uncorr@PCIEXFN; 228 229prop error.io.device.deg-device@PCIEXFN (1)-> 230 error.io.pciex.degraded-d@PCIEXFN; 231 232prop error.io.device.nf-device@PCIEXFN (1)-> 233 ereport.io.device.inval_state@PCIEXFN, 234 ereport.io.device.no_response@PCIEXFN, 235 ereport.io.device.stall@PCIEXFN, 236 ereport.io.device.badint_limit@PCIEXFN, 237 ereport.io.device.intern_corr@PCIEXFN, 238 ereport.io.device.intern_uncorr@PCIEXFN; 239 240prop error.io.device.nf-device@PCIEXFN (1)-> 241 error.io.pciex.noimpact-d@PCIEXFN; 242 243/* 244 * handling of service impact ereports. 245 */ 246prop error.io.pciex.lost-d@PCIEXFN (1)-> 247 ereport.io.service.lost@PCIEXFN, 248 error.io.pciex.lost-d@PCIEXFN/PCIEXFNHZ, 249 error.io.pciex.lost-d@PCIEXFN/PCIFNHZ; 250 251prop error.io.pciex.lost-d@PCIEXFN (0)-> 252 ereport.io.service.unaffected@PCIEXFN, 253 ereport.io.service.degraded@PCIEXFN; 254 255prop error.io.pciex.lost-d@PCIFN (1)-> 256 ereport.io.service.lost@PCIFN, 257 error.io.pciex.lost-d@PCIFN/PCIFNHZ; 258 259prop error.io.pciex.lost-d@PCIFN (0)-> 260 ereport.io.service.unaffected@PCIFN, 261 ereport.io.service.degraded@PCIFN; 262 263prop error.io.pciex.degraded-d@PCIEXFN (1)-> 264 ereport.io.service.degraded@PCIEXFN, 265 error.io.pciex.degraded-d@PCIEXFN/PCIEXFNHZ, 266 error.io.pciex.degraded-d@PCIEXFN/PCIFNHZ; 267 268prop error.io.pciex.degraded-d@PCIEXFN (0)-> 269 ereport.io.service.unaffected@PCIEXFN; 270 271prop error.io.pciex.degraded-d@PCIFN (1)-> 272 ereport.io.service.degraded@PCIFN, 273 error.io.pciex.degraded-d@PCIFN/PCIFNHZ; 274 275prop error.io.pciex.degraded-d@PCIFN (0)-> 276 ereport.io.service.unaffected@PCIFN; 277 278prop error.io.pciex.noimpact-d@PCIEXFN (1)-> 279 ereport.io.service.unaffected@PCIEXFN, 280 error.io.service.restored@PCIEXFN, 281 error.io.pciex.noimpact-d@PCIEXFN/PCIEXFNHZ, 282 error.io.pciex.noimpact-d@PCIEXFN/PCIFNHZ; 283 284prop error.io.pciex.noimpact-d@PCIFN (1)-> 285 ereport.io.service.unaffected@PCIFN, 286 error.io.service.restored@PCIFN, 287 error.io.pciex.noimpact-d@PCIFN/PCIFNHZ; 288 289prop error.io.service.restored@PCIEXFN (1)-> 290 ereport.io.service.lost@PCIEXFN, 291 ereport.io.service.degraded@PCIEXFN; 292 293prop error.io.service.restored@PCIEXFN (1)-> 294 ereport.io.service.restored@PCIEXFN; 295 296/* 297 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 298 * A faulty PCI Express hostbridge (root complex) may cause: 299 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 300 * - nr-d: the device not to respond to a valid upstream request 301 * - ca-d: the device to completer abort a valid upstream request 302 * - mtlp-d: a malformed tlp to be transmitted downstream 303 * - badreq-d: a bad downstream request - not CRC error (may cause 304 * completer to respond with ur or ca) 305 * - ecrcreq-d: TLP with end-to-end CRC error transmitted downstream 306 * - ecrccomp-d: TLP with end-to-end CRC error transmitted downstream 307 * - poisreq-d: poisoned request transmitted downstream 308 * - poiscomp-d: poisoned completion transmitted downstream 309 * - corrlink: correctable link or physical level error 310 * - fatlink: fatal link or physical level error 311 */ 312event error.io.pciex.nr-d@pciexrc/PCIEXFN; 313event error.io.pciex.ca-d@pciexrc/PCIEXFN; 314event error.io.pciex.mtlp-d@pciexrc/PCIEXFN; 315event error.io.pciex.fatlink@pciexrc/PCIEXFN; 316event error.io.pciex.badreq-d@pciexrc/PCIEXFN; 317event error.io.pciex.nf-poisecrc-d@pciexrc/PCIEXFN; 318event error.io.pciex.f-poisecrc-d@pciexrc/PCIEXFN; 319event error.io.pciex.deg-poisecrc-d@pciexrc/PCIEXFN; 320event ereport.io.pciex.dl.btlp@pciexrc{within(5s)}; 321event ereport.io.pciex.dl.bdllp@pciexrc{within(5s)}; 322event ereport.io.pciex.dl.rto@pciexrc{within(5s)}; 323event ereport.io.pciex.dl.rnr@pciexrc{within(5s)}; 324event ereport.io.pciex.pl.re@pciexrc{within(5s)}; 325event ereport.io.pciex.dl.btlp@pciexrc/PCIEXFN{within(5s)}; 326event ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFN{within(5s)}; 327event ereport.io.pciex.dl.rto@pciexrc/PCIEXFN{within(5s)}; 328event ereport.io.pciex.dl.rnr@pciexrc/PCIEXFN{within(5s)}; 329event ereport.io.pciex.pl.re@pciexrc/PCIEXFN{within(5s)}; 330 331prop fault.io.pciex.device-noresp@pciexrc (1)-> 332 error.io.pciex.nr-d@pciexrc/PCIEXFNHZ; 333 334prop fault.io.pciex.device-invreq@pciexrc (1)-> 335 error.io.pciex.badreq-d@pciexrc/PCIEXFNHZ; 336 337prop fault.io.pciex.device-interr-corr@pciexrc { 338 payloadprop_defined("detector") && setserdsuffix("_btlp") && 339 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 340 ereport.io.pciex.dl.btlp@pciexrc, 341 ereport.io.pciex.dl.btlp@pciexrc/PCIEXFNHZ; 342 343prop fault.io.pciex.device-interr-corr@pciexrc { 344 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 345 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 346 ereport.io.pciex.dl.bdllp@pciexrc, 347 ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFNHZ; 348 349prop fault.io.pciex.device-interr-corr@pciexrc { 350 payloadprop_defined("detector") && setserdsuffix("_rto") && 351 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 352 ereport.io.pciex.dl.rto@pciexrc, 353 ereport.io.pciex.dl.rto@pciexrc/PCIEXFNHZ; 354 355prop fault.io.pciex.device-interr-corr@pciexrc { 356 payloadprop_defined("detector") && setserdsuffix("_rnr") && 357 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 358 ereport.io.pciex.dl.rnr@pciexrc, 359 ereport.io.pciex.dl.rnr@pciexrc/PCIEXFNHZ; 360 361prop fault.io.pciex.device-interr-corr@pciexrc { 362 payloadprop_defined("detector") && setserdsuffix("_re") && 363 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 364 ereport.io.pciex.pl.re@pciexrc, 365 ereport.io.pciex.pl.re@pciexrc/PCIEXFNHZ; 366 367prop fault.io.pciex.device-interr-unaf@pciexrc (1)-> 368 error.io.pciex.nf-poisecrc-d@pciexrc/PCIEXFNHZ; 369 370prop fault.io.pciex.device-interr-deg@pciexrc (1)-> 371 error.io.pciex.deg-poisecrc-d@pciexrc/PCIEXFNHZ; 372 373prop fault.io.pciex.device-interr@pciexrc (1)-> 374 error.io.pciex.f-poisecrc-d@pciexrc/PCIEXFNHZ, 375 error.io.pciex.ca-d@pciexrc/PCIEXFNHZ, 376 error.io.pciex.mtlp-d@pciexrc/PCIEXFNHZ, 377 error.io.pciex.fatlink@pciexrc/PCIEXFNHZ; 378 379/* 380 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 381 * A faulty PCI Express leaf device or upstream switch port may cause: 382 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 383 * - flt-nr-u: the device not to respond to a valid downstream request 384 * - flt-ca-u: the device to completer abort a valid downstream request 385 * - flt-badreq-u: a bad upstream request - not CRC error (may cause 386 * completer to respond with ur or ca) - leaf only 387 * - flt-mtlp-u: a malformed tlp transmitted upstream - leaf only 388 * - flt-ecrcreq-u: request with end-to-end CRC error transmitted upstream 389 * - flt-ecrccomp-u: compl with end-to-end CRC error transmitted upstream 390 * - flt-poisreq-u: poisoned request transmitted upstream 391 * - flt-poiscomp-u: poisoned completion transmitted upstream 392 * - device: internal error reported by leaf device 393 * - corrlink: correctable link or physical level error 394 * - fatlink: fatal link or physical level error 395 */ 396 397event error.io.pciex.flt-nr-u@PCIEXFN; 398event error.io.pciex.flt-ca-u@PCIEXFN; 399event error.io.pciex.flt-mtlp-u@PCIEXFN; 400event error.io.pciex.fatlink@PCIEXFN; 401event error.io.pciex.flt-badreq-u@PCIEXFN; 402event error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 403event error.io.pciex.flt-f-poisecrc-u@PCIEXFN; 404event error.io.pciex.flt-deg-poisecrc-u@PCIEXFN; 405event ereport.io.pciex.dl.btlp@PCIEXFN{within(5s)}; 406event ereport.io.pciex.dl.bdllp@PCIEXFN{within(5s)}; 407event ereport.io.pciex.dl.rto@PCIEXFN{within(5s)}; 408event ereport.io.pciex.dl.rnr@PCIEXFN{within(5s)}; 409event ereport.io.pciex.pl.re@PCIEXFN{within(5s)}; 410event ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFN{within(5s)}; 411event ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFN{within(5s)}; 412event ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFN{within(5s)}; 413event ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFN{within(5s)}; 414event ereport.io.pciex.pl.re@PCIEXFN/PCIEXFN{within(5s)}; 415event ereport.io.device.fw_corrupt@PCIEXFN{within(5s)}; 416event ereport.io.device.fw_mismatch@PCIEXFN{within(5s)}; 417 418prop fault.io.pciex.device-noresp@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 419 error.io.pciex.flt-nr-u@PCIEXFN; 420 421prop fault.io.pciex.device-noresp@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 422 error.io.pciex.flt-nr-u@PCIEXFN; 423 424prop fault.io.pciex.device-invreq@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 425 error.io.pciex.flt-badreq-u@PCIEXFN; 426 427prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 428 payloadprop_defined("detector") && setserdsuffix("_btlp") && 429 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 430 ereport.io.pciex.dl.btlp@pciexrc, 431 ereport.io.pciex.dl.btlp@pciexrc/PCIEXFNHZ; 432 433prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 434 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 435 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 436 ereport.io.pciex.dl.bdllp@pciexrc, 437 ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFNHZ; 438 439prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 440 payloadprop_defined("detector") && setserdsuffix("_rto") && 441 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 442 ereport.io.pciex.dl.rto@pciexrc, 443 ereport.io.pciex.dl.rto@pciexrc/PCIEXFNHZ; 444 445prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 446 payloadprop_defined("detector") && setserdsuffix("_rnr") && 447 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 448 ereport.io.pciex.dl.rnr@pciexrc, 449 ereport.io.pciex.dl.rnr@pciexrc/PCIEXFNHZ; 450 451prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 452 payloadprop_defined("detector") && setserdsuffix("_re") && 453 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 454 ereport.io.pciex.pl.re@pciexrc, 455 ereport.io.pciex.pl.re@pciexrc/PCIEXFNHZ; 456 457prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 458 !IS_SD(PCIEXFN/PCIEXFN) && 459 payloadprop_defined("detector") && setserdsuffix("_btlp") && 460 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 461 ereport.io.pciex.dl.btlp@PCIEXFN, 462 ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFNHZ; 463 464prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 465 !IS_SD(PCIEXFN/PCIEXFN) && 466 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 467 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 468 ereport.io.pciex.dl.bdllp@PCIEXFN, 469 ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFNHZ; 470 471prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 472 !IS_SD(PCIEXFN/PCIEXFN) && 473 payloadprop_defined("detector") && setserdsuffix("_rto") && 474 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 475 ereport.io.pciex.dl.rto@PCIEXFN, 476 ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFNHZ; 477 478prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 479 !IS_SD(PCIEXFN/PCIEXFN) && 480 payloadprop_defined("detector") && setserdsuffix("_rnr") && 481 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 482 ereport.io.pciex.dl.rnr@PCIEXFN, 483 ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFNHZ; 484 485prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 486 !IS_SD(PCIEXFN/PCIEXFN) && 487 payloadprop_defined("detector") && setserdsuffix("_re") && 488 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 489 ereport.io.pciex.pl.re@PCIEXFN, 490 ereport.io.pciex.pl.re@PCIEXFN/PCIEXFNHZ; 491 492prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 493 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 494 495prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 496 error.io.device.nf-device@PCIEXFN; 497 498prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 499 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 500 501prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 502 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN; 503 504prop fault.io.pciex.device-interr@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 505 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 506 error.io.pciex.flt-ca-u@PCIEXFN, 507 error.io.pciex.fatlink@PCIEXFN; 508 509prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 510 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN, 511 error.io.device.deg-device@PCIEXFN; 512 513prop fault.io.pciex.device-interr@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 514 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 515 error.io.device.f-device@PCIEXFN, 516 error.io.pciex.flt-ca-u@PCIEXFN, 517 error.io.pciex.flt-mtlp-u@PCIEXFN, 518 error.io.pciex.fatlink@PCIEXFN; 519 520prop fault.io.pciex.fw_corrupt@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 521 ereport.io.device.fw_corrupt@PCIEXFN; 522 523prop fault.io.pciex.fw_corrupt@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 524 ereport.io.service.lost@PCIEXFN, 525 ereport.io.service.degraded@PCIEXFN; 526 527prop fault.io.pciex.fw_mismatch@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 528 ereport.io.device.fw_mismatch@PCIEXFN; 529 530prop fault.io.pciex.fw_mismatch@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 531 ereport.io.service.lost@PCIEXFN, 532 ereport.io.service.degraded@PCIEXFN; 533 534/* 535 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 536 * A faulty PCI Express downstream switch port may cause 537 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 538 * - nr-d: the device not to respond to an upstream request 539 * - ca-d: the device to completer abort an upstream request 540 * - ecrcreq-d: TLP with end-to-end CRC error transmitted upstream 541 * - ecrccomp-d: TLP with end-to-end CRC error transmitted upstream 542 * - poisreq-d: poisoned request transmitted upstream 543 * - poiscomp-d: poisoned completion transmitted upstream 544 * - corrlink: correctable link or physical level error 545 * - fatlink: fatal link or physical level error 546 */ 547 548event error.io.pciex.nr-d@PCIEXFN/PCIEXFN; 549event error.io.pciex.ca-d@PCIEXFN/PCIEXFN; 550event error.io.pciex.fatlink@PCIEXFN/PCIEXFN; 551event error.io.pciex.nf-poisecrc-d@PCIEXFN/PCIEXFN; 552event error.io.pciex.f-poisecrc-d@PCIEXFN/PCIEXFN; 553event error.io.pciex.deg-poisecrc-d@PCIEXFN/PCIEXFN; 554 555prop fault.io.pciex.device-noresp@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 556 error.io.pciex.nr-d@PCIEXFN/PCIEXFNHZ; 557 558prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 559 payloadprop_defined("detector") && setserdsuffix("_btlp") && 560 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 561 ereport.io.pciex.dl.btlp@PCIEXFN, 562 ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFNHZ; 563 564prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 565 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 566 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 567 ereport.io.pciex.dl.bdllp@PCIEXFN, 568 ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFNHZ; 569 570prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 571 payloadprop_defined("detector") && setserdsuffix("_rto") && 572 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 573 ereport.io.pciex.dl.rto@PCIEXFN, 574 ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFNHZ; 575 576prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 577 payloadprop_defined("detector") && setserdsuffix("_rnr") && 578 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 579 ereport.io.pciex.dl.rnr@PCIEXFN, 580 ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFNHZ; 581 582prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 583 payloadprop_defined("detector") && setserdsuffix("_re") && 584 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 585 ereport.io.pciex.pl.re@PCIEXFN, 586 ereport.io.pciex.pl.re@PCIEXFN/PCIEXFNHZ; 587 588prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 589 error.io.pciex.nf-poisecrc-d@PCIEXFN/PCIEXFNHZ; 590 591prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 592 error.io.pciex.deg-poisecrc-d@PCIEXFN/PCIEXFNHZ; 593 594prop fault.io.pciex.device-interr@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 595 error.io.pciex.ca-d@PCIEXFN/PCIEXFNHZ, 596 error.io.pciex.f-poisecrc-d@PCIEXFN/PCIEXFNHZ, 597 error.io.pciex.fatlink@PCIEXFN/PCIEXFNHZ; 598 599/* 600 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 601 * A faulty PCIEX bus may cause: 602 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 603 * - flt-nr-u: a device to not respond because the link is down 604 * - nr-d: a device to not respond because the link is down 605 * - corrlink: correctable link or physical level error 606 * - fatlink: fatal link or physical level error 607 */ 608 609event error.io.pciex.nr-d@PCIEXFN; 610 611prop fault.io.pciex.bus-noresp@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 612 error.io.pciex.flt-nr-u@PCIEXFN, 613 error.io.pciex.nr-d@PCIEXFN; 614 615prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 616 !IS_SD(PCIEXFN/PCIEXFN) && 617 payloadprop_defined("detector") && setserdsuffix("_btlp") && 618 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 619 ereport.io.pciex.dl.btlp@PCIEXFN, 620 ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFNHZ; 621 622prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 623 !IS_SD(PCIEXFN/PCIEXFN) && 624 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 625 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 626 ereport.io.pciex.dl.bdllp@PCIEXFN, 627 ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFNHZ; 628 629prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 630 !IS_SD(PCIEXFN/PCIEXFN) && 631 payloadprop_defined("detector") && setserdsuffix("_rto") && 632 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 633 ereport.io.pciex.dl.rto@PCIEXFN, 634 ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFNHZ; 635 636prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 637 !IS_SD(PCIEXFN/PCIEXFN) && 638 payloadprop_defined("detector") && setserdsuffix("_rnr") && 639 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 640 ereport.io.pciex.dl.rnr@PCIEXFN, 641 ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFNHZ; 642 643prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 644 !IS_SD(PCIEXFN/PCIEXFN) && 645 payloadprop_defined("detector") && setserdsuffix("_re") && 646 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 647 ereport.io.pciex.pl.re@PCIEXFN, 648 ereport.io.pciex.pl.re@PCIEXFN/PCIEXFNHZ; 649 650prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 651 payloadprop_defined("detector") && setserdsuffix("_btlp") && 652 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 653 ereport.io.pciex.dl.btlp@pciexrc, 654 ereport.io.pciex.dl.btlp@pciexrc/PCIEXFNHZ; 655 656prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 657 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 658 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 659 ereport.io.pciex.dl.bdllp@pciexrc, 660 ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFNHZ; 661 662prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 663 payloadprop_defined("detector") && setserdsuffix("_rto") && 664 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 665 ereport.io.pciex.dl.rto@pciexrc, 666 ereport.io.pciex.dl.rto@pciexrc/PCIEXFNHZ; 667 668prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 669 payloadprop_defined("detector") && setserdsuffix("_rnr") && 670 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 671 ereport.io.pciex.dl.rnr@pciexrc, 672 ereport.io.pciex.dl.rnr@pciexrc/PCIEXFNHZ; 673 674prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 675 payloadprop_defined("detector") && setserdsuffix("_re") && 676 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 677 ereport.io.pciex.pl.re@pciexrc, 678 ereport.io.pciex.pl.re@pciexrc/PCIEXFNHZ; 679 680prop fault.io.pciex.bus-linkerr@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 681 error.io.pciex.fatlink@PCIEXFN; 682 683/* 684 * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 685 * A faulty pciex-pci bridge may cause 686 * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 687 * The following errors to propagate onto the PCI Express fabric 688 * - flt-nr-u: the device not to respond to a valid downstream request 689 * - flt-ca-u: the device to completer abort a valid downstream request 690 * - flt-ecrcreq-u: request with end-to-end CRC error transmitted upstream 691 * - flt-ecrccomp-u: compl with end-to-end CRC error transmitted upstream 692 * - flt-poisreq-u: poisoned request transmitted upstream 693 * - flt-poiscomp-u: poisoned completion transmitted upstream 694 * - corrlink: correctable link or physical level error upstream 695 * - fatlink: fatal link or physical level error upstream 696 * - sec-interr: internal error on pci express to pci bridge 697 * 698 * And the following errors to propagate onto the secondary pci or pci/x bus 699 * (these will be handled by code in the pci.esc file). 700 * - nr-pw-d: the device not to respond to a valid upstream request 701 * - nr-drw-d: the device not to respond to a valid upstream request 702 * - retry-to-d: failure to retry an downstream delayed request 703 * - ta-pw-d: the device responds with a ta to a valid upstream 704 * request 705 * - ta-drw-d: the device responds with a ta to a valid upstream 706 * request 707 * - ape-d: address/parity to get corrupted during downstream transmission. 708 * - dpe-d: data/parity to get corrupted during downstream transmission. 709 * - scpe-d: split completion to get corrupted during downstream transmission 710 */ 711 712event error.io.pci.ape-d@PCIEXFN/PCIFN; 713event error.io.pci.f-dpe-d@PCIEXFN/PCIFN; 714event error.io.pci.deg-dpe-d@PCIEXFN/PCIFN; 715event error.io.pci.nf-dpe-d@PCIEXFN/PCIFN; 716event error.io.pci.retry-to-d@PCIEXFN/PCIFN; 717event error.io.pci.nr-pw-d@PCIEXFN/PCIFN; 718event error.io.pci.nr-drw-d@PCIEXFN/PCIFN; 719event error.io.pci.ta-pw-d@PCIEXFN/PCIFN; 720event error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 721event error.io.pcix.scpe-d@PCIEXFN/PCIFN; 722event error.io.pciex.sec-interr@PCIEXFN; 723event ereport.io.pci.sec-sta@PCIEXFN{within(5s)}; 724 725prop fault.io.pciex.device-noresp@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 726 error.io.pciex.flt-nr-u@PCIEXFN, 727 error.io.pci.retry-to-d@PCIEXFN/PCIFNHZ, 728 error.io.pci.nr-pw-d@PCIEXFN/PCIFNHZ, 729 error.io.pci.nr-drw-d@PCIEXFN/PCIFNHZ; 730 731prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 732 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN, 733 error.io.pci.nf-dpe-d@PCIEXFN/PCIFNHZ; 734 735prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 736 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN, 737 error.io.pci.deg-dpe-d@PCIEXFN/PCIFNHZ; 738 739prop fault.io.pciex.device-interr@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 740 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 741 error.io.pciex.flt-ca-u@PCIEXFN, 742 error.io.pciex.flt-mtlp-u@PCIEXFN, 743 error.io.pciex.sec-interr@PCIEXFN, 744 error.io.pciex.fatlink@PCIEXFN, 745 error.io.pci.ta-pw-d@PCIEXFN/PCIFNHZ, 746 error.io.pci.ta-drw-d@PCIEXFN/PCIFNHZ, 747 error.io.pci.ape-d@PCIEXFN/PCIFNHZ, 748 error.io.pcix.scpe-d@PCIEXFN/PCIFNHZ, 749 error.io.pci.f-dpe-d@PCIEXFN/PCIFNHZ; 750 751prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 752 ereport.io.pci.sec-sta@PCIEXFN; 753 754prop fault.io.pciex.device-interr@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 755 ereport.io.pci.sec-sta@PCIEXFN; 756 757/* 758 * the following rules for ptlp and ecrc faults are split into fatal and 759 * nonfatal, depending on the service impact reported by the leaf driver 760 */ 761event error.io.pciex.nf-poisecrc-d@PCIEXFN; 762event error.io.pciex.deg-poisecrc-d@PCIEXFN; 763event error.io.pciex.f-poisecrc-d@PCIEXFN; 764event error.io.pciex.ecrcreq-d@PCIEXFN; 765event error.io.pciex.ecrccomp-d@PCIEXFN; 766event error.io.pciex.poisreq-d@PCIEXFN; 767event error.io.pciex.poiscomp-d@PCIEXFN; 768event error.io.pciex.flt-poisreq-u@PCIEXFN; 769event error.io.pciex.flt-poiscomp-u@PCIEXFN; 770event error.io.pciex.flt-ecrcreq-u@PCIEXFN; 771event error.io.pciex.flt-ecrccomp-u@PCIEXFN; 772 773prop error.io.pciex.nf-poisecrc-d@PCIEXFN (1)-> 774 error.io.pciex.ecrcreq-d@PCIEXFN, 775 error.io.pciex.ecrccomp-d@PCIEXFN, 776 error.io.pciex.poisreq-d@PCIEXFN, 777 error.io.pciex.poiscomp-d@PCIEXFN; 778 779prop error.io.pciex.nf-poisecrc-d@PCIEXFN (1)-> 780 error.io.pciex.noimpact-d@PCIEXFN; 781 782prop error.io.pciex.f-poisecrc-d@PCIEXFN (1)-> 783 error.io.pciex.ecrcreq-d@PCIEXFN, 784 error.io.pciex.ecrccomp-d@PCIEXFN, 785 error.io.pciex.poisreq-d@PCIEXFN, 786 error.io.pciex.poiscomp-d@PCIEXFN; 787 788prop error.io.pciex.f-poisecrc-d@PCIEXFN (0)-> 789 error.io.pciex.lost-d@PCIEXFN; 790 791prop error.io.pciex.deg-poisecrc-d@PCIEXFN (1)-> 792 error.io.pciex.ecrcreq-d@PCIEXFN, 793 error.io.pciex.ecrccomp-d@PCIEXFN, 794 error.io.pciex.poisreq-d@PCIEXFN, 795 error.io.pciex.poiscomp-d@PCIEXFN; 796 797prop error.io.pciex.deg-poisecrc-d@PCIEXFN (1)-> 798 error.io.pciex.degraded-d@PCIEXFN; 799 800prop error.io.pciex.flt-nf-poisecrc-u@PCIEXFN (1)-> 801 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 802 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 803 error.io.pciex.flt-poisreq-u@PCIEXFN, 804 error.io.pciex.flt-poiscomp-u@PCIEXFN; 805 806prop error.io.pciex.flt-nf-poisecrc-u@PCIEXFN (1)-> 807 error.io.pciex.noimpact-d@PCIEXFN; 808 809prop error.io.pciex.flt-deg-poisecrc-u@PCIEXFN (1)-> 810 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 811 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 812 error.io.pciex.flt-poisreq-u@PCIEXFN, 813 error.io.pciex.flt-poiscomp-u@PCIEXFN; 814 815prop error.io.pciex.flt-deg-poisecrc-u@PCIEXFN (1)-> 816 error.io.pciex.degraded-d@PCIEXFN; 817 818prop error.io.pciex.flt-f-poisecrc-u@PCIEXFN (1)-> 819 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 820 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 821 error.io.pciex.flt-poisreq-u@PCIEXFN, 822 error.io.pciex.flt-poiscomp-u@PCIEXFN; 823 824prop error.io.pciex.flt-f-poisecrc-u@PCIEXFN (0)-> 825 error.io.pciex.lost-d@PCIEXFN; 826 827/* 828 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 829 * declarations 830 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 831 */ 832event error.io.pciex.fatal@PCIEXFN; 833event error.io.pciex.nonfatal@PCIEXFN; 834event error.io.pciex.flt-ur-u@PCIEXFN; 835event error.io.pciex.mtlp-d@PCIEXFN; 836event error.io.pciex.sw-mtlp-d@PCIEXFN; 837event error.io.pciex.mtlp-d@PCIEXFN/PCIEXFN; 838event error.io.pciex.ca-d@PCIEXFN; 839event error.io.pciex.ca-fwd-d@PCIEXFN; 840event error.io.pciex.ca-fwd-d@PCIEXFN/PCIEXFN; 841event error.io.pciex.poisreq-fwd-d@PCIEXFN; 842event error.io.pciex.poisreq-fwd-d@pciexrc/PCIEXFN; 843event error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN; 844event error.io.pciex.poiscomp-fwd-d@PCIEXFN; 845event error.io.pciex.poiscomp-fwd-d@PCIEXFN/PCIEXFN; 846event error.io.pciex.ecrcreq-fwd-d@PCIEXFN/PCIEXFN; 847event error.io.pciex.ecrccomp-fwd-d@PCIEXFN/PCIEXFN; 848event error.io.pciex.ecrcreq-fwd-d@PCIEXFN; 849event error.io.pciex.ecrccomp-fwd-d@PCIEXFN; 850event error.io.pciex.source-ecrcreq-u@PCIEXFN; 851event error.io.pciex.source-ecrccomp-u@PCIEXFN; 852event error.io.pciex.source-poiscomp-u@PCIEXFN; 853event error.io.pciex.source-poisreq-u@PCIEXFN; 854event error.io.pciex.badreq-d@PCIEXFN; 855event error.io.pciex.badreq-d@PCIEXFN/PCIEXFN; 856event error.io.pci.badreq-pw-d@PCIEXFN/PCIFN; 857event error.io.pci.badreq-drw-d@PCIEXFN/PCIFN; 858event error.io.pci.target-ma-d@PCIEXFN; 859event error.io.pci.target-rta-d@PCIEXFN; 860event error.io.pci.dpdata-pw-d@PCIEXFN/PCIFN; 861event error.io.pci.dpdata-dw-d@PCIEXFN/PCIFN; 862event error.io.pci.dpdata-dr-d@PCIEXFN/PCIFN; 863event error.io.pciex.ca-u@PCIEXFN; 864event error.io.pciex.ca-u@PCIEXFN/PCIEXFN; 865event error.io.pciex.ca-u@pciexrc/PCIEXFN; 866event error.io.pciex.ur-u@PCIEXFN; 867event error.io.pciex.ur-u@PCIEXFN/PCIEXFN; 868event error.io.pciex.ur-u@pciexrc/PCIEXFN; 869event error.io.pciex.nr-u@PCIEXFN; 870event error.io.pciex.nr-u@PCIEXFN/PCIEXFN; 871event error.io.pciex.nr-u@pciexrc/PCIEXFN; 872event error.io.pciex.mtlp-u@PCIEXFN; 873event error.io.pciex.mtlp-u@PCIEXFN/PCIEXFN; 874event error.io.pciex.mtlp-u@pciexrc/PCIEXFN; 875event error.io.pciex.badreq-u@PCIEXFN; 876event error.io.pciex.badreq-u@PCIEXFN/PCIEXFN; 877event error.io.pciex.badreq-u@pciexrc/PCIEXFN; 878event error.io.pciex.poisreq-u@PCIEXFN; 879event error.io.pciex.poisreq-u@PCIEXFN/PCIEXFN; 880event error.io.pciex.poisreq-u@pciexrc/PCIEXFN; 881event error.io.pciex.poiscomp-u@PCIEXFN; 882event error.io.pciex.poiscomp-u@PCIEXFN/PCIEXFN; 883event error.io.pciex.poiscomp-u@pciexrc/PCIEXFN; 884event error.io.pciex.ecrcreq-u@PCIEXFN; 885event error.io.pciex.ecrcreq-u@PCIEXFN/PCIEXFN; 886event error.io.pciex.ecrccomp-u@PCIEXFN; 887event error.io.pciex.ecrccomp-u@PCIEXFN/PCIEXFN; 888 889event ereport.io.pci.ma@PCIEXFN{within(5s)}; 890event ereport.io.pci.mdpe@PCIEXFN{within(5s)}; 891event ereport.io.pci.dpe@PCIEXFN{within(5s)}; 892event ereport.io.pci.rta@PCIEXFN{within(5s)}; 893event ereport.io.pci.sta@PCIEXFN{within(5s)}; 894event ereport.io.pciex.dl.dllp@PCIEXFN{within(5s)}; 895event ereport.io.pciex.pl.te@PCIEXFN{within(5s)}; 896event ereport.io.pciex.tl.fcp@PCIEXFN{within(5s)}; 897event ereport.io.pciex.tl.rof@PCIEXFN{within(5s)}; 898event ereport.io.pciex.tl.mtlp@PCIEXFN{within(5s)}; 899event ereport.io.pciex.tl.ur@PCIEXFN{within(5s)}; 900event ereport.io.pciex.tl.ca@PCIEXFN{within(5s)}; 901event ereport.io.pciex.tl.ptlp@PCIEXFN{within(5s)}; 902event ereport.io.pciex.tl.ecrc@PCIEXFN{within(5s)}; 903event ereport.io.pciex.tl.uc@PCIEXFN{within(5s)}; 904event ereport.io.pciex.tl.cto@PCIEXFN{within(5s)}; 905event ereport.io.pciex.dl.dllp@pciexrc{within(5s)}; 906event ereport.io.pciex.pl.te@pciexrc{within(5s)}; 907event ereport.io.pciex.tl.fcp@pciexrc{within(5s)}; 908event ereport.io.pciex.tl.rof@pciexrc{within(5s)}; 909event ereport.io.pciex.tl.mtlp@pciexrc{within(5s)}; 910event ereport.io.pciex.tl.ur@pciexrc{within(5s)}; 911event ereport.io.pciex.tl.ca@pciexrc{within(5s)}; 912event ereport.io.pciex.tl.ptlp@pciexrc{within(5s)}; 913event ereport.io.pciex.tl.ecrc@pciexrc{within(5s)}; 914event ereport.io.pciex.tl.cto@pciexrc{within(5s)}; 915event ereport.io.pci.sec-ma@pciexrc{within(5s)}; 916event ereport.io.pci.sec-mdpe@pciexrc{within(5s)}; 917event ereport.io.pci.sec-dpe@pciexrc{within(5s)}; 918event ereport.io.pci.sec-rta@pciexrc{within(5s)}; 919event ereport.io.pci.sec-sta@pciexrc{within(5s)}; 920event ereport.io.pci.sec-mdpe@PCIEXFN{within(5s)}; 921event ereport.io.pci.sec-dpe@PCIEXFN{within(5s)}; 922event ereport.io.pci.sec-rserr@PCIEXFN{within(5s)}; 923event ereport.io.pci.sserr@PCIEXFN{within(5s)}; 924event ereport.io.pci.sec-rserr@pciexrc{within(5s)}; 925event ereport.io.pciex.rc.fe-msg@pciexrc{within(5s)}; 926event ereport.io.pciex.rc.nfe-msg@pciexrc{within(5s)}; 927event ereport.io.pciex.rc.mue-msg@pciexrc{within(5s)}; 928event ereport.io.pciex.bdg.sec-interr@PCIEXFN{within(5s)}; 929event ereport.io.pciex.bdg.sec-ude@PCIEXFN{within(5s)}; 930event ereport.io.pci.target-mdpe@PCIEXFN{within(5s)}; 931event ereport.io.pci.target-mdpe@PCIFN{within(5s)}; 932 933/* 934 * handling of fatal and nonfatal error messages propagated up to root complex 935 * 936 * Use these for errors reported by root-complex on behalf of another device. 937 * Can use source-id payload to identify where the message came from. 938 */ 939prop error.io.pciex.fatal@PCIEXFN1 (1)-> 940 ereport.io.pciex.rc.mue-msg@pciexrc { is_under(pciexrc, PCIEXFN1) }, 941 ereport.io.pciex.rc.fe-msg@pciexrc { is_under(pciexrc, PCIEXFN1) && 942 SOURCE_ID_MATCHES_BDF }; 943 944prop error.io.pciex.fatal@PCIEXFN (0)-> 945 ereport.io.pci.sserr@PCIEXFN; 946 947prop error.io.pciex.fatal@PCIEXFN { is_under(PCIEXFN1, PCIEXFN) } (0)-> 948 ereport.io.pci.sserr@PCIEXFN1, 949 ereport.io.pci.sec-rserr@PCIEXFN1; 950 951prop error.io.pciex.fatal@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)-> 952 ereport.io.pci.sec-rserr@pciexrc; 953 954prop error.io.pciex.nonfatal@PCIEXFN1 (1)-> 955 ereport.io.pciex.rc.mue-msg@pciexrc { is_under(pciexrc, PCIEXFN1) }, 956 ereport.io.pciex.rc.nfe-msg@pciexrc { is_under(pciexrc, PCIEXFN1) && 957 SOURCE_ID_MATCHES_BDF }; 958 959prop error.io.pciex.nonfatal@PCIEXFN (0)-> 960 ereport.io.pci.sserr@PCIEXFN; 961 962prop error.io.pciex.nonfatal@PCIEXFN { is_under(PCIEXFN1, PCIEXFN) } (0)-> 963 ereport.io.pci.sserr@PCIEXFN1, 964 ereport.io.pci.sec-rserr@PCIEXFN1; 965 966prop error.io.pciex.nonfatal@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)-> 967 ereport.io.pci.sec-rserr@pciexrc; 968 969/* 970 * link-level errors - could generate ereports at either end of link 971 * 972 * can use may propagations here as these ereports are only seen for these 973 * faults. 974 */ 975prop error.io.pciex.fatlink@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 976 error.io.pciex.fatal@PCIEXFN; 977 978prop error.io.pciex.fatlink@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 979 ereport.io.pciex.dl.dllp@PCIEXFN, 980 ereport.io.pciex.tl.fcp@PCIEXFN, 981 ereport.io.pciex.tl.rof@PCIEXFN; 982 983prop error.io.pciex.fatlink@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (0)-> 984 error.io.pciex.fatal@PCIEXFN; 985 986prop error.io.pciex.fatlink@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (0)-> 987 ereport.io.pciex.dl.dllp@PCIEXFN, 988 ereport.io.pciex.pl.te@PCIEXFN, 989 ereport.io.pciex.tl.fcp@PCIEXFN, 990 ereport.io.pciex.tl.rof@PCIEXFN; 991 992prop error.io.pciex.fatlink@pciexrc/PCIEXFN (0)-> 993 ereport.io.pciex.dl.dllp@pciexrc, 994 ereport.io.pciex.pl.te@pciexrc, 995 ereport.io.pciex.tl.fcp@pciexrc, 996 ereport.io.pciex.tl.rof@pciexrc; 997 998/* 999 * bridge internal error 1000 */ 1001prop error.io.pciex.sec-interr@PCIEXFN { IS_BG(PCIEXFN) } (2) -> 1002 error.io.pciex.nonfatal@PCIEXFN, 1003 ereport.io.pciex.bdg.sec-interr@PCIEXFN; 1004 1005/* 1006 * downstream poisoned request 1007 * 1008 * - poisreq-d cascades down to the leaf device/bridge and any switch ports 1009 * on route must raise a ptlp ereport while any switch ports forwarding 1010 * the poisoned request must raise sec-mdpe ereports. The originator of the 1011 * poisoning (be it root complex or downstream port of a switch) also raises 1012 * sec-mdpe. A hardened leaf driver will also raise ptlp. A target-mdpe may 1013 * be seen at the leaf (which may be a pci device beyond the bridge). 1014 * 1015 * Additionally, the leaf/bridge may treat the request as a ur, which the 1016 * root complex will see and report an ma. Use flt-ur-u to represent this. 1017 * 1018 * The fault can always be recognized and the source identified using the ptlp 1019 * and sec-mdpe ereports. 1020 */ 1021prop error.io.pciex.poisreq-d@PCIEXFN (1)-> 1022 error.io.pciex.poisreq-fwd-d@PCIEXFN; 1023 1024prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SD(PCIEXFN) || 1025 IS_SU(PCIEXFN) } (1)-> 1026 error.io.pciex.flt-ur-u@PCIEXFN, 1027 error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFNHZ; 1028 1029prop error.io.pciex.poisreq-fwd-d@pciexrc/PCIEXFN (1)-> 1030 ereport.io.pci.sec-mdpe@pciexrc; 1031 1032prop error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1033 ereport.io.pci.sec-mdpe@PCIEXFN; 1034 1035prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 1036 ereport.io.pci.dpe@PCIEXFN, 1037 ereport.io.pciex.tl.ptlp@PCIEXFN; 1038 1039prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1040 error.io.pciex.nonfatal@PCIEXFN; 1041 1042prop error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (1)-> 1043 ereport.io.pci.sec-mdpe@PCIEXFN; 1044 1045prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1046 ereport.io.pci.dpe@PCIEXFN, 1047 ereport.io.pciex.tl.ptlp@PCIEXFN, 1048 error.io.pciex.nonfatal@PCIEXFN; 1049 1050prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 1051 ereport.io.pci.dpe@PCIEXFN, 1052 ereport.io.pciex.tl.ptlp@PCIEXFN, 1053 error.io.pciex.nonfatal@PCIEXFN; 1054 1055prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1056 error.io.pci.dpdata-pw-d@PCIEXFN/PCIFNHZ, 1057 error.io.pci.dpdata-dw-d@PCIEXFN/PCIFNHZ; 1058 1059prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1060 error.io.pciex.nonfatal@PCIEXFN; 1061 1062prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1063 ereport.io.pci.dpe@PCIEXFN, 1064 ereport.io.pciex.tl.ptlp@PCIEXFN, 1065 error.io.pciex.flt-ur-u@PCIEXFN; 1066 1067prop error.io.pciex.poisreq-fwd-d@PCIEXFN (0)-> 1068 ereport.io.pci.target-mdpe@PCIEXFN; 1069 1070/* 1071 * downstream poisoned completion 1072 * 1073 * - poiscomp-d cascades down to the leaf device/bridge and any switch ports on 1074 * route must raise ptlp and mdpe ereports. A hardened leaf driver will also 1075 * raise pltp and mdpe. For non-hardened leaf devices, no ptlp/mdpe may be 1076 * reported, and though we should still see a nonfatal error reported from 1077 * the root complex identifying the leaf device, we won't actually be informed 1078 * that the error was an ptlp. 1079 */ 1080prop error.io.pciex.poiscomp-d@PCIEXFN (1)-> 1081 error.io.pciex.poiscomp-fwd-d@PCIEXFN; 1082 1083prop error.io.pciex.poiscomp-fwd-d@PCIEXFN (1)-> 1084 error.io.pciex.poiscomp-fwd-d@PCIEXFN/PCIEXFNHZ; 1085 1086prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 1087 ereport.io.pci.dpe@PCIEXFN, 1088 ereport.io.pciex.tl.ptlp@PCIEXFN; 1089 1090prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 1091 ereport.io.pci.mdpe@PCIEXFN, 1092 ereport.io.pci.sec-mdpe@PCIEXFN; 1093 1094prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1095 error.io.pciex.nonfatal@PCIEXFN; 1096 1097prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1098 ereport.io.pci.mdpe@PCIEXFN, 1099 ereport.io.pci.sec-mdpe@PCIEXFN, 1100 ereport.io.pci.dpe@PCIEXFN, 1101 ereport.io.pciex.tl.ptlp@PCIEXFN, 1102 error.io.pciex.nonfatal@PCIEXFN; 1103 1104prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (4)-> 1105 ereport.io.pci.mdpe@PCIEXFN, 1106 ereport.io.pci.dpe@PCIEXFN, 1107 ereport.io.pciex.tl.ptlp@PCIEXFN, 1108 error.io.pciex.nonfatal@PCIEXFN; 1109 1110prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1111 error.io.pci.dpdata-dr-d@PCIEXFN/PCIFNHZ; 1112 1113prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1114 error.io.pciex.nonfatal@PCIEXFN; 1115 1116prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1117 ereport.io.pci.mdpe@PCIEXFN, 1118 ereport.io.pci.dpe@PCIEXFN, 1119 ereport.io.pciex.tl.ptlp@PCIEXFN; 1120 1121/* 1122 * downstream request with ecrc error. 1123 * 1124 * - ecrcreq-d cascades down to the leaf device/bridge and any switches on 1125 * route can optionally raise an ecrc ereport. A hardened leaf driver may also 1126 * raise ecrc. For non-hardened leaf devices, no ecrc may be reported, and 1127 * though we should still see a nonfatal error reported from the root complex 1128 * identifying the leaf device, we won't actually be informed that the error 1129 * was an ecrc. 1130 * 1131 * Additionally, as the leaf/bridge will just throw away the packet, we should 1132 * eventually get a cto at the root complex - so use an nr-u at the pciex 1133 * leaf or bridge to get the appropriate behaviour. For the case where the leaf 1134 * driver wasn't hardened we may be able to identify the leaf device (and 1135 * therefore any intermediate switches which might have caused the problem) 1136 * either via a target-ma ereport if available or via the nonfatal error 1137 * reported from the root complex identifying the leaf device. The combination 1138 * of a nonfatal error reported from the root complex and a cto from the root 1139 * complex is sufficient to positively identify this case. 1140 */ 1141prop error.io.pciex.ecrcreq-d@PCIEXFN (1)-> 1142 error.io.pciex.ecrcreq-fwd-d@PCIEXFN; 1143 1144prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 1145 IS_SD(PCIEXFN) } (1)-> 1146 error.io.pciex.flt-nr-u@PCIEXFN, 1147 error.io.pciex.ecrcreq-fwd-d@PCIEXFN/PCIEXFNHZ; 1148 1149prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 1150 IS_SD(PCIEXFN) } (0)-> 1151 ereport.io.pciex.tl.ecrc@PCIEXFN, 1152 error.io.pciex.nonfatal@PCIEXFN; 1153 1154prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 1155 error.io.pciex.nonfatal@PCIEXFN, 1156 ereport.io.pciex.tl.ecrc@PCIEXFN, 1157 error.io.pciex.flt-nr-u@PCIEXFN; 1158 1159prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (2)-> 1160 error.io.pciex.nonfatal@PCIEXFN, 1161 error.io.pciex.flt-nr-u@PCIEXFN; 1162 1163prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1164 ereport.io.pciex.tl.ecrc@PCIEXFN; 1165 1166/* 1167 * downstream completion with ecrc error. 1168 * 1169 * - ecrccomp-d cascades down to the leaf device/bridge and any switches on 1170 * route can optionally raise an ecrc ereport. A hardened leaf driver may 1171 * also raise ecrc. For non-hardened leaf devices, no ecrc may be reported, 1172 * and though we should still see a nonfatal error reported from the root 1173 * complex identifying the leaf device, we won't actually be informed that 1174 * the error was an ecrc. 1175 * 1176 * Additionally, as the leaf/bridge will just throw away the packet, we should 1177 * eventually get a cto. Note the leaf ereports are optional (ie in case driver 1178 * not hardened) but if we get both ecrc and cto we need to distinguish from 1179 * cto only which would be an nr-d. 1180 */ 1181prop error.io.pciex.ecrccomp-d@PCIEXFN (1)-> 1182 error.io.pciex.ecrccomp-fwd-d@PCIEXFN; 1183 1184prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN (1)-> 1185 error.io.pciex.ecrccomp-fwd-d@PCIEXFN/PCIEXFNHZ; 1186 1187prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 1188 IS_SD(PCIEXFN) } (0)-> 1189 error.io.pciex.nonfatal@PCIEXFN, 1190 ereport.io.pciex.tl.ecrc@PCIEXFN; 1191 1192prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 1193 error.io.pciex.nonfatal@PCIEXFN, 1194 ereport.io.pciex.tl.ecrc@PCIEXFN, 1195 error.io.pciex.nr-d@PCIEXFN; 1196 1197prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1198 error.io.pciex.nonfatal@PCIEXFN; 1199 1200prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1201 ereport.io.pciex.tl.ecrc@PCIEXFN, 1202 error.io.pciex.nr-d@PCIEXFN; 1203 1204/* 1205 * upstream poisoned request 1206 * 1207 * - flt-poisreq-u is on the pciex node which generated the fault 1208 * - source-poisreq-u refers to at least one leaf or bridge device 1209 * whose bdf (if leaf) must match the source-id in the payload of the 1210 * ereport generated from the root complex. 1211 * - poisreq-u propagates up to the root complex and any switch ports on 1212 * route will raise a ptlp ereport, while any upstream devices generating 1213 * or forwarding the poisoned packed will raise an mdpe ereport. The root 1214 * complex should also report a ptlp. 1215 * 1216 * Additionally, as the root complex may treat the request as a ur, which the 1217 * leaf/bridge will see (and if hardened report) as an ma (including sending a 1218 * ta onto the child pci bus if this was a delayed write). 1219 * 1220 * We can always recognize what sort of fault this is from the ptlp (with no 1221 * sec-mdpe) at the root complex. Recognizing which originating devices may be 1222 * implicated can be done using the mdpe ereport (for a hardened leaf driver), 1223 * or for a non-hardened leaf driver by using the source-id payload in the ptlp 1224 * ereport to identify the originator of the request. The ptlp/mdpe ereports 1225 * at the intervening switches will narrow the fault down to a single suspect. 1226 */ 1227 1228prop error.io.pciex.flt-poisreq-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1229 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1230 error.io.pciex.source-poisreq-u@PCIEXFN; 1231 1232prop error.io.pciex.source-poisreq-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1233 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1234 ereport.io.pciex.tl.ptlp@pciexrc, 1235 ereport.io.pciex.tl.ur@pciexrc; 1236 1237prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1238 ereport.io.pci.ma@PCIEXFN; 1239 1240prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_BG(PCIEXFN) && 1241 is_under(pciexrc, PCIEXFN) } (0)-> 1242 ereport.io.pciex.tl.ptlp@pciexrc, 1243 ereport.io.pciex.tl.ur@pciexrc; 1244 1245prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1246 ereport.io.pci.ma@PCIEXFN, 1247 ereport.io.pci.sec-sta@PCIEXFN, 1248 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1249 1250prop error.io.pciex.flt-poisreq-u@PCIEXFN (1)-> 1251 error.io.pciex.poisreq-u@PCIEXFN; 1252 1253/* 1254 * the remaining propagations are also used for poisoned requests propagating 1255 * up due to a fault behind a pcie-pci bridge 1256 */ 1257prop error.io.pciex.poisreq-u@PCIEXFN/PCIEXFN (1)-> 1258 error.io.pciex.poisreq-u@PCIEXFN; 1259 1260prop error.io.pciex.poisreq-u@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1261 ereport.io.pci.mdpe@PCIEXFN; 1262 1263prop error.io.pciex.poisreq-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1264 ereport.io.pci.mdpe@PCIEXFN; 1265 1266prop error.io.pciex.poisreq-u@PCIEXFN { IS_SD(PCIEXFN) } (2)-> 1267 ereport.io.pci.sec-dpe@PCIEXFN, 1268 ereport.io.pciex.tl.ptlp@PCIEXFN; 1269 1270prop error.io.pciex.poisreq-u@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1271 ereport.io.pci.mdpe@PCIEXFN, 1272 error.io.pciex.nonfatal@PCIEXFN; 1273 1274prop error.io.pciex.poisreq-u@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 1275 ereport.io.pci.mdpe@PCIEXFN; 1276 1277prop error.io.pciex.poisreq-u@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1278 ereport.io.pci.sec-dpe@PCIEXFN, 1279 ereport.io.pciex.tl.ptlp@PCIEXFN, 1280 error.io.pciex.nonfatal@PCIEXFN; 1281 1282prop error.io.pciex.poisreq-u@pciexrc/PCIEXFN (1)-> 1283 ereport.io.pci.sec-dpe@pciexrc; 1284 1285/* 1286 * upstream poisoned completion 1287 * 1288 * - flt-poiscomp-u is on the pciex node which generated the fault. There will 1289 * be a target-mdpe downstream from here. 1290 * - source-poiscomp-u refers to at least one leaf or bridge device 1291 * whose bdf (if leaf) must match the source-id in the payload of the 1292 * ereport generated from the root complex. 1293 * - poiscomp-u propagates up to the root complex and any switches on 1294 * route will raise ptlp and sec-mdpe ereports. The root complex will also 1295 * raise a sec-mdpe and ptlp. 1296 * 1297 * We can always recognize what sort of fault this is from the ptlp/sec-mdpe at 1298 * the root complex. Recognizing which originating devices may be implicated 1299 * can be done using the source-id payload in the ptlp ereport to identify the 1300 * originator of the completion. The ptlp/sec-mdpe ereports at the intervening 1301 * switches will narrow the fault down to a single suspect. 1302 */ 1303prop error.io.pciex.flt-poiscomp-u@PCIEXFN { IS_LF(PCIEXFN1) && 1304 is_under(PCIEXFN, PCIEXFN1) } (0)-> 1305 ereport.io.pci.target-mdpe@PCIEXFN1; 1306 1307prop error.io.pciex.flt-poiscomp-u@PCIEXFN { IS_PCI_LF(PCIFN) && 1308 is_under(PCIEXFN, PCIFN) } (0)-> 1309 ereport.io.pci.target-mdpe@PCIFN; 1310 1311prop error.io.pciex.flt-poiscomp-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1312 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1313 error.io.pciex.source-poiscomp-u@PCIEXFN; 1314 1315prop error.io.pciex.source-poiscomp-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1316 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1317 ereport.io.pciex.tl.ptlp@pciexrc; 1318 1319prop error.io.pciex.source-poiscomp-u@PCIEXFN1 { IS_BG(PCIEXFN1) && 1320 is_under(pciexrc, PCIEXFN1) } (0)-> 1321 ereport.io.pciex.tl.ptlp@pciexrc; 1322 1323prop error.io.pciex.flt-poiscomp-u@PCIEXFN (1)-> 1324 error.io.pciex.poiscomp-u@PCIEXFN; 1325 1326/* 1327 * the remaining propagations are also used for poisoned completions propagating 1328 * up due to a fault behind a pcie-pci bridge 1329 */ 1330prop error.io.pciex.poiscomp-u@PCIEXFN/PCIEXFN (1)-> 1331 error.io.pciex.poiscomp-u@PCIEXFN; 1332 1333prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (2)-> 1334 ereport.io.pci.sec-dpe@PCIEXFN, 1335 ereport.io.pciex.tl.ptlp@PCIEXFN; 1336 1337prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 1338 ereport.io.pci.sec-mdpe@PCIEXFN, 1339 ereport.io.pci.mdpe@PCIEXFN; 1340 1341prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1342 error.io.pciex.nonfatal@PCIEXFN; 1343 1344prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1345 ereport.io.pci.mdpe@PCIEXFN, 1346 ereport.io.pci.sec-mdpe@PCIEXFN, 1347 ereport.io.pci.sec-dpe@PCIEXFN, 1348 ereport.io.pciex.tl.ptlp@PCIEXFN, 1349 error.io.pciex.nonfatal@PCIEXFN; 1350 1351prop error.io.pciex.poiscomp-u@pciexrc/PCIEXFN (1)-> 1352 ereport.io.pci.sec-dpe@pciexrc; 1353 1354prop error.io.pciex.poiscomp-u@pciexrc/PCIEXFN (0)-> 1355 ereport.io.pci.sec-mdpe@pciexrc; 1356 1357/* 1358 * upstream request with ecrc error. 1359 * 1360 * - flt-ecrcreq-u is on the pciex node which generated the fault. 1361 * - source-ecrcreq-u cascades down to at least one leaf device (pciex or pci), 1362 * whose bdf (if pciex) must match the source-id in the payload of the 1363 * ereport generated from the root complex. 1364 * - ecrcreq-u propagates up to the root complex which must report it with an 1365 * ecrc ereport and any switches on route can optionally raise an ecrc ereport 1366 * 1367 * Additionally, as the root complex will just throw away the packet, we may 1368 * eventually get a cto - so use an nr-d at the pciex leaf or bridge to get 1369 * the appropriate behaviour. 1370 * 1371 * We can always recognize what sort of fault this is from the ecrc (with no 1372 * cto) at the root complex. Recognizing which leaf device may be implicated 1373 * can be done from the cto ereport (for a hardened leaf driver) or for a 1374 * non-hardened leaf using the source-id payload of the ecrc. 1375 */ 1376prop error.io.pciex.flt-ecrcreq-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1377 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1378 error.io.pciex.source-ecrcreq-u@PCIEXFN; 1379 1380prop error.io.pciex.source-ecrcreq-u@PCIEXFN (0)-> 1381 error.io.pciex.nr-d@PCIEXFN; 1382 1383prop error.io.pciex.source-ecrcreq-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1384 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1385 ereport.io.pciex.tl.ecrc@pciexrc; 1386 1387prop error.io.pciex.source-ecrcreq-u@PCIEXFN { IS_BG(PCIEXFN) && 1388 is_under(pciexrc, PCIEXFN) } (0)-> 1389 ereport.io.pciex.tl.ecrc@pciexrc; 1390 1391prop error.io.pciex.flt-ecrcreq-u@PCIEXFN (1)-> 1392 error.io.pciex.ecrcreq-u@PCIEXFN; 1393 1394prop error.io.pciex.ecrcreq-u@PCIEXFN/PCIEXFN (1)-> 1395 error.io.pciex.ecrcreq-u@PCIEXFN; 1396 1397prop error.io.pciex.ecrcreq-u@PCIEXFN { IS_SD(PCIEXFN)||IS_SU(PCIEXFN) } (0)-> 1398 ereport.io.pciex.tl.ecrc@PCIEXFN, 1399 error.io.pciex.nonfatal@PCIEXFN; 1400 1401/* 1402 * upstream completion with ecrc error. 1403 * 1404 * - flt-ecrccomp-u is on the pciex node which generated the fault. 1405 * - source-ecrccomp-u cascades down to at least one leaf device (pciex or pci), 1406 * whose bdf (if pciex) must match the source-id in the payload of the 1407 * ereport generated from the root complex. 1408 * - ecrccomp-u propagates up to the root complex, which should report it with 1409 * an ecrc ereport and any switches on route can optionally raise an ecrc 1410 * ereport. 1411 * 1412 * Additionally, as the root complex will just throw away the packet, we'll 1413 * eventually get a cto - so use an flt-nr-u at the pciex leaf or bridge to get 1414 * the appropriate behaviour. 1415 * 1416 * We can always recognize what sort of fault this from the ecrc/cto from the 1417 * root complex. Recognizing which leaf device may be implicated can be done 1418 * using either the source-id payload of the ecrc or the target-ma ereport if 1419 * available. 1420 */ 1421prop error.io.pciex.flt-ecrccomp-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1422 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1423 error.io.pciex.source-ecrccomp-u@PCIEXFN; 1424 1425prop error.io.pciex.source-ecrccomp-u@PCIEXFN (0)-> 1426 error.io.pciex.flt-nr-u@PCIEXFN; 1427 1428prop error.io.pciex.source-ecrccomp-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1429 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1430 ereport.io.pciex.tl.ecrc@pciexrc; 1431 1432prop error.io.pciex.source-ecrccomp-u@PCIEXFN { IS_BG(PCIEXFN) && 1433 is_under(pciexrc, PCIEXFN) } (0)-> 1434 ereport.io.pciex.tl.ecrc@pciexrc; 1435 1436prop error.io.pciex.flt-ecrccomp-u@PCIEXFN (1)-> 1437 error.io.pciex.ecrccomp-u@PCIEXFN; 1438 1439prop error.io.pciex.ecrccomp-u@PCIEXFN/PCIEXFN (1)-> 1440 error.io.pciex.ecrccomp-u@PCIEXFN; 1441 1442prop error.io.pciex.ecrccomp-u@PCIEXFN { IS_SD(PCIEXFN)||IS_SU(PCIEXFN) } (0)-> 1443 ereport.io.pciex.tl.ecrc@PCIEXFN, 1444 error.io.pciex.nonfatal@PCIEXFN; 1445 1446/* 1447 * no response to downstream requester 1448 * 1449 * - nr-d will effectively cascade downstream to the requester. The fault here 1450 * is always at the root complex. For a hardened leaf device driver, we will 1451 * always be able to recognize this as the requester will report this as a 1452 * cto. For non-hardened leaf devices, no cto will be reported, and though we 1453 * should still see a nonfatal error reported from the root complex 1454 * identifying the leaf device, we won't actually be informed that the error 1455 * was a cto. 1456 */ 1457prop error.io.pciex.nr-d@PCIEXFN (1)-> 1458 error.io.pciex.nr-d@PCIEXFN/PCIEXFNHZ; 1459 1460prop error.io.pciex.nr-d@PCIEXFN { IS_BG(PCIEXFN) } (2)-> 1461 error.io.pciex.nonfatal@PCIEXFN, 1462 ereport.io.pciex.tl.cto@PCIEXFN; 1463 1464prop error.io.pciex.nr-d@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1465 ereport.io.pci.ma@PCIEXFN, 1466 ereport.io.pci.sec-sta@PCIEXFN, 1467 error.io.pci.nr-drw-d@PCIEXFN/PCIFN, 1468 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1469 1470prop error.io.pciex.nr-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1471 error.io.pciex.nonfatal@PCIEXFN; 1472 1473prop error.io.pciex.nr-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1474 ereport.io.pci.ma@PCIEXFN, 1475 ereport.io.pciex.tl.cto@PCIEXFN; 1476 1477/* 1478 * no response to upstream requester 1479 * 1480 * - flt-nr-u will effectively cascade upstream to the root complex which will 1481 * report it as a cto. 1482 * 1483 * We have to use target-ma to informs us which device failed to respond. 1484 */ 1485prop error.io.pciex.flt-nr-u@PCIEXFN (1)-> 1486 error.io.pci.target-ma-d@PCIEXFN; 1487 1488prop error.io.pciex.flt-nr-u@PCIEXFN (1)-> 1489 error.io.pciex.nr-u@PCIEXFN; 1490 1491prop error.io.pciex.nr-u@PCIEXFN/PCIEXFN (1)-> 1492 error.io.pciex.nr-u@PCIEXFN; 1493 1494prop error.io.pciex.nr-u@pciexrc/PCIEXFN (1)-> 1495 ereport.io.pciex.tl.cto@pciexrc; 1496 1497prop error.io.pciex.nr-u@pciexrc/PCIEXFN (0)-> 1498 ereport.io.pci.sec-ma@pciexrc; 1499 1500/* 1501 * downstream malformed tlp 1502 * 1503 * This will cascade downstream to the receiver which will report it as an mtlp. 1504 * For non-hardened leaf drivers, no mtlp will be reported, and though we should 1505 * still see a fatal error reported from the root complex identifying the leaf 1506 * device, we won't actually be informed that the error was a mtlp. 1507 * Note that sw-mtlp-d is to handle the case where the switch is actually 1508 * the target of the packet (config request etc). 1509 */ 1510prop error.io.pciex.mtlp-d@PCIEXFN { IS_SD(PCIEXFN) || IS_SU(PCIEXFN) } (1)-> 1511 error.io.pciex.sw-mtlp-d@PCIEXFN, 1512 error.io.pciex.mtlp-d@PCIEXFN/PCIEXFNHZ; 1513 1514prop error.io.pciex.sw-mtlp-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 1515 error.io.pciex.fatal@PCIEXFN, 1516 ereport.io.pciex.tl.mtlp@PCIEXFN; 1517 1518prop error.io.pciex.mtlp-d@PCIEXFN { IS_BG(PCIEXFN) } (2)-> 1519 error.io.pciex.fatal@PCIEXFN, 1520 ereport.io.pciex.tl.mtlp@PCIEXFN; 1521 1522prop error.io.pciex.mtlp-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1523 error.io.pciex.fatal@PCIEXFN; 1524 1525prop error.io.pciex.mtlp-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1526 ereport.io.pciex.tl.mtlp@PCIEXFN; 1527 1528/* 1529 * upstream malformed tlp 1530 * 1531 * This will cascade upstream to the receiver which will report it as an mtlp. 1532 */ 1533prop error.io.pciex.flt-mtlp-u@PCIEXFN (1)-> 1534 error.io.pciex.mtlp-u@PCIEXFN; 1535 1536prop error.io.pciex.mtlp-u@PCIEXFN/PCIEXFN (1)-> 1537 error.io.pciex.mtlp-u@PCIEXFN; 1538 1539prop error.io.pciex.mtlp-u@pciexrc/PCIEXFN (1)-> 1540 ereport.io.pciex.tl.mtlp@pciexrc; 1541 1542/* 1543 * downstream completer aborts 1544 * 1545 * This could be the fault of the root complex or a switch reporting an internal 1546 * error, or of the leaf device sending an invalid request (the latter is 1547 * handled by the flt-badreq-u case below). 1548 * 1549 * This is reported by the completer or by an intervening downstream switch 1550 * port. The completer abort response propagates down to the initiator which 1551 * will set the legacy pci bit rta. 1552 * 1553 * The fault can always be recognized by the ca ereport from the root complex 1554 * or downstream switch port. The originator of the request can be recognized 1555 * by the rta for a hardened driver or by using the source-id payload of the 1556 * ca ereport for a non-hardened driver. 1557 */ 1558prop error.io.pciex.ca-d@pciexrc/PCIEXFN (0)-> 1559 ereport.io.pciex.tl.ca@pciexrc; 1560 1561prop error.io.pciex.ca-d@pciexrc/PCIEXFN (1)-> 1562 ereport.io.pci.sec-sta@pciexrc; 1563 1564prop error.io.pciex.ca-d@PCIEXFN/PCIEXFN (0)-> 1565 ereport.io.pci.sec-sta@PCIEXFN; 1566 1567prop error.io.pciex.ca-d@PCIEXFN/PCIEXFN (2)-> 1568 ereport.io.pciex.tl.ca@PCIEXFN, 1569 error.io.pciex.nonfatal@PCIEXFN; 1570 1571prop error.io.pciex.ca-d@PCIEXFN (0)-> 1572 error.io.pciex.ca-fwd-d@PCIEXFN; 1573 1574prop error.io.pciex.ca-fwd-d@PCIEXFN (1)-> 1575 error.io.pciex.ca-fwd-d@PCIEXFN/PCIEXFNHZ; 1576 1577prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1578 ereport.io.pci.rta@PCIEXFN; 1579 1580prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1581 ereport.io.pci.sec-sta@PCIEXFN, 1582 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1583 1584prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1585 ereport.io.pci.rta@PCIEXFN; 1586 1587/* 1588 * upstream completer aborts 1589 * 1590 * This could be the fault of the leaf device/bridge/upstream switch port 1591 * reporting an internal error, or of the root complex sending an invalid 1592 * request (the latter case is handled by badreq-d below). 1593 * 1594 * This is reported as a ca by the completer. The completer (for non-posted 1595 * requests) sends the appropriate error bits in the completion message to 1596 * the initiator which will set the legacy pci bit sec-rta. 1597 * 1598 * The fault can always be recognized from the sec-rta bit at the root complex. 1599 * 1600 * If the fault was with a PCI Express leaf with a hardened driver, then we 1601 * will identify the device from the ca ereport. 1602 * 1603 * If the fault was with a PCI Express leaf with a non-hardened driver, then we 1604 * can still identify the leaf device from the source-id payload of the nonfatal 1605 * message ereport from the root complex or from the target-rta ereport. 1606 */ 1607prop error.io.pciex.flt-ca-u@PCIEXFN { !IS_LF(PCIEXFN) } (1)-> 1608 ereport.io.pciex.tl.ca@PCIEXFN; 1609 1610prop error.io.pciex.flt-ca-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1611 ereport.io.pciex.tl.ca@PCIEXFN; 1612 1613prop error.io.pciex.flt-ca-u@PCIEXFN (0)-> 1614 error.io.pciex.nonfatal@PCIEXFN, 1615 ereport.io.pci.sta@PCIEXFN; 1616 1617prop error.io.pciex.flt-ca-u@PCIEXFN (2)-> 1618 error.io.pci.target-rta-d@PCIEXFN, 1619 error.io.pciex.ca-u@PCIEXFN; 1620 1621prop error.io.pciex.ca-u@PCIEXFN/PCIEXFN (1)-> 1622 error.io.pciex.ca-u@PCIEXFN; 1623 1624prop error.io.pciex.ca-u@pciexrc/PCIEXFN (0)-> 1625 ereport.io.pci.sec-rta@pciexrc; 1626 1627/* 1628 * upstream bad request 1629 * 1630 * When detecting bad data on a request the completer (or any switch on the 1631 * way to the completer) may report ur or ca. If the switch detects the problem 1632 * first then the request doesn't get forwarded on to the completer. 1633 * 1634 * These are reported as ur/ca ereports. For non-posted requests, the reporter 1635 * then sends the appropriate error bits in the completion message to the 1636 * initiator which will set the legacy pci bits ma or rta. 1637 * 1638 * For flt-badreq-u, the ca/ur ereports contain a source-id payload that 1639 * identifies the initiator. 1640 * 1641 * The fault can always be recognized by the ca/ur ereport from the root 1642 * complex or downstream switch port. The originator of the request can be 1643 * recognized by the rta/ma for a hardened driver or by using the source-id 1644 * payload of the ca/ur ereport for a non-hardened driver. 1645 */ 1646prop error.io.pciex.flt-badreq-u@PCIEXFN (0)-> 1647 ereport.io.pci.ma@PCIEXFN, 1648 ereport.io.pci.rta@PCIEXFN; 1649 1650prop error.io.pciex.flt-badreq-u@PCIEXFN1 { 1651 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1652 ereport.io.pciex.tl.ur@pciexrc, 1653 ereport.io.pciex.tl.ca@pciexrc; 1654 1655prop error.io.pciex.flt-badreq-u@PCIEXFN (1)-> 1656 error.io.pciex.badreq-u@PCIEXFN; 1657 1658prop error.io.pciex.badreq-u@PCIEXFN/PCIEXFN (1)-> 1659 error.io.pciex.badreq-u@PCIEXFN; 1660 1661prop error.io.pciex.badreq-u@pciexrc/PCIEXFN (0)-> 1662 ereport.io.pci.sec-sta@pciexrc; 1663 1664prop error.io.pciex.flt-badreq-u@PCIEXFN1 { IS_SD(PCIEXFN) && 1665 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIEXFN1) } (0)-> 1666 ereport.io.pciex.tl.ur@PCIEXFN, 1667 ereport.io.pciex.tl.ca@PCIEXFN; 1668 1669prop error.io.pciex.flt-badreq-u@PCIEXFN1 { IS_SD(PCIEXFN) && 1670 is_under(PCIEXFN, PCIEXFN1) } (0)-> 1671 ereport.io.pci.sec-sta@PCIEXFN, 1672 error.io.pciex.nonfatal@PCIEXFN; 1673 1674/* 1675 * downstream bad request 1676 * 1677 * When detecting bad data on a request the completer (or any switch on the 1678 * way to the completer) may report ur or ca. If the switch detects the problem 1679 * first then the request doesn't get forwarded on to the completer. 1680 * 1681 * These are reported as ur/ca ereports (except where the completer is a non- 1682 * hardened leaf driver when all we get is a nonfatal error from the root 1683 * complex identifying the leaf device). The reporter then sends the appropriate 1684 * error bits in the completion message to the initiator which will set the 1685 * legacy pci bits ma or rta (oddly there is no equivalent in pcie error 1686 * reporting). 1687 */ 1688prop error.io.pciex.badreq-d@PCIEXFN { IS_SU(PCIEXFN) || IS_SD(PCIEXFN) } (1)-> 1689 error.io.pciex.flt-ur-u@PCIEXFN, 1690 error.io.pciex.flt-ca-u@PCIEXFN, 1691 error.io.pciex.badreq-d@PCIEXFN/PCIEXFNHZ; 1692 1693prop error.io.pciex.badreq-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1694 error.io.pciex.flt-ur-u@PCIEXFN, 1695 error.io.pciex.flt-ca-u@PCIEXFN, 1696 error.io.pci.badreq-pw-d@PCIEXFN/PCIFNHZ, 1697 error.io.pci.badreq-drw-d@PCIEXFN/PCIFNHZ; 1698 1699prop error.io.pciex.badreq-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1700 error.io.pciex.flt-ur-u@PCIEXFN, 1701 error.io.pciex.flt-ca-u@PCIEXFN; 1702 1703prop error.io.pciex.flt-ur-u@PCIEXFN { !IS_LF(PCIEXFN) } (1)-> 1704 ereport.io.pciex.tl.ur@PCIEXFN; 1705 1706prop error.io.pciex.flt-ur-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1707 ereport.io.pciex.tl.ur@PCIEXFN; 1708 1709prop error.io.pciex.flt-ur-u@PCIEXFN (2)-> 1710 error.io.pci.target-ma-d@PCIEXFN, 1711 error.io.pciex.ur-u@PCIEXFN; 1712 1713prop error.io.pciex.flt-ur-u@PCIEXFN (0)-> 1714 error.io.pciex.nonfatal@PCIEXFN; 1715 1716prop error.io.pciex.ur-u@PCIEXFN/PCIEXFN (1)-> 1717 error.io.pciex.ur-u@PCIEXFN; 1718 1719prop error.io.pciex.ur-u@pciexrc/PCIEXFN (0)-> 1720 ereport.io.pci.sec-ma@pciexrc; 1721 1722/* 1723 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1724 * Stub unused legacy pci ereports at root complex. 1725 * Stub tl.uc as we can't do anything useful with it (we should eventually 1726 * get a cto which we can do something with - a uc without a cto is a genuinely 1727 * spurious completion which is at least harmless). 1728 * Stub messages that the root complex sends to itself. 1729 * Stub mce/mue/ce/nr/noadverr. 1730 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1731 */ 1732 1733event error.io.pciex.discard_rc@pciexrc; 1734 1735event ereport.io.pciex.noadverr@PCIEXFN{within(5s)}; 1736event ereport.io.pciex.correctable@PCIEXFN{within(5s)}; 1737event ereport.io.pciex.nonfatal@PCIEXFN{within(5s)}; 1738event ereport.io.pciex.a-nonfatal@PCIEXFN{within(5s)}; 1739event ereport.io.pciex.fatal@PCIEXFN{within(5s)}; 1740event ereport.io.pci.nr@PCIEXFN{within(5s)}; 1741event ereport.io.pci.nr@pciexrc{within(5s)}; 1742event ereport.io.pci.ma@pciexrc{within(5s)}; 1743event ereport.io.pci.rta@pciexrc{within(5s)}; 1744event ereport.io.pci.sta@pciexrc{within(5s)}; 1745event ereport.io.pci.dpe@pciexrc{within(5s)}; 1746event ereport.io.pci.mdpe@pciexrc{within(5s)}; 1747event ereport.io.pci.sserr@pciexrc{within(5s)}; 1748event ereport.io.pciex.tl.uc@pciexrc{within(5s)}; 1749event ereport.io.pciex.noadverr@pciexrc{within(5s)}; 1750event ereport.io.pciex.a-nonfatal@pciexrc{within(5s)}; 1751event ereport.io.pciex.rc.ce-msg@pciexrc{within(5s)}; 1752event ereport.io.pciex.rc.mce-msg@pciexrc{within(5s)}; 1753 1754event upset.io.pciex.discard_uc@PCIEXFN; 1755event upset.io.pciex.discard@PCIEXFN; 1756event upset.io.pciex.discard@pciexrc; 1757 1758prop upset.io.pciex.discard_uc@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1759 ereport.io.pciex.tl.uc@PCIEXFN; 1760 1761prop upset.io.pciex.discard_uc@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1762 ereport.io.pciex.tl.uc@PCIEXFN; 1763 1764prop upset.io.pciex.discard@PCIEXFN (1)-> 1765 ereport.io.pci.nr@PCIEXFN, 1766 ereport.io.pciex.noadverr@PCIEXFN, 1767 ereport.io.pciex.correctable@PCIEXFN, 1768 ereport.io.pciex.nonfatal@PCIEXFN, 1769 ereport.io.pciex.a-nonfatal@PCIEXFN, 1770 ereport.io.pciex.fatal@PCIEXFN; 1771 1772prop error.io.pciex.discard_rc@pciexrc (0)-> 1773 ereport.io.pciex.rc.mue-msg@pciexrc, 1774 ereport.io.pciex.rc.fe-msg@pciexrc { SOURCE_ID_MATCHES_OWN_BDF }, 1775 ereport.io.pciex.rc.nfe-msg@pciexrc { SOURCE_ID_MATCHES_OWN_BDF }; 1776 1777prop upset.io.pciex.discard@pciexrc (1)-> 1778 error.io.pciex.discard_rc@pciexrc, 1779 ereport.io.pci.nr@pciexrc, 1780 ereport.io.pciex.noadverr@pciexrc, 1781 ereport.io.pciex.a-nonfatal@pciexrc, 1782 ereport.io.pciex.rc.ce-msg@pciexrc, 1783 ereport.io.pciex.rc.mce-msg@pciexrc, 1784 ereport.io.pciex.tl.uc@pciexrc, 1785 ereport.io.pci.ma@pciexrc, 1786 ereport.io.pci.rta@pciexrc, 1787 ereport.io.pci.sta@pciexrc, 1788 ereport.io.pci.dpe@pciexrc, 1789 ereport.io.pci.mdpe@pciexrc, 1790 ereport.io.pci.sserr@pciexrc; 1791 1792/* 1793 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1794 * rules for propagations from child PCI bus 1795 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1796 */ 1797 1798event error.io.pci.retry-to-u@PCIEXFN/PCIFN; 1799event error.io.pci.ma-u@PCIEXFN/PCIFN; 1800event error.io.pci.ta-u@PCIEXFN/PCIFN; 1801event error.io.pci.ape-u@PCIEXFN/PCIFN; 1802event error.io.pci.source-ape-u@PCIFN; 1803event error.io.pci.target-ma-d@PCIFN; 1804event error.io.pci.target-rta-d@PCIFN; 1805event error.io.pci.badreq-pw-u@PCIEXFN/PCIFN; 1806event error.io.pci.badreq-drw-u@PCIEXFN/PCIFN; 1807event error.io.pci.source-perr-u@PCIFN; 1808event error.io.pci.source-dpdata-u@PCIFN; 1809event error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN; 1810event error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN; 1811event error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN; 1812event error.io.pci.perr-pw-u@PCIEXFN/PCIFN; 1813event error.io.pci.perr-dw-u@PCIEXFN/PCIFN; 1814event error.io.pci.perr-dr-u@PCIEXFN/PCIFN; 1815event error.io.pci.serr-u@PCIEXFN/PCIFN; 1816event error.io.pcix.scpe-u@PCIEXFN/PCIFN; 1817event error.io.pcix.source-scpe-u@PCIFN; 1818event error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN; 1819event error.io.pcix.spl-comp-ta-u@PCIEXFN/PCIFN; 1820event error.io.pcix.spl-comp-ma-d@PCIEXFN/PCIFN; 1821event error.io.pcix.spl-comp-ta-d@PCIEXFN/PCIFN; 1822event error.io.pcix.uscmd@PCIEXFN; 1823 1824event ereport.io.pcix.sec-spl-dis@PCIEXFN{within(5s)}; 1825event ereport.io.pciex.bdg.uscmd@PCIEXFN{within(5s)}; 1826event ereport.io.pciex.bdg.sec-perr@PCIEXFN{within(5s)}; 1827event ereport.io.pciex.bdg.sec-uadr@PCIEXFN{within(5s)}; 1828event ereport.io.pciex.bdg.sec-uat@PCIEXFN{within(5s)}; 1829event ereport.io.pciex.bdg.sec-serr@PCIEXFN{within(5s)}; 1830event ereport.io.pciex.bdg.sec-tex@PCIEXFN{within(5s)}; 1831event ereport.io.pciex.bdg.sec-rma@PCIEXFN{within(5s)}; 1832event ereport.io.pciex.bdg.sec-rta@PCIEXFN{within(5s)}; 1833event ereport.io.pciex.bdg.sec-ma-sc@PCIEXFN{within(5s)}; 1834event ereport.io.pciex.bdg.sec-ta-sc@PCIEXFN{within(5s)}; 1835event ereport.io.pci.dto@PCIEXFN{within(5s)}; 1836event ereport.io.pci.sec-rta@PCIEXFN{within(5s)}; 1837event ereport.io.pci.sec-ma@PCIEXFN{within(5s)}; 1838 1839/* 1840 * ma-u will only propagate on to pciex bus for non-posted accesses. It 1841 * is then represented as an unsupported request. 1842 */ 1843prop error.io.pci.ma-u@PCIEXFN/PCIFN (0)-> 1844 ereport.io.pciex.tl.ur@PCIEXFN; 1845 1846prop error.io.pci.ma-u@PCIEXFN/PCIFN { is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 1847 ereport.io.pci.sec-ma@pciexrc; 1848 1849prop error.io.pci.ma-u@PCIEXFN/PCIFN (2)-> 1850 ereport.io.pci.sec-ma@PCIEXFN, 1851 error.io.pciex.nonfatal@PCIEXFN; 1852 1853prop error.io.pci.target-ma-d@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1854 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1855 ereport.io.pciex.bdg.sec-rma@PCIEXFN; 1856 1857/* 1858 * ta-u will only propagate on to pciex bus for non-posted accesses. It is 1859 * then represented as a completer abort. 1860 */ 1861prop error.io.pci.ta-u@PCIEXFN/PCIFN (0)-> 1862 ereport.io.pci.sta@PCIEXFN, 1863 ereport.io.pciex.tl.ca@PCIEXFN; 1864 1865prop error.io.pci.ta-u@PCIEXFN/PCIFN { is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 1866 ereport.io.pci.sec-rta@pciexrc; 1867 1868prop error.io.pci.ta-u@PCIEXFN/PCIFN (2)-> 1869 ereport.io.pci.sec-rta@PCIEXFN, 1870 error.io.pciex.nonfatal@PCIEXFN; 1871 1872prop error.io.pci.target-rta-d@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1873 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1874 ereport.io.pciex.bdg.sec-rta@PCIEXFN; 1875 1876/* 1877 * PERR# on a delayed write is represented as an unsupported request 1878 */ 1879prop error.io.pci.perr-dw-u@PCIEXFN/PCIFN (1)-> 1880 ereport.io.pci.sec-mdpe@PCIEXFN; 1881 1882prop error.io.pci.perr-dw-u@PCIEXFN/PCIFN (0)-> 1883 error.io.pciex.flt-ur-u@PCIEXFN; 1884 1885prop error.io.pci.perr-pw-u@PCIEXFN/PCIFN (1)-> 1886 ereport.io.pci.sec-mdpe@PCIEXFN; 1887 1888prop error.io.pci.perr-pw-u@PCIEXFN/PCIFN (0)-> 1889 error.io.pciex.nonfatal@PCIEXFN; 1890 1891prop error.io.pci.perr-dr-u@PCIEXFN/PCIFN (1)-> 1892 error.io.pciex.nonfatal@PCIEXFN; 1893 1894prop error.io.pci.source-perr-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1895 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1896 ereport.io.pciex.bdg.sec-perr@PCIEXFN; 1897 1898/* 1899 * If the bridge receives data with bad ecc/parity from pci/pci-x, it will 1900 * propagate onto pci express as a poisoned tlp 1901 */ 1902prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (2)-> 1903 ereport.io.pci.sec-dpe@PCIEXFN, 1904 error.io.pciex.poiscomp-u@PCIEXFN; 1905 1906prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (0)-> 1907 error.io.pciex.nonfatal@PCIEXFN; 1908 1909prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (1)-> 1910 ereport.io.pci.sec-mdpe@PCIEXFN, 1911 ereport.io.pci.mdpe@PCIEXFN; 1912 1913prop error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN (1)-> 1914 ereport.io.pci.sec-dpe@PCIEXFN; 1915 1916prop error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN (0)-> 1917 error.io.pciex.nonfatal@PCIEXFN, 1918 error.io.pciex.poisreq-u@PCIEXFN, 1919 ereport.io.pci.ma@PCIEXFN, 1920 ereport.io.pci.sec-sta@PCIEXFN, 1921 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1922 1923prop error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN (2)-> 1924 ereport.io.pci.sec-dpe@PCIEXFN, 1925 error.io.pciex.poisreq-u@PCIEXFN; 1926 1927prop error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN (0)-> 1928 error.io.pciex.nonfatal@PCIEXFN, 1929 ereport.io.pci.ma@PCIEXFN; 1930 1931prop error.io.pci.source-dpdata-u@PCIFN { is_under(pciexrc, PCIFN) } (0)-> 1932 ereport.io.pciex.tl.ptlp@pciexrc, 1933 ereport.io.pciex.tl.ur@pciexrc; 1934 1935prop error.io.pci.source-dpdata-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) 1936 && SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1937 ereport.io.pciex.bdg.sec-ude@PCIEXFN; 1938 1939/* 1940 * If the bridge sees an address or attribute parity error it is considered 1941 * a fatal error. 1942 */ 1943prop error.io.pci.ape-u@PCIEXFN/PCIFN (2)-> 1944 ereport.io.pci.sec-dpe@PCIEXFN, 1945 error.io.pciex.fatal@PCIEXFN; 1946 1947prop error.io.pci.source-ape-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1948 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1949 ereport.io.pciex.bdg.sec-uat@PCIEXFN, 1950 ereport.io.pciex.bdg.sec-uadr@PCIEXFN; 1951 1952prop error.io.pci.ape-u@PCIEXFN/PCIFN (0)-> 1953 ereport.io.pci.sec-rserr@PCIEXFN, 1954 ereport.io.pciex.bdg.sec-serr@PCIEXFN, 1955 ereport.io.pci.sec-sta@PCIEXFN; 1956 1957/* 1958 * If the bridge sees a split completion error (pci-x only) it could 1959 * result in a number of things 1960 * - unrecovered split completion message data error (uscmd). This would 1961 * happen on a pio write. A completer abort is returned to the initiator. 1962 * - for various faults in the split completion (eg address parity error) 1963 * we will respond with a target abort (which the child device will treat 1964 * as a split completion ta) 1965 * - for other faults we can't tell who send the split completion and so 1966 * just drop the request (which the child device sees as a split 1967 * completion ma) 1968 */ 1969prop error.io.pcix.scpe-u@PCIEXFN/PCIFN (0)-> 1970 ereport.io.pci.sec-dpe@PCIEXFN, 1971 ereport.io.pci.sec-rserr@PCIEXFN, 1972 ereport.io.pciex.bdg.sec-serr@PCIEXFN, 1973 ereport.io.pci.sec-sta@PCIEXFN, 1974 error.io.pciex.fatal@PCIEXFN; 1975 1976prop error.io.pcix.source-scpe-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1977 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1978 ereport.io.pciex.bdg.sec-uat@PCIEXFN, 1979 ereport.io.pciex.bdg.sec-uadr@PCIEXFN; 1980 1981prop error.io.pcix.scpe-u@PCIEXFN/PCIFN (1)-> 1982 error.io.pcix.uscmd@PCIEXFN, 1983 error.io.pcix.spl-comp-ma-d@PCIEXFN/PCIFN, 1984 error.io.pcix.spl-comp-ta-d@PCIEXFN/PCIFN; 1985 1986prop error.io.pcix.uscmd@PCIEXFN (4)-> 1987 error.io.pciex.fatal@PCIEXFN, 1988 ereport.io.pci.sta@PCIEXFN, 1989 ereport.io.pciex.tl.ca@PCIEXFN, 1990 ereport.io.pciex.bdg.uscmd@PCIEXFN; 1991 1992prop error.io.pcix.uscmd@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)-> 1993 ereport.io.pci.sec-rta@pciexrc; 1994 1995/* 1996 * Similarly a child device may have responded with a master abort or 1997 * target abort to one of our split competions. The hardware just logs these. 1998 */ 1999prop error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN (3)-> 2000 error.io.pciex.nonfatal@PCIEXFN, 2001 ereport.io.pcix.sec-spl-dis@PCIEXFN, 2002 ereport.io.pciex.bdg.sec-ma-sc@PCIEXFN; 2003 2004prop error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN (0)-> 2005 ereport.io.pci.sec-ma@PCIEXFN; 2006 2007prop error.io.pcix.spl-comp-ta-u@PCIEXFN/PCIFN (4)-> 2008 error.io.pciex.nonfatal@PCIEXFN, 2009 ereport.io.pcix.sec-spl-dis@PCIEXFN, 2010 ereport.io.pciex.bdg.sec-ta-sc@PCIEXFN, 2011 ereport.io.pci.sec-rta@PCIEXFN; 2012 2013/* 2014 * SERR# is considered fatal 2015 */ 2016prop error.io.pci.serr-u@PCIEXFN/PCIFN (3)-> 2017 error.io.pciex.fatal@PCIEXFN, 2018 ereport.io.pci.sec-rserr@PCIEXFN, 2019 ereport.io.pciex.bdg.sec-serr@PCIEXFN; 2020 2021/* 2022 * Retry time-out is nonfatal. The initial requester has stopped retrying so 2023 * there's nothing else the hardware can do but flag the error. 2024 */ 2025prop error.io.pci.retry-to-u@PCIEXFN/PCIFN (2)-> 2026 error.io.pciex.nonfatal@PCIEXFN, 2027 ereport.io.pciex.bdg.sec-tex@PCIEXFN; 2028 2029prop error.io.pci.retry-to-u@PCIEXFN/PCIFN (0)-> 2030 ereport.io.pci.sta@PCIEXFN, 2031 ereport.io.pci.dto@PCIEXFN; 2032 2033prop error.io.pci.retry-to-u@PCIEXFN/PCIFN { 2034 is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 2035 ereport.io.pci.sec-rta@pciexrc; 2036 2037/* 2038 * A bad dma request (eg with invalid address) propagates onto pci express 2039 * as a bad dma request. The end result may be a master abort or target abort 2040 * (depending on whether the child is pci-x or pci). 2041 */ 2042prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN (0)-> 2043 ereport.io.pci.ma@PCIEXFN, 2044 ereport.io.pci.rta@PCIEXFN, 2045 ereport.io.pci.sec-sta@PCIEXFN; 2046 2047prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN { 2048 is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 2049 ereport.io.pciex.tl.ur@pciexrc, 2050 ereport.io.pciex.tl.ca@pciexrc, 2051 ereport.io.pci.sec-sta@pciexrc; 2052 2053prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN { IS_SD(PCIEXFN1) && 2054 is_under(PCIEXFN1, PCIEXFN/PCIFN) } (0)-> 2055 ereport.io.pciex.tl.ur@PCIEXFN1, 2056 ereport.io.pciex.tl.ca@PCIEXFN1, 2057 ereport.io.pci.sec-sta@PCIEXFN1, 2058 error.io.pciex.nonfatal@PCIEXFN1; 2059 2060prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN (0)-> 2061 ereport.io.pci.ma@PCIEXFN, 2062 ereport.io.pci.rta@PCIEXFN, 2063 ereport.io.pci.sec-sta@PCIEXFN; 2064 2065prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN { 2066 is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 2067 ereport.io.pciex.tl.ur@pciexrc, 2068 ereport.io.pciex.tl.ca@pciexrc, 2069 ereport.io.pci.sec-sta@pciexrc; 2070 2071prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN { IS_SD(PCIEXFN1) && 2072 is_under(PCIEXFN1, PCIEXFN/PCIFN) } (0)-> 2073 ereport.io.pciex.tl.ur@PCIEXFN1, 2074 ereport.io.pciex.tl.ca@PCIEXFN1, 2075 ereport.io.pci.sec-sta@PCIEXFN1, 2076 error.io.pciex.nonfatal@PCIEXFN1; 2077 2078/* 2079 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2080 * target- propagations 2081 * 2082 * A Root Complex driver may generate "target-" ereports when knowledge of the 2083 * physical address associated with a fault allows the target device to be 2084 * determined. This is not a requirement of the Diagnosis Engine, but can be 2085 * valuable when available. 2086 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2087 */ 2088event error.io.pci.target-ma-d@PCIEXFN/PCIEXFN; 2089event error.io.pci.target-rta-d@PCIEXFN/PCIEXFN; 2090event error.io.pci.target-ma-d@PCIEXFN/PCIFN; 2091event error.io.pci.target-rta-d@PCIEXFN/PCIFN; 2092 2093event ereport.io.pci.target-rta@PCIEXFN{within(5s)}; 2094event ereport.io.pci.target-ma@PCIEXFN{within(5s)}; 2095 2096prop error.io.pci.target-ma-d@PCIEXFN (1)-> 2097 error.io.pci.target-ma-d@PCIEXFN/PCIEXFNHZ; 2098 2099prop error.io.pci.target-ma-d@PCIEXFN (1)-> 2100 error.io.pci.target-ma-d@PCIEXFN/PCIFNHZ; 2101 2102prop error.io.pci.target-ma-d@PCIEXFN (0)-> 2103 ereport.io.pci.target-ma@PCIEXFN; 2104 2105prop error.io.pci.target-rta-d@PCIEXFN (1)-> 2106 error.io.pci.target-rta-d@PCIEXFN/PCIEXFNHZ; 2107 2108prop error.io.pci.target-rta-d@PCIEXFN (1)-> 2109 error.io.pci.target-rta-d@PCIEXFN/PCIFNHZ; 2110 2111prop error.io.pci.target-rta-d@PCIEXFN (0)-> 2112 ereport.io.pci.target-rta@PCIEXFN; 2113 2114/* 2115 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2116 * stub unused pciex-pci bridge ereports 2117 * - ignore usc/sec-unex-spl 2118 * - ignore sec-spl-or/sec-spl-dly as these aren't really faults (tuning info) 2119 * - ignore ecc.ue ereports (we get everything we need from dpe/mdpe) 2120 * - ignore ecc.ce ereports for now (could do serd on these) 2121 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2122 */ 2123 2124event ereport.io.pciex.bdg.usc@PCIEXFN{within(5s)}; 2125event ereport.io.pcix.sec-unex-spl@PCIEXFN{within(5s)}; 2126event ereport.io.pcix.sec-spl-or@PCIEXFN{within(5s)}; 2127event ereport.io.pcix.sec-spl-dly@PCIEXFN{within(5s)}; 2128event ereport.io.pcix.sec-ecc.ce-addr@PCIEXFN{within(5s)}; 2129event ereport.io.pcix.sec-ecc.ce-attr@PCIEXFN{within(5s)}; 2130event ereport.io.pcix.sec-ecc.ce-data@PCIEXFN{within(5s)}; 2131event ereport.io.pcix.sec-ecc.ue-addr@PCIEXFN{within(5s)}; 2132event ereport.io.pcix.sec-ecc.ue-attr@PCIEXFN{within(5s)}; 2133event ereport.io.pcix.sec-ecc.ue-data@PCIEXFN{within(5s)}; 2134event ereport.io.pcix.sec-s-ce@PCIEXFN{within(5s)}; 2135event ereport.io.pcix.sec-s-ue@PCIEXFN{within(5s)}; 2136 2137event upset.io.pciex.discard-bdg@PCIEXFN; 2138 2139prop upset.io.pciex.discard-bdg@PCIEXFN (1)-> 2140 ereport.io.pciex.bdg.usc@PCIEXFN, 2141 ereport.io.pcix.sec-unex-spl@PCIEXFN, 2142 ereport.io.pcix.sec-spl-or@PCIEXFN, 2143 ereport.io.pcix.sec-spl-dly@PCIEXFN, 2144 ereport.io.pcix.sec-ecc.ce-addr@PCIEXFN, 2145 ereport.io.pcix.sec-ecc.ce-attr@PCIEXFN, 2146 ereport.io.pcix.sec-ecc.ce-data@PCIEXFN, 2147 ereport.io.pcix.sec-ecc.ue-addr@PCIEXFN, 2148 ereport.io.pcix.sec-ecc.ue-attr@PCIEXFN, 2149 ereport.io.pcix.sec-ecc.ue-data@PCIEXFN, 2150 ereport.io.pcix.sec-s-ce@PCIEXFN, 2151 ereport.io.pcix.sec-s-ue@PCIEXFN; 2152