1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_MACHSYSTM_H 27 #define _SYS_MACHSYSTM_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 /* 32 * Numerous platform-dependent interfaces that don't seem to belong 33 * in any other header file. 34 * 35 * This file should not be included by code that purports to be 36 * platform-independent. 37 */ 38 39 #ifndef _ASM 40 #include <sys/types.h> 41 #include <sys/scb.h> 42 #include <sys/varargs.h> 43 #include <sys/machparam.h> 44 #include <sys/thread.h> 45 #include <vm/seg_enum.h> 46 #include <sys/processor.h> 47 #include <sys/sunddi.h> 48 #include <sys/memlist.h> 49 #endif /* _ASM */ 50 51 #ifdef __cplusplus 52 extern "C" { 53 #endif 54 55 #ifdef _KERNEL 56 57 #ifndef _ASM 58 /* 59 * The following enum types determine how interrupts are distributed 60 * on a sun4u system. 61 */ 62 enum intr_policies { 63 /* 64 * Target interrupt at the CPU running the add_intrspec 65 * thread. Also used to target all interrupts at the panicing 66 * CPU. 67 */ 68 INTR_CURRENT_CPU = 0, 69 70 /* 71 * Target all interrupts at the boot cpu 72 */ 73 INTR_BOOT_CPU, 74 75 /* 76 * Flat distribution of all interrupts 77 */ 78 INTR_FLAT_DIST, 79 80 /* 81 * Weighted distribution of all interrupts 82 */ 83 INTR_WEIGHTED_DIST 84 }; 85 86 87 /* 88 * Structure that defines the interrupt distribution list. It contains 89 * enough info about the interrupt so that it can callback the parent 90 * nexus driver and retarget the interrupt to a different CPU. 91 */ 92 struct intr_dist { 93 struct intr_dist *next; /* link to next in list */ 94 void (*func)(void *); /* Callback function */ 95 void *arg; /* Nexus parent callback arg 1 */ 96 }; 97 98 /* 99 * Miscellaneous cpu_state changes 100 */ 101 extern void power_down(const char *); 102 extern void do_shutdown(void); 103 104 /* 105 * Number of seconds until power is shut off 106 */ 107 extern int thermal_powerdown_delay; 108 109 110 /* 111 * prom-related 112 */ 113 extern int obpdebug; 114 extern int forthdebug_supported; 115 extern uint_t tba_taken_over; 116 extern void forthdebug_init(void); 117 extern void init_vx_handler(void); 118 extern void kern_preprom(void); 119 extern void kern_postprom(void); 120 121 /* 122 * externally (debugger or prom) initiated panic 123 */ 124 extern struct regs sync_reg_buf; 125 extern uint64_t sync_tt; 126 extern void sync_handler(void); 127 128 /* 129 * Trap-related 130 */ 131 struct regs; 132 extern void trap(struct regs *rp, caddr_t addr, uint32_t type, 133 uint32_t mmu_fsr); 134 extern void *get_tba(void); 135 extern void *set_tba(void *); 136 extern caddr_t set_trap_table(void); 137 extern struct scb trap_table; 138 139 struct trap_info { 140 struct regs *trap_regs; 141 uint_t trap_type; 142 caddr_t trap_addr; 143 uint_t trap_mmu_fsr; 144 }; 145 146 /* 147 * misc. primitives 148 */ 149 #define PROM_CFGHDL_TO_CPUID(x) (x & ~(0xful << 28)) 150 151 extern void debug_flush_windows(void); 152 extern void flush_windows(void); 153 extern int getprocessorid(void); 154 extern void reestablish_curthread(void); 155 156 extern void stphys(uint64_t physaddr, int value); 157 extern int ldphys(uint64_t physaddr); 158 extern void stdphys(uint64_t physaddr, uint64_t value); 159 extern uint64_t lddphys(uint64_t physaddr); 160 161 extern void stphysio(u_longlong_t physaddr, uint_t value); 162 extern uint_t ldphysio(u_longlong_t physaddr); 163 extern void sthphysio(u_longlong_t physaddr, ushort_t value); 164 extern ushort_t ldhphysio(u_longlong_t physaddr); 165 extern void stbphysio(u_longlong_t physaddr, uchar_t value); 166 extern uchar_t ldbphysio(u_longlong_t physaddr); 167 extern void stdphysio(u_longlong_t physaddr, u_longlong_t value); 168 extern u_longlong_t lddphysio(u_longlong_t physaddr); 169 170 extern int pf_is_dmacapable(pfn_t); 171 172 extern int dip_to_cpu_id(dev_info_t *dip, processorid_t *cpu_id); 173 174 extern void set_cmp_error_steering(void); 175 176 /* 177 * SPARCv9 %ver register and field definitions 178 */ 179 180 #define ULTRA_VER_MANUF(x) ((x) >> 48) 181 #define ULTRA_VER_IMPL(x) (((x) >> 32) & 0xFFFF) 182 #define ULTRA_VER_MASK(x) (((x) >> 24) & 0xFF) 183 184 extern uint64_t ultra_getver(void); 185 186 /* 187 * bootup-time 188 */ 189 extern int ncpunode; 190 extern int niobus; 191 192 extern void segnf_init(void); 193 extern void kern_setup1(void); 194 extern void startup(void); 195 extern void post_startup(void); 196 extern void install_va_to_tte(void); 197 extern void setwstate(uint_t); 198 extern void create_va_to_tte(void); 199 extern int memscrub_init(void); 200 201 extern void kcpc_hw_init(void); 202 extern void kcpc_hw_startup_cpu(ushort_t); 203 extern int kcpc_hw_load_pcbe(void); 204 205 /* 206 * Interrupts 207 */ 208 struct cpu; 209 extern struct cpu cpu0; 210 extern size_t intr_add_pools; 211 extern struct intr_req *intr_add_head; 212 extern struct intr_req *intr_add_tail; 213 extern struct scb *set_tbr(struct scb *); 214 215 extern uint_t disable_vec_intr(void); 216 extern void enable_vec_intr(uint_t); 217 extern void setintrenable(int); 218 219 extern void intr_dist_add(void (*f)(void *), void *); 220 extern void intr_dist_rem(void (*f)(void *), void *); 221 extern void intr_dist_add_weighted(void (*f)(void *, int32_t, int32_t), void *); 222 extern void intr_dist_rem_weighted(void (*f)(void *, int32_t, int32_t), void *); 223 224 extern uint32_t intr_dist_cpuid(void); 225 extern uint32_t intr_dist_mycpuid(void); 226 227 void intr_dist_cpuid_add_device_weight(uint32_t cpuid, dev_info_t *dip, 228 int32_t weight); 229 void intr_dist_cpuid_rem_device_weight(uint32_t cpuid, dev_info_t *dip); 230 231 extern void intr_redist_all_cpus(void); 232 extern void intr_redist_all_cpus_shutdown(void); 233 234 extern void send_dirint(int, int); 235 extern void setsoftint(uint_t); 236 extern void setsoftint_tl1(uint64_t, uint64_t); 237 extern void siron(void); 238 extern void intr_enqueue_req(uint_t pil, uint32_t inum); 239 extern void intr_dequeue_req(uint_t pil, uint32_t inum); 240 extern void wr_clr_softint(uint_t); 241 242 /* 243 * Time- and %tick-related 244 */ 245 extern hrtime_t rdtick(void); 246 extern void tick_write_delta(uint64_t); 247 extern void tickcmpr_set(uint64_t); 248 extern void tickcmpr_reset(void); 249 extern void tickcmpr_disable(void); 250 extern int tickcmpr_disabled(void); 251 extern uint32_t cbe_level14_inum; 252 253 /* 254 * contiguous memory 255 */ 256 extern void *contig_mem_alloc(size_t); 257 extern void *contig_mem_alloc_align(size_t, size_t); 258 extern void contig_mem_free(void *, size_t); 259 260 /* 261 * Caches 262 */ 263 extern int vac; 264 extern int cache; 265 extern int use_mp; 266 extern uint_t vac_mask; 267 extern uint64_t ecache_flushaddr; 268 extern int ecache_alignsize; /* Maximum ecache linesize for struct align */ 269 extern int ecache_setsize; /* Maximum ecache setsize possible */ 270 extern int cpu_setsize; /* Maximum ecache setsize of configured cpus */ 271 272 /* 273 * VM 274 */ 275 extern int do_pg_coloring; 276 extern int do_virtual_coloring; 277 extern int use_page_coloring; 278 extern int use_virtual_coloring; 279 extern uint_t vac_colors_mask; 280 281 extern void ndata_alloc_init(struct memlist *, uintptr_t, uintptr_t); 282 extern void *ndata_alloc(struct memlist *, size_t, size_t); 283 extern void *ndata_extra_base(struct memlist *, size_t); 284 extern size_t ndata_maxsize(struct memlist *); 285 extern size_t ndata_spare(struct memlist *, size_t, size_t); 286 extern caddr_t get_mmfsa_scratchpad(void); 287 extern void set_mmfsa_scratchpad(caddr_t); 288 extern int ndata_alloc_mmfsa(struct memlist *); 289 extern int ndata_alloc_cpus(struct memlist *); 290 extern int ndata_alloc_page_freelists(struct memlist *, int); 291 extern int ndata_alloc_dmv(struct memlist *); 292 extern int ndata_alloc_tsbs(struct memlist *, pgcnt_t); 293 extern int ndata_alloc_hat(struct memlist *, pgcnt_t, pgcnt_t); 294 extern caddr_t alloc_page_freelists(int, caddr_t, int); 295 extern caddr_t alloc_hme_buckets(caddr_t, int); 296 extern size_t page_ctrs_sz(void); 297 extern caddr_t page_ctrs_alloc(caddr_t); 298 extern void page_freelist_coalesce_all(int); 299 extern void ppmapinit(void); 300 extern void hwblkpagecopy(const void *, void *); 301 extern void hw_pa_bcopy32(uint64_t, uint64_t); 302 303 extern int pp_slots; 304 extern int pp_consistent_coloring; 305 306 /* 307 * ppcopy/hwblkpagecopy interaction. See ppage.c. 308 */ 309 #define PPAGE_STORE_VCOLORING 0x1 /* use vcolors to maintain consistency */ 310 #define PPAGE_LOAD_VCOLORING 0x2 /* use vcolors to maintain consistency */ 311 #define PPAGE_STORES_POLLUTE 0x4 /* stores pollute VAC */ 312 #define PPAGE_LOADS_POLLUTE 0x8 /* loads pollute VAC */ 313 314 /* 315 * VIS-accelerated copy/zero 316 */ 317 extern int use_hw_bcopy; 318 extern uint_t hw_copy_limit_1; 319 extern uint_t hw_copy_limit_2; 320 extern uint_t hw_copy_limit_4; 321 extern uint_t hw_copy_limit_8; 322 extern int use_hw_bzero; 323 324 #ifdef CHEETAH 325 #define VIS_COPY_THRESHOLD 256 326 #else 327 #define VIS_COPY_THRESHOLD 900 328 #endif 329 330 /* 331 * MP 332 */ 333 extern void idle_other_cpus(void); 334 extern void resume_other_cpus(void); 335 extern void stop_other_cpus(void); 336 extern void idle_stop_xcall(void); 337 extern void set_idle_cpu(int); 338 extern void unset_idle_cpu(int); 339 extern void mp_cpu_quiesce(struct cpu *); 340 extern int stopcpu_bycpuid(int); 341 342 /* 343 * Panic at TL > 0 344 */ 345 extern uint64_t cpu_pa[]; 346 extern void ptl1_init_cpu(struct cpu *); 347 348 /* 349 * Defines for DR interfaces 350 */ 351 #define DEVI_BRANCH_CHILD 0x01 /* Walk immediate children of root */ 352 #define DEVI_BRANCH_CONFIGURE 0x02 /* Configure branch after create */ 353 #define DEVI_BRANCH_DESTROY 0x04 /* Destroy branch after unconfigure */ 354 #define DEVI_BRANCH_EVENT 0x08 /* Post NDI event */ 355 #define DEVI_BRANCH_PROM 0x10 /* Branches derived from PROM nodes */ 356 #define DEVI_BRANCH_SID 0x20 /* SID node branches */ 357 #define DEVI_BRANCH_ROOT 0x40 /* Node is the root of a branch */ 358 359 typedef struct devi_branch { 360 void *arg; 361 void (*devi_branch_callback)(dev_info_t *, void *, uint_t); 362 int type; 363 union { 364 int (*prom_branch_select)(pnode_t, void *, uint_t); 365 int (*sid_branch_create)(dev_info_t *, void *, uint_t); 366 } create; 367 } devi_branch_t; 368 369 370 /* 371 * Prototypes which really belongs to sunddi.c, and should be moved to 372 * sunddi.c if there is another platform using these calls. 373 */ 374 extern int e_ddi_branch_create(dev_info_t *pdip, devi_branch_t *bp, 375 dev_info_t **dipp, uint_t flags); 376 extern int e_ddi_branch_configure(dev_info_t *rdip, dev_info_t **dipp, 377 uint_t flags); 378 extern int e_ddi_branch_unconfigure(dev_info_t *rdip, dev_info_t **dipp, 379 uint_t flags); 380 extern int e_ddi_branch_destroy(dev_info_t *rdip, dev_info_t **dipp, 381 uint_t flags); 382 extern void e_ddi_branch_hold(dev_info_t *rdip); 383 extern void e_ddi_branch_rele(dev_info_t *rdip); 384 extern int e_ddi_branch_held(dev_info_t *rdip); 385 extern int e_ddi_branch_referenced(dev_info_t *rdip, 386 int (*cb)(dev_info_t *dip, void *, uint_t), void *arg); 387 388 /* 389 * Constants which define the "hole" in the 64-bit sfmmu address space. 390 * These are set to specific values by the CPU module code. 391 */ 392 extern caddr_t hole_start, hole_end; 393 394 /* kpm mapping window */ 395 extern size_t kpm_size; 396 extern uchar_t kpm_size_shift; 397 extern caddr_t kpm_vbase; 398 399 #define INVALID_VADDR(a) (((a) >= hole_start && (a) < hole_end)) 400 #define VA_ADDRESS_SPACE_BITS 64 401 #define RA_ADDRESS_SPACE_BITS 56 402 #define MAX_REAL_ADDRESS (1ull << RA_ADDRESS_SPACE_BITS) 403 #define DEFAULT_VA_ADDRESS_SPACE_BITS 48 /* def. Niagara (broken MD) */ 404 #define PAGESIZE_MASK_BITS 16 405 #define MAX_PAGESIZE_MASK ((1<<PAGESIZE_MASK_BITS) - 1) 406 407 extern void adjust_hw_copy_limits(int); 408 409 struct kdi; 410 411 void cpu_kdi_init(struct kdi *); 412 413 /* 414 * flush instruction and data caches 415 */ 416 void kdi_flush_caches(void); 417 418 struct async_flt; 419 420 /* 421 * take pending fp traps if fpq present 422 * this function is also defined in fpusystm.h 423 */ 424 void syncfpu(void); 425 426 void cpu_flush_ecache(void); 427 void cpu_faulted_enter(struct cpu *); 428 void cpu_faulted_exit(struct cpu *); 429 430 int cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar, 431 char *buf, int buflen, int *lenp); 432 int cpu_get_mem_info(uint64_t synd, uint64_t afar, 433 uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep, 434 int *segsp, int *banksp, int *mcidp); 435 size_t cpu_get_name_bufsize(); 436 437 /* 438 * ecache scrub operations 439 */ 440 void cpu_init_cache_scrub(void); 441 442 /* 443 * clock/tick register operations 444 */ 445 void cpu_init_tick_freq(void); 446 447 /* 448 * stick synchronization 449 */ 450 void sticksync_slave(void); 451 void sticksync_master(void); 452 453 #endif /* _ASM */ 454 455 /* 456 * Actions for set_error_enable_tl1 457 */ 458 #define EER_SET_ABSOLUTE 0x0 459 #define EER_SET_SETBITS 0x1 460 #define EER_SET_CLRBITS 0x2 461 462 /* 463 * HVDUMP_SIZE_MAX set as 64k due to limitiation by intrq_alloc() 464 */ 465 466 #define HVDUMP_SIZE_MAX 0x10000 467 #define HVDUMP_SIZE_DEFAULT 0x8000 468 469 /* 470 * HV TOD service retry in usecs 471 */ 472 473 #define HV_TOD_RETRY_THRESH 100 474 #define HV_TOD_WAIT_USEC 5 475 476 /* 477 * Interrupt Queues and Error Queues 478 */ 479 480 #define INTR_CPU_Q 0x3c 481 #define INTR_DEV_Q 0x3d 482 #define CPU_RQ 0x3e 483 #define CPU_NRQ 0x3f 484 #define DEFAULT_CPU_Q_ENTRIES 0x100 485 #define DEFAULT_DEV_Q_ENTRIES 0x100 486 #define INTR_REPORT_SIZE 64 487 488 #ifndef _ASM 489 extern uint64_t cpu_q_entries; 490 extern uint64_t dev_q_entries; 491 extern uint64_t cpu_rq_entries; 492 extern uint64_t cpu_nrq_entries; 493 #endif /* _ASM */ 494 495 #endif /* _KERNEL */ 496 497 #ifdef __cplusplus 498 } 499 #endif 500 501 #endif /* _SYS_MACHSYSTM_H */ 502