xref: /titanic_50/usr/src/uts/sun4v/os/mach_cpu_states.c (revision 1d03c31e0733adea0edef54f0d5d2ea9639ecd2a)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #pragma ident	"%Z%%M%	%I%	%E% SMI"
27 
28 #include <sys/types.h>
29 #include <sys/systm.h>
30 #include <sys/archsystm.h>
31 #include <sys/t_lock.h>
32 #include <sys/uadmin.h>
33 #include <sys/panic.h>
34 #include <sys/reboot.h>
35 #include <sys/autoconf.h>
36 #include <sys/machsystm.h>
37 #include <sys/promif.h>
38 #include <sys/membar.h>
39 #include <vm/hat_sfmmu.h>
40 #include <sys/cpu_module.h>
41 #include <sys/cpu_sgnblk_defs.h>
42 #include <sys/intreg.h>
43 #include <sys/consdev.h>
44 #include <sys/kdi_impl.h>
45 #include <sys/traptrace.h>
46 #include <sys/hypervisor_api.h>
47 #include <sys/vmsystm.h>
48 #include <sys/dtrace.h>
49 #include <sys/xc_impl.h>
50 #include <sys/callb.h>
51 #include <sys/mdesc.h>
52 #include <sys/mach_descrip.h>
53 #include <sys/wdt.h>
54 #include <sys/soft_state.h>
55 #include <sys/promimpl.h>
56 #include <sys/hsvc.h>
57 #include <sys/ldoms.h>
58 
59 /*
60  * hvdump_buf_va is a pointer to the currently-configured hvdump_buf.
61  * A value of NULL indicates that this area is not configured.
62  * hvdump_buf_sz is tunable but will be clamped to HVDUMP_SIZE_MAX.
63  */
64 
65 caddr_t hvdump_buf_va;
66 uint64_t hvdump_buf_sz = HVDUMP_SIZE_DEFAULT;
67 static uint64_t hvdump_buf_pa;
68 
69 u_longlong_t panic_tick;
70 
71 extern u_longlong_t gettick();
72 static void reboot_machine(char *);
73 static void update_hvdump_buffer(void);
74 
75 /*
76  * For xt_sync synchronization.
77  */
78 extern uint64_t xc_tick_limit;
79 extern uint64_t xc_tick_jump_limit;
80 
81 /*
82  * We keep our own copies, used for cache flushing, because we can be called
83  * before cpu_fiximpl().
84  */
85 static int kdi_dcache_size;
86 static int kdi_dcache_linesize;
87 static int kdi_icache_size;
88 static int kdi_icache_linesize;
89 
90 /*
91  * Assembly support for generic modules in sun4v/ml/mach_xc.s
92  */
93 extern void init_mondo_nocheck(xcfunc_t *func, uint64_t arg1, uint64_t arg2);
94 extern void kdi_flush_idcache(int, int, int, int);
95 extern uint64_t get_cpuaddr(uint64_t, uint64_t);
96 
97 
98 #define	BOOT_CMD_MAX_LEN	256
99 #define	BOOT_CMD_BASE		"boot "
100 
101 /*
102  * In an LDoms system we do not save the user's boot args in NVRAM
103  * as is done on legacy systems.  Instead, we format and send a
104  * 'reboot-command' variable to the variable service.  The contents
105  * of the variable are retrieved by OBP and used verbatim for
106  * the next boot.
107  */
108 static void
109 store_boot_cmd(char *args)
110 {
111 	static char	cmd_buf[BOOT_CMD_MAX_LEN];
112 	size_t		len;
113 	pnode_t		node;
114 	size_t		base_len;
115 	size_t		args_len;
116 	size_t		args_max;
117 
118 	(void) strcpy(cmd_buf, BOOT_CMD_BASE);
119 
120 	base_len = strlen(BOOT_CMD_BASE);
121 	len = base_len + 1;
122 
123 	if (args != NULL) {
124 		args_len = strlen(args);
125 		args_max = BOOT_CMD_MAX_LEN - len;
126 
127 		if (args_len > args_max) {
128 			cmn_err(CE_WARN, "Reboot command too long (%ld), "
129 			    "truncating command arguments", len + args_len);
130 
131 			args_len = args_max;
132 		}
133 
134 		len += args_len;
135 		(void) strncpy(&cmd_buf[base_len], args, args_len);
136 	}
137 
138 	node = prom_optionsnode();
139 	if ((node == OBP_NONODE) || (node == OBP_BADNODE) ||
140 	    prom_setprop(node, "reboot-command", cmd_buf, len) == -1)
141 		cmn_err(CE_WARN, "Unable to store boot command for "
142 		    "use on reboot");
143 }
144 
145 
146 /*
147  * Machine dependent code to reboot.
148  *
149  * "bootstr", when non-null, points to a string to be used as the
150  * argument string when rebooting.
151  *
152  * "invoke_cb" is a boolean. It is set to true when mdboot() can safely
153  * invoke CB_CL_MDBOOT callbacks before shutting the system down, i.e. when
154  * we are in a normal shutdown sequence (interrupts are not blocked, the
155  * system is not panic'ing or being suspended).
156  */
157 /*ARGSUSED*/
158 void
159 mdboot(int cmd, int fcn, char *bootstr, boolean_t invoke_cb)
160 {
161 	extern void pm_cfb_check_and_powerup(void);
162 
163 	/*
164 	 * XXX - rconsvp is set to NULL to ensure that output messages
165 	 * are sent to the underlying "hardware" device using the
166 	 * monitor's printf routine since we are in the process of
167 	 * either rebooting or halting the machine.
168 	 */
169 	rconsvp = NULL;
170 
171 	switch (fcn) {
172 	case AD_HALT:
173 	case AD_POWEROFF:
174 		break;
175 	default:
176 		if (bootstr == NULL) {
177 			switch (fcn) {
178 
179 			case AD_BOOT:
180 				bootstr = "";
181 				break;
182 
183 			case AD_IBOOT:
184 				bootstr = "-a";
185 				break;
186 
187 			case AD_SBOOT:
188 				bootstr = "-s";
189 				break;
190 
191 			case AD_SIBOOT:
192 				bootstr = "-sa";
193 				break;
194 			default:
195 				cmn_err(CE_WARN,
196 				    "mdboot: invalid function %d", fcn);
197 				bootstr = "";
198 				break;
199 			}
200 		}
201 	}
202 
203 	/*
204 	 * If LDoms is running, we must save the boot string before we
205 	 * enter restricted mode.  This is possible only if we are not
206 	 * being called from panic.
207 	 */
208 	if (domaining_enabled() && invoke_cb)
209 		store_boot_cmd(bootstr);
210 
211 	/*
212 	 * At a high interrupt level we can't:
213 	 *	1) bring up the console
214 	 * or
215 	 *	2) wait for pending interrupts prior to redistribution
216 	 *	   to the current CPU
217 	 *
218 	 * so we do them now.
219 	 */
220 	pm_cfb_check_and_powerup();
221 
222 	/* make sure there are no more changes to the device tree */
223 	devtree_freeze();
224 
225 	if (invoke_cb)
226 		(void) callb_execute_class(CB_CL_MDBOOT, NULL);
227 
228 	/*
229 	 * Clear any unresolved UEs from memory.
230 	 */
231 	page_retire_mdboot();
232 
233 	/*
234 	 * stop other cpus which also raise our priority. since there is only
235 	 * one active cpu after this, and our priority will be too high
236 	 * for us to be preempted, we're essentially single threaded
237 	 * from here on out.
238 	 */
239 	stop_other_cpus();
240 
241 	/*
242 	 * try and reset leaf devices.  reset_leaves() should only
243 	 * be called when there are no other threads that could be
244 	 * accessing devices
245 	 */
246 	reset_leaves();
247 
248 	watchdog_clear();
249 
250 	if (fcn == AD_HALT) {
251 		mach_set_soft_state(SIS_TRANSITION,
252 		    &SOLARIS_SOFT_STATE_HALT_MSG);
253 		halt((char *)NULL);
254 	} else if (fcn == AD_POWEROFF) {
255 		mach_set_soft_state(SIS_TRANSITION,
256 		    &SOLARIS_SOFT_STATE_POWER_MSG);
257 		power_down(NULL);
258 	} else {
259 		mach_set_soft_state(SIS_TRANSITION,
260 		    &SOLARIS_SOFT_STATE_REBOOT_MSG);
261 		reboot_machine(bootstr);
262 	}
263 	/* MAYBE REACHED */
264 }
265 
266 /* mdpreboot - may be called prior to mdboot while root fs still mounted */
267 /*ARGSUSED*/
268 void
269 mdpreboot(int cmd, int fcn, char *bootstr)
270 {
271 }
272 
273 /*
274  * Halt the machine and then reboot with the device
275  * and arguments specified in bootstr.
276  */
277 static void
278 reboot_machine(char *bootstr)
279 {
280 	flush_windows();
281 	stop_other_cpus();		/* send stop signal to other CPUs */
282 	prom_printf("rebooting...\n");
283 	/*
284 	 * For platforms that use CPU signatures, we
285 	 * need to set the signature block to OS and
286 	 * the state to exiting for all the processors.
287 	 */
288 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_REBOOT, -1);
289 	prom_reboot(bootstr);
290 	/*NOTREACHED*/
291 }
292 
293 /*
294  * We use the x-trap mechanism and idle_stop_xcall() to stop the other CPUs.
295  * Once in panic_idle() they raise spl, record their location, and spin.
296  */
297 static void
298 panic_idle(void)
299 {
300 	(void) spl7();
301 
302 	debug_flush_windows();
303 	(void) setjmp(&curthread->t_pcb);
304 
305 	CPU->cpu_m.in_prom = 1;
306 	membar_stld();
307 
308 	for (;;)
309 		continue;
310 }
311 
312 /*
313  * Force the other CPUs to trap into panic_idle(), and then remove them
314  * from the cpu_ready_set so they will no longer receive cross-calls.
315  */
316 /*ARGSUSED*/
317 void
318 panic_stopcpus(cpu_t *cp, kthread_t *t, int spl)
319 {
320 	cpuset_t cps;
321 	int i;
322 
323 	(void) splzs();
324 	CPUSET_ALL_BUT(cps, cp->cpu_id);
325 	xt_some(cps, (xcfunc_t *)idle_stop_xcall, (uint64_t)&panic_idle, NULL);
326 
327 	for (i = 0; i < NCPU; i++) {
328 		if (i != cp->cpu_id && CPU_XCALL_READY(i)) {
329 			int ntries = 0x10000;
330 
331 			while (!cpu[i]->cpu_m.in_prom && ntries) {
332 				DELAY(50);
333 				ntries--;
334 			}
335 
336 			if (!cpu[i]->cpu_m.in_prom)
337 				printf("panic: failed to stop cpu%d\n", i);
338 
339 			cpu[i]->cpu_flags &= ~CPU_READY;
340 			cpu[i]->cpu_flags |= CPU_QUIESCED;
341 			CPUSET_DEL(cpu_ready_set, cpu[i]->cpu_id);
342 		}
343 	}
344 }
345 
346 /*
347  * Platform callback following each entry to panicsys().  If we've panicked at
348  * level 14, we examine t_panic_trap to see if a fatal trap occurred.  If so,
349  * we disable further %tick_cmpr interrupts.  If not, an explicit call to panic
350  * was made and so we re-enqueue an interrupt request structure to allow
351  * further level 14 interrupts to be processed once we lower PIL.  This allows
352  * us to handle panics from the deadman() CY_HIGH_LEVEL cyclic.
353  */
354 void
355 panic_enter_hw(int spl)
356 {
357 	if (!panic_tick) {
358 		panic_tick = gettick();
359 		if (mach_htraptrace_enable) {
360 			uint64_t prev_freeze;
361 
362 			/*  there are no possible error codes for this hcall */
363 			(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL,
364 			    &prev_freeze);
365 		}
366 #ifdef TRAPTRACE
367 		TRAPTRACE_FREEZE;
368 #endif
369 	}
370 
371 	mach_set_soft_state(SIS_TRANSITION, &SOLARIS_SOFT_STATE_PANIC_MSG);
372 
373 	if (spl == ipltospl(PIL_14)) {
374 		uint_t opstate = disable_vec_intr();
375 
376 		if (curthread->t_panic_trap != NULL) {
377 			tickcmpr_disable();
378 			intr_dequeue_req(PIL_14, cbe_level14_inum);
379 		} else {
380 			if (!tickcmpr_disabled())
381 				intr_enqueue_req(PIL_14, cbe_level14_inum);
382 			/*
383 			 * Clear SOFTINT<14>, SOFTINT<0> (TICK_INT)
384 			 * and SOFTINT<16> (STICK_INT) to indicate
385 			 * that the current level 14 has been serviced.
386 			 */
387 			wr_clr_softint((1 << PIL_14) |
388 			    TICK_INT_MASK | STICK_INT_MASK);
389 		}
390 
391 		enable_vec_intr(opstate);
392 	}
393 }
394 
395 /*
396  * Miscellaneous hardware-specific code to execute after panicstr is set
397  * by the panic code: we also print and record PTL1 panic information here.
398  */
399 /*ARGSUSED*/
400 void
401 panic_quiesce_hw(panic_data_t *pdp)
402 {
403 	extern uint_t getpstate(void);
404 	extern void setpstate(uint_t);
405 
406 	/*
407 	 * Turn off TRAPTRACE and save the current %tick value in panic_tick.
408 	 */
409 	if (!panic_tick) {
410 		panic_tick = gettick();
411 		if (mach_htraptrace_enable) {
412 			uint64_t prev_freeze;
413 
414 			/*  there are no possible error codes for this hcall */
415 			(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL,
416 			    &prev_freeze);
417 		}
418 #ifdef TRAPTRACE
419 		TRAPTRACE_FREEZE;
420 #endif
421 	}
422 	/*
423 	 * For Platforms that use CPU signatures, we
424 	 * need to set the signature block to OS, the state to
425 	 * exiting, and the substate to panic for all the processors.
426 	 */
427 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_PANIC, -1);
428 
429 	update_hvdump_buffer();
430 
431 	/*
432 	 * Disable further ECC errors from the bus nexus.
433 	 */
434 	(void) bus_func_invoke(BF_TYPE_ERRDIS);
435 
436 	/*
437 	 * Redirect all interrupts to the current CPU.
438 	 */
439 	intr_redist_all_cpus_shutdown();
440 
441 	/*
442 	 * This call exists solely to support dumps to network
443 	 * devices after sync from OBP.
444 	 *
445 	 * If we came here via the sync callback, then on some
446 	 * platforms, interrupts may have arrived while we were
447 	 * stopped in OBP.  OBP will arrange for those interrupts to
448 	 * be redelivered if you say "go", but not if you invoke a
449 	 * client callback like 'sync'.	 For some dump devices
450 	 * (network swap devices), we need interrupts to be
451 	 * delivered in order to dump, so we have to call the bus
452 	 * nexus driver to reset the interrupt state machines.
453 	 */
454 	(void) bus_func_invoke(BF_TYPE_RESINTR);
455 
456 	setpstate(getpstate() | PSTATE_IE);
457 }
458 
459 /*
460  * Platforms that use CPU signatures need to set the signature block to OS and
461  * the state to exiting for all CPUs. PANIC_CONT indicates that we're about to
462  * write the crash dump, which tells the SSP/SMS to begin a timeout routine to
463  * reboot the machine if the dump never completes.
464  */
465 /*ARGSUSED*/
466 void
467 panic_dump_hw(int spl)
468 {
469 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_DUMP, -1);
470 }
471 
472 /*
473  * for ptl1_panic
474  */
475 void
476 ptl1_init_cpu(struct cpu *cpu)
477 {
478 	ptl1_state_t *pstate = &cpu->cpu_m.ptl1_state;
479 
480 	/*CONSTCOND*/
481 	if (sizeof (struct cpu) + PTL1_SSIZE > CPU_ALLOC_SIZE) {
482 		panic("ptl1_init_cpu: not enough space left for ptl1_panic "
483 		    "stack, sizeof (struct cpu) = %lu",
484 		    (unsigned long)sizeof (struct cpu));
485 	}
486 
487 	pstate->ptl1_stktop = (uintptr_t)cpu + CPU_ALLOC_SIZE;
488 	cpu_pa[cpu->cpu_id] = va_to_pa(cpu);
489 }
490 
491 void
492 ptl1_panic_handler(ptl1_state_t *pstate)
493 {
494 	static const char *ptl1_reasons[] = {
495 #ifdef	PTL1_PANIC_DEBUG
496 		"trap for debug purpose",	/* PTL1_BAD_DEBUG */
497 #else
498 		"unknown trap",			/* PTL1_BAD_DEBUG */
499 #endif
500 		"register window trap",		/* PTL1_BAD_WTRAP */
501 		"kernel MMU miss",		/* PTL1_BAD_KMISS */
502 		"kernel protection fault",	/* PTL1_BAD_KPROT_FAULT */
503 		"ISM MMU miss",			/* PTL1_BAD_ISM */
504 		"kernel MMU trap",		/* PTL1_BAD_MMUTRAP */
505 		"kernel trap handler state",	/* PTL1_BAD_TRAP */
506 		"floating point trap",		/* PTL1_BAD_FPTRAP */
507 #ifdef	DEBUG
508 		"pointer to intr_vec",		/* PTL1_BAD_INTR_VEC */
509 #else
510 		"unknown trap",			/* PTL1_BAD_INTR_VEC */
511 #endif
512 #ifdef	TRAPTRACE
513 		"TRACE_PTR state",		/* PTL1_BAD_TRACE_PTR */
514 #else
515 		"unknown trap",			/* PTL1_BAD_TRACE_PTR */
516 #endif
517 		"stack overflow",		/* PTL1_BAD_STACK */
518 		"DTrace flags",			/* PTL1_BAD_DTRACE_FLAGS */
519 		"attempt to steal locked ctx",  /* PTL1_BAD_CTX_STEAL */
520 		"CPU ECC error loop",		/* PTL1_BAD_ECC */
521 		"unexpected error from hypervisor call", /* PTL1_BAD_HCALL */
522 		"unexpected global level(%gl)", /* PTL1_BAD_GL */
523 		"Watchdog Reset", 		/* PTL1_BAD_WATCHDOG */
524 		"unexpected RED mode trap", 	/* PTL1_BAD_RED */
525 		"return value EINVAL from hcall: "\
526 		    "UNMAP_PERM_ADDR",	/* PTL1_BAD_HCALL_UNMAP_PERM_EINVAL */
527 		"return value ENOMAP from hcall: "\
528 		    "UNMAP_PERM_ADDR", /* PTL1_BAD_HCALL_UNMAP_PERM_ENOMAP */
529 	};
530 
531 	uint_t reason = pstate->ptl1_regs.ptl1_gregs[0].ptl1_g1;
532 	uint_t tl = pstate->ptl1_regs.ptl1_trap_regs[0].ptl1_tl;
533 	struct panic_trap_info ti = { 0 };
534 
535 	/*
536 	 * Use trap_info for a place holder to call panic_savetrap() and
537 	 * panic_showtrap() to save and print out ptl1_panic information.
538 	 */
539 	if (curthread->t_panic_trap == NULL)
540 		curthread->t_panic_trap = &ti;
541 
542 	if (reason < sizeof (ptl1_reasons) / sizeof (ptl1_reasons[0]))
543 		panic("bad %s at TL %u", ptl1_reasons[reason], tl);
544 	else
545 		panic("ptl1_panic reason 0x%x at TL %u", reason, tl);
546 }
547 
548 void
549 clear_watchdog_on_exit(void)
550 {
551 	if (watchdog_enabled && watchdog_activated) {
552 		prom_printf("Debugging requested; hardware watchdog "
553 		    "suspended.\n");
554 		(void) watchdog_suspend();
555 	}
556 }
557 
558 /*
559  * Restore the watchdog timer when returning from a debugger
560  * after a panic or L1-A and resume watchdog pat.
561  */
562 void
563 restore_watchdog_on_entry()
564 {
565 	watchdog_resume();
566 }
567 
568 int
569 kdi_watchdog_disable(void)
570 {
571 	watchdog_suspend();
572 
573 	return (0);
574 }
575 
576 void
577 kdi_watchdog_restore(void)
578 {
579 	watchdog_resume();
580 }
581 
582 void
583 mach_dump_buffer_init(void)
584 {
585 	uint64_t  ret, minsize = 0;
586 
587 	if (hvdump_buf_sz > HVDUMP_SIZE_MAX)
588 		hvdump_buf_sz = HVDUMP_SIZE_MAX;
589 
590 	hvdump_buf_va = contig_mem_alloc_align(hvdump_buf_sz, PAGESIZE);
591 	if (hvdump_buf_va == NULL)
592 		return;
593 
594 	hvdump_buf_pa = va_to_pa(hvdump_buf_va);
595 
596 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
597 	    &minsize);
598 
599 	if (ret != H_EOK) {
600 		contig_mem_free(hvdump_buf_va, hvdump_buf_sz);
601 		hvdump_buf_va = NULL;
602 		cmn_err(CE_NOTE, "!Error in setting up hvstate"
603 		    "dump buffer. Error = 0x%lx, size = 0x%lx,"
604 		    "buf_pa = 0x%lx", ret, hvdump_buf_sz,
605 		    hvdump_buf_pa);
606 
607 		if (ret == H_EINVAL) {
608 			cmn_err(CE_NOTE, "!Buffer size too small."
609 			    "Available buffer size = 0x%lx,"
610 			    "Minimum buffer size required = 0x%lx",
611 			    hvdump_buf_sz, minsize);
612 		}
613 	}
614 }
615 
616 
617 static void
618 update_hvdump_buffer(void)
619 {
620 	uint64_t ret, dummy_val;
621 
622 	if (hvdump_buf_va == NULL)
623 		return;
624 
625 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
626 	    &dummy_val);
627 	if (ret != H_EOK) {
628 		cmn_err(CE_NOTE, "!Cannot update hvstate dump"
629 		    "buffer. Error = 0x%lx", ret);
630 	}
631 }
632 
633 
634 static int
635 getintprop(pnode_t node, char *name, int deflt)
636 {
637 	int	value;
638 
639 	switch (prom_getproplen(node, name)) {
640 	case 0:
641 		value = 1;	/* boolean properties */
642 		break;
643 
644 	case sizeof (int):
645 		(void) prom_getprop(node, name, (caddr_t)&value);
646 		break;
647 
648 	default:
649 		value = deflt;
650 		break;
651 	}
652 
653 	return (value);
654 }
655 
656 /*
657  * Called by setcpudelay
658  */
659 void
660 cpu_init_tick_freq(void)
661 {
662 	md_t *mdp;
663 	mde_cookie_t rootnode;
664 	int		listsz;
665 	mde_cookie_t	*listp = NULL;
666 	int	num_nodes;
667 	uint64_t stick_prop;
668 
669 	if (broken_md_flag) {
670 		sys_tick_freq = cpunodes[CPU->cpu_id].clock_freq;
671 		return;
672 	}
673 
674 	if ((mdp = md_get_handle()) == NULL)
675 		panic("stick_frequency property not found in MD");
676 
677 	rootnode = md_root_node(mdp);
678 	ASSERT(rootnode != MDE_INVAL_ELEM_COOKIE);
679 
680 	num_nodes = md_node_count(mdp);
681 
682 	ASSERT(num_nodes > 0);
683 	listsz = num_nodes * sizeof (mde_cookie_t);
684 	listp = (mde_cookie_t *)prom_alloc((caddr_t)0, listsz, 0);
685 
686 	if (listp == NULL)
687 		panic("cannot allocate list for MD properties");
688 
689 	num_nodes = md_scan_dag(mdp, rootnode, md_find_name(mdp, "platform"),
690 	    md_find_name(mdp, "fwd"), listp);
691 
692 	ASSERT(num_nodes == 1);
693 
694 	if (md_get_prop_val(mdp, *listp, "stick-frequency", &stick_prop) != 0)
695 		panic("stick_frequency property not found in MD");
696 
697 	sys_tick_freq = stick_prop;
698 
699 	prom_free((caddr_t)listp, listsz);
700 	(void) md_fini_handle(mdp);
701 }
702 
703 int shipit(int n, uint64_t cpu_list_ra);
704 extern uint64_t xc_tick_limit;
705 extern uint64_t xc_tick_jump_limit;
706 
707 #ifdef DEBUG
708 #define	SEND_MONDO_STATS	1
709 #endif
710 
711 #ifdef SEND_MONDO_STATS
712 uint32_t x_one_stimes[64];
713 uint32_t x_one_ltimes[16];
714 uint32_t x_set_stimes[64];
715 uint32_t x_set_ltimes[16];
716 uint32_t x_set_cpus[NCPU];
717 #endif
718 
719 void
720 send_one_mondo(int cpuid)
721 {
722 	int retries, stat;
723 	uint64_t starttick, endtick, tick, lasttick;
724 	struct machcpu	*mcpup = &(CPU->cpu_m);
725 
726 	CPU_STATS_ADDQ(CPU, sys, xcalls, 1);
727 	starttick = lasttick = gettick();
728 	mcpup->cpu_list[0] = (uint16_t)cpuid;
729 	stat = shipit(1, mcpup->cpu_list_ra);
730 	endtick = starttick + xc_tick_limit;
731 	retries = 0;
732 	while (stat != H_EOK) {
733 		if (stat != H_EWOULDBLOCK) {
734 			if (panic_quiesce)
735 				return;
736 			if (stat == H_ECPUERROR)
737 				cmn_err(CE_PANIC, "send_one_mondo: "
738 				    "cpuid: 0x%x has been marked in "
739 				    "error", cpuid);
740 			else
741 				cmn_err(CE_PANIC, "send_one_mondo: "
742 				    "unexpected hypervisor error 0x%x "
743 				    "while sending a mondo to cpuid: "
744 				    "0x%x", stat, cpuid);
745 		}
746 		tick = gettick();
747 		/*
748 		 * If there is a big jump between the current tick
749 		 * count and lasttick, we have probably hit a break
750 		 * point.  Adjust endtick accordingly to avoid panic.
751 		 */
752 		if (tick > (lasttick + xc_tick_jump_limit))
753 			endtick += (tick - lasttick);
754 		lasttick = tick;
755 		if (tick > endtick) {
756 			if (panic_quiesce)
757 				return;
758 			cmn_err(CE_PANIC, "send mondo timeout "
759 			    "(target 0x%x) [retries: 0x%x hvstat: 0x%x]",
760 			    cpuid, retries, stat);
761 		}
762 		drv_usecwait(1);
763 		stat = shipit(1, mcpup->cpu_list_ra);
764 		retries++;
765 	}
766 #ifdef SEND_MONDO_STATS
767 	{
768 		uint64_t n = gettick() - starttick;
769 		if (n < 8192)
770 			x_one_stimes[n >> 7]++;
771 		else if (n < 15*8192)
772 			x_one_ltimes[n >> 13]++;
773 		else
774 			x_one_ltimes[0xf]++;
775 	}
776 #endif
777 }
778 
779 void
780 send_mondo_set(cpuset_t set)
781 {
782 	uint64_t starttick, endtick, tick, lasttick;
783 	uint_t largestid, smallestid;
784 	int i, j;
785 	int ncpuids = 0;
786 	int shipped = 0;
787 	int retries = 0;
788 	struct machcpu	*mcpup = &(CPU->cpu_m);
789 
790 	ASSERT(!CPUSET_ISNULL(set));
791 	CPUSET_BOUNDS(set, smallestid, largestid);
792 	if (smallestid == CPUSET_NOTINSET) {
793 		return;
794 	}
795 
796 	starttick = lasttick = gettick();
797 	endtick = starttick + xc_tick_limit;
798 
799 	/*
800 	 * Assemble CPU list for HV argument. We already know
801 	 * smallestid and largestid are members of set.
802 	 */
803 	mcpup->cpu_list[ncpuids++] = (uint16_t)smallestid;
804 	if (largestid != smallestid) {
805 		for (i = smallestid+1; i <= largestid-1; i++) {
806 			if (CPU_IN_SET(set, i)) {
807 				mcpup->cpu_list[ncpuids++] = (uint16_t)i;
808 			}
809 		}
810 		mcpup->cpu_list[ncpuids++] = (uint16_t)largestid;
811 	}
812 
813 	do {
814 		int stat;
815 
816 		stat = shipit(ncpuids, mcpup->cpu_list_ra);
817 		if (stat == H_EOK) {
818 			shipped += ncpuids;
819 			break;
820 		}
821 
822 		/*
823 		 * Either not all CPU mondos were sent, or an
824 		 * error occurred. CPUs that were sent mondos
825 		 * have their CPU IDs overwritten in cpu_list.
826 		 * Reset cpu_list so that it only holds those
827 		 * CPU IDs that still need to be sent.
828 		 */
829 		for (i = 0, j = 0; i < ncpuids; i++) {
830 			if (mcpup->cpu_list[i] == HV_SEND_MONDO_ENTRYDONE) {
831 				shipped++;
832 			} else {
833 				mcpup->cpu_list[j++] = mcpup->cpu_list[i];
834 			}
835 		}
836 		ncpuids = j;
837 
838 		/*
839 		 * Now handle possible errors returned
840 		 * from hypervisor.
841 		 */
842 		if (stat == H_ECPUERROR) {
843 			int errorcpus;
844 
845 			if (!panic_quiesce)
846 				cmn_err(CE_CONT, "send_mondo_set: cpuid(s) ");
847 
848 			/*
849 			 * Remove any CPUs in the error state from
850 			 * cpu_list. At this point cpu_list only
851 			 * contains the CPU IDs for mondos not
852 			 * succesfully sent.
853 			 */
854 			for (i = 0, errorcpus = 0; i < ncpuids; i++) {
855 				uint64_t state = CPU_STATE_INVALID;
856 				uint16_t id = mcpup->cpu_list[i];
857 
858 				(void) hv_cpu_state(id, &state);
859 				if (state == CPU_STATE_ERROR) {
860 					if (!panic_quiesce)
861 						cmn_err(CE_CONT, "0x%x ", id);
862 					errorcpus++;
863 				} else if (errorcpus > 0) {
864 					mcpup->cpu_list[i - errorcpus] =
865 					    mcpup->cpu_list[i];
866 				}
867 			}
868 			ncpuids -= errorcpus;
869 
870 			if (!panic_quiesce) {
871 				if (errorcpus == 0) {
872 					cmn_err(CE_CONT, "<none> have been "
873 					    "marked in error\n");
874 					cmn_err(CE_PANIC, "send_mondo_set: "
875 					    "hypervisor returned "
876 					    "H_ECPUERROR but no CPU in "
877 					    "cpu_list in error state");
878 				} else {
879 					cmn_err(CE_CONT, "have been marked in "
880 					    "error\n");
881 					cmn_err(CE_PANIC, "send_mondo_set: "
882 					    "CPU(s) in error state");
883 				}
884 			}
885 		} else if (stat != H_EWOULDBLOCK) {
886 			if (panic_quiesce)
887 				return;
888 			/*
889 			 * For all other errors, panic.
890 			 */
891 			cmn_err(CE_CONT, "send_mondo_set: unexpected "
892 			    "hypervisor error 0x%x while sending a "
893 			    "mondo to cpuid(s):", stat);
894 			for (i = 0; i < ncpuids; i++) {
895 				cmn_err(CE_CONT, " 0x%x", mcpup->cpu_list[i]);
896 			}
897 			cmn_err(CE_CONT, "\n");
898 			cmn_err(CE_PANIC, "send_mondo_set: unexpected "
899 			    "hypervisor error");
900 		}
901 
902 		tick = gettick();
903 		/*
904 		 * If there is a big jump between the current tick
905 		 * count and lasttick, we have probably hit a break
906 		 * point.  Adjust endtick accordingly to avoid panic.
907 		 */
908 		if (tick > (lasttick + xc_tick_jump_limit))
909 			endtick += (tick - lasttick);
910 		lasttick = tick;
911 		if (tick > endtick) {
912 			if (panic_quiesce)
913 				return;
914 			cmn_err(CE_CONT, "send mondo timeout "
915 			    "[retries: 0x%x]  cpuids: ", retries);
916 			for (i = 0; i < ncpuids; i++)
917 				cmn_err(CE_CONT, " 0x%x", mcpup->cpu_list[i]);
918 			cmn_err(CE_CONT, "\n");
919 			cmn_err(CE_PANIC, "send_mondo_set: timeout");
920 		}
921 
922 		while (gettick() < (tick + sys_clock_mhz))
923 			;
924 		retries++;
925 	} while (ncpuids > 0);
926 
927 	CPU_STATS_ADDQ(CPU, sys, xcalls, shipped);
928 
929 #ifdef SEND_MONDO_STATS
930 	{
931 		uint64_t n = gettick() - starttick;
932 		if (n < 8192)
933 			x_set_stimes[n >> 7]++;
934 		else if (n < 15*8192)
935 			x_set_ltimes[n >> 13]++;
936 		else
937 			x_set_ltimes[0xf]++;
938 	}
939 	x_set_cpus[shipped]++;
940 #endif
941 }
942 
943 void
944 syncfpu(void)
945 {
946 }
947 
948 void
949 sticksync_slave(void)
950 {}
951 
952 void
953 sticksync_master(void)
954 {}
955 
956 void
957 cpu_init_cache_scrub(void)
958 {
959 	mach_set_soft_state(SIS_NORMAL, &SOLARIS_SOFT_STATE_RUN_MSG);
960 }
961 
962 int
963 dtrace_blksuword32_err(uintptr_t addr, uint32_t *data)
964 {
965 	int ret, watched;
966 
967 	watched = watch_disable_addr((void *)addr, 4, S_WRITE);
968 	ret = dtrace_blksuword32(addr, data, 0);
969 	if (watched)
970 		watch_enable_addr((void *)addr, 4, S_WRITE);
971 
972 	return (ret);
973 }
974 
975 int
976 dtrace_blksuword32(uintptr_t addr, uint32_t *data, int tryagain)
977 {
978 	if (suword32((void *)addr, *data) == -1)
979 		return (tryagain ? dtrace_blksuword32_err(addr, data) : -1);
980 	dtrace_flush_sec(addr);
981 
982 	return (0);
983 }
984 
985 /*ARGSUSED*/
986 void
987 cpu_faulted_enter(struct cpu *cp)
988 {
989 }
990 
991 /*ARGSUSED*/
992 void
993 cpu_faulted_exit(struct cpu *cp)
994 {
995 }
996 
997 static int
998 kdi_cpu_ready_iter(int (*cb)(int, void *), void *arg)
999 {
1000 	int rc, i;
1001 
1002 	for (rc = 0, i = 0; i < NCPU; i++) {
1003 		if (CPU_IN_SET(cpu_ready_set, i))
1004 			rc += cb(i, arg);
1005 	}
1006 
1007 	return (rc);
1008 }
1009 
1010 /*
1011  * Sends a cross-call to a specified processor.  The caller assumes
1012  * responsibility for repetition of cross-calls, as appropriate (MARSA for
1013  * debugging).
1014  */
1015 static int
1016 kdi_xc_one(int cpuid, void (*func)(uintptr_t, uintptr_t), uintptr_t arg1,
1017     uintptr_t arg2)
1018 {
1019 	int stat;
1020 	struct machcpu	*mcpup;
1021 	uint64_t cpuaddr_reg = 0, cpuaddr_scr = 0;
1022 
1023 	mcpup = &(((cpu_t *)get_cpuaddr(cpuaddr_reg, cpuaddr_scr))->cpu_m);
1024 
1025 	/*
1026 	 * if (idsr_busy())
1027 	 *	return (KDI_XC_RES_ERR);
1028 	 */
1029 
1030 	init_mondo_nocheck((xcfunc_t *)func, arg1, arg2);
1031 
1032 	mcpup->cpu_list[0] = (uint16_t)cpuid;
1033 	stat = shipit(1, mcpup->cpu_list_ra);
1034 
1035 	if (stat == 0)
1036 		return (KDI_XC_RES_OK);
1037 	else
1038 		return (KDI_XC_RES_NACK);
1039 }
1040 
1041 static void
1042 kdi_tickwait(clock_t nticks)
1043 {
1044 	clock_t endtick = gettick() + nticks;
1045 
1046 	while (gettick() < endtick)
1047 		continue;
1048 }
1049 
1050 static void
1051 kdi_cpu_init(int dcache_size, int dcache_linesize, int icache_size,
1052     int icache_linesize)
1053 {
1054 	kdi_dcache_size = dcache_size;
1055 	kdi_dcache_linesize = dcache_linesize;
1056 	kdi_icache_size = icache_size;
1057 	kdi_icache_linesize = icache_linesize;
1058 }
1059 
1060 /* used directly by kdi_read/write_phys */
1061 void
1062 kdi_flush_caches(void)
1063 {
1064 	/* Not required on sun4v architecture. */
1065 }
1066 
1067 /*ARGSUSED*/
1068 int
1069 kdi_get_stick(uint64_t *stickp)
1070 {
1071 	return (-1);
1072 }
1073 
1074 void
1075 cpu_kdi_init(kdi_t *kdi)
1076 {
1077 	kdi->kdi_flush_caches = kdi_flush_caches;
1078 	kdi->mkdi_cpu_init = kdi_cpu_init;
1079 	kdi->mkdi_cpu_ready_iter = kdi_cpu_ready_iter;
1080 	kdi->mkdi_xc_one = kdi_xc_one;
1081 	kdi->mkdi_tickwait = kdi_tickwait;
1082 	kdi->mkdi_get_stick = kdi_get_stick;
1083 }
1084 
1085 uint64_t	soft_state_message_ra[SOLARIS_SOFT_STATE_MSG_CNT];
1086 static uint64_t	soft_state_saved_state = (uint64_t)-1;
1087 static int	soft_state_initialized = 0;
1088 static uint64_t soft_state_sup_minor;		/* Supported minor number */
1089 static hsvc_info_t soft_state_hsvc = {
1090 			HSVC_REV_1, NULL, HSVC_GROUP_SOFT_STATE, 1, 0, NULL };
1091 
1092 
1093 static void
1094 sun4v_system_claim(void)
1095 {
1096 	watchdog_suspend();
1097 	/*
1098 	 * For "mdb -K", set soft state to debugging
1099 	 */
1100 	if (soft_state_saved_state == -1) {
1101 		mach_get_soft_state(&soft_state_saved_state,
1102 		    &SOLARIS_SOFT_STATE_SAVED_MSG);
1103 	}
1104 	/*
1105 	 * check again as the read above may or may not have worked and if
1106 	 * it didn't then soft state will still be -1
1107 	 */
1108 	if (soft_state_saved_state != -1) {
1109 		mach_set_soft_state(SIS_TRANSITION,
1110 		    &SOLARIS_SOFT_STATE_DEBUG_MSG);
1111 	}
1112 }
1113 
1114 static void
1115 sun4v_system_release(void)
1116 {
1117 	watchdog_resume();
1118 	/*
1119 	 * For "mdb -K", set soft_state state back to original state on exit
1120 	 */
1121 	if (soft_state_saved_state != -1) {
1122 		mach_set_soft_state(soft_state_saved_state,
1123 		    &SOLARIS_SOFT_STATE_SAVED_MSG);
1124 		soft_state_saved_state = -1;
1125 	}
1126 }
1127 
1128 void
1129 plat_kdi_init(kdi_t *kdi)
1130 {
1131 	kdi->pkdi_system_claim = sun4v_system_claim;
1132 	kdi->pkdi_system_release = sun4v_system_release;
1133 }
1134 
1135 /*
1136  * Routine to return memory information associated
1137  * with a physical address and syndrome.
1138  */
1139 /* ARGSUSED */
1140 int
1141 cpu_get_mem_info(uint64_t synd, uint64_t afar,
1142     uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep,
1143     int *segsp, int *banksp, int *mcidp)
1144 {
1145 	return (ENOTSUP);
1146 }
1147 
1148 /*
1149  * This routine returns the size of the kernel's FRU name buffer.
1150  */
1151 size_t
1152 cpu_get_name_bufsize()
1153 {
1154 	return (UNUM_NAMLEN);
1155 }
1156 
1157 /*
1158  * This routine is a more generic interface to cpu_get_mem_unum(),
1159  * that may be used by other modules (e.g. mm).
1160  */
1161 /* ARGSUSED */
1162 int
1163 cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar,
1164     char *buf, int buflen, int *lenp)
1165 {
1166 	return (ENOTSUP);
1167 }
1168 
1169 /* ARGSUSED */
1170 int
1171 cpu_get_mem_sid(char *unum, char *buf, int buflen, int *lenp)
1172 {
1173 	return (ENOTSUP);
1174 }
1175 
1176 /* ARGSUSED */
1177 int
1178 cpu_get_mem_addr(char *unum, char *sid, uint64_t offset, uint64_t *addrp)
1179 {
1180 	return (ENOTSUP);
1181 }
1182 
1183 /*
1184  * xt_sync - wait for previous x-traps to finish
1185  */
1186 void
1187 xt_sync(cpuset_t cpuset)
1188 {
1189 	union {
1190 		uint8_t volatile byte[NCPU];
1191 		uint64_t volatile xword[NCPU / 8];
1192 	} cpu_sync;
1193 	uint64_t starttick, endtick, tick, lasttick, traptrace_id;
1194 	uint_t largestid, smallestid;
1195 	int i, j;
1196 
1197 	kpreempt_disable();
1198 	CPUSET_DEL(cpuset, CPU->cpu_id);
1199 	CPUSET_AND(cpuset, cpu_ready_set);
1200 
1201 	CPUSET_BOUNDS(cpuset, smallestid, largestid);
1202 	if (smallestid == CPUSET_NOTINSET)
1203 		goto out;
1204 
1205 	/*
1206 	 * Sun4v uses a queue for receiving mondos. Successful
1207 	 * transmission of a mondo only indicates that the mondo
1208 	 * has been written into the queue.
1209 	 *
1210 	 * We use an array of bytes to let each cpu to signal back
1211 	 * to the cross trap sender that the cross trap has been
1212 	 * executed. Set the byte to 1 before sending the cross trap
1213 	 * and wait until other cpus reset it to 0.
1214 	 */
1215 	bzero((void *)&cpu_sync, NCPU);
1216 	cpu_sync.byte[smallestid] = 1;
1217 	if (largestid != smallestid) {
1218 		for (i = (smallestid + 1); i <= (largestid - 1); i++)
1219 			if (CPU_IN_SET(cpuset, i))
1220 				cpu_sync.byte[i] = 1;
1221 		cpu_sync.byte[largestid] = 1;
1222 	}
1223 
1224 	/*
1225 	 * To help debug xt_sync panic, each mondo is uniquely identified
1226 	 * by passing the tick value, traptrace_id as the second mondo
1227 	 * argument to xt_some which is logged in CPU's mondo queue,
1228 	 * traptrace buffer and the panic message.
1229 	 */
1230 	traptrace_id = gettick();
1231 	xt_some(cpuset, (xcfunc_t *)xt_sync_tl1,
1232 	    (uint64_t)cpu_sync.byte, traptrace_id);
1233 
1234 	starttick = lasttick = gettick();
1235 	endtick = starttick + xc_tick_limit;
1236 
1237 	for (i = (smallestid / 8); i <= (largestid / 8); i++) {
1238 		while (cpu_sync.xword[i] != 0) {
1239 			tick = gettick();
1240 			/*
1241 			 * If there is a big jump between the current tick
1242 			 * count and lasttick, we have probably hit a break
1243 			 * point. Adjust endtick accordingly to avoid panic.
1244 			 */
1245 			if (tick > (lasttick + xc_tick_jump_limit)) {
1246 				endtick += (tick - lasttick);
1247 			}
1248 			lasttick = tick;
1249 			if (tick > endtick) {
1250 				if (panic_quiesce)
1251 					goto out;
1252 				cmn_err(CE_CONT, "Cross trap sync timeout:  "
1253 				    "at cpu_sync.xword[%d]: 0x%lx "
1254 				    "cpu_sync.byte: 0x%lx "
1255 				    "starttick: 0x%lx endtick: 0x%lx "
1256 				    "traptrace_id = 0x%lx\n",
1257 				    i, cpu_sync.xword[i],
1258 				    (uint64_t)cpu_sync.byte,
1259 				    starttick, endtick, traptrace_id);
1260 				cmn_err(CE_CONT, "CPUIDs:");
1261 				for (j = (i * 8); j <= largestid; j++) {
1262 					if (cpu_sync.byte[j] != 0)
1263 						cmn_err(CE_CONT, " 0x%x", j);
1264 				}
1265 				cmn_err(CE_PANIC, "xt_sync: timeout");
1266 			}
1267 		}
1268 	}
1269 
1270 out:
1271 	kpreempt_enable();
1272 }
1273 
1274 /*
1275  * Recalculate the values of the cross-call timeout variables based
1276  * on the value of the 'inter-cpu-latency' property of the platform node.
1277  * The property sets the number of nanosec to wait for a cross-call
1278  * to be acknowledged.  Other timeout variables are derived from it.
1279  *
1280  * N.B. This implementation is aware of the internals of xc_init()
1281  * and updates many of the same variables.
1282  */
1283 void
1284 recalc_xc_timeouts(void)
1285 {
1286 	typedef union {
1287 		uint64_t whole;
1288 		struct {
1289 			uint_t high;
1290 			uint_t low;
1291 		} half;
1292 	} u_number;
1293 
1294 	/* See x_call.c for descriptions of these extern variables. */
1295 	extern uint64_t xc_tick_limit_scale;
1296 	extern uint64_t xc_mondo_time_limit;
1297 	extern uint64_t xc_func_time_limit;
1298 	extern uint64_t xc_scale;
1299 	extern uint64_t xc_mondo_multiplier;
1300 	extern uint_t   nsec_shift;
1301 
1302 	/* Temp versions of the target variables */
1303 	uint64_t tick_limit;
1304 	uint64_t tick_jump_limit;
1305 	uint64_t mondo_time_limit;
1306 	uint64_t func_time_limit;
1307 	uint64_t scale;
1308 
1309 	uint64_t latency;	/* nanoseconds */
1310 	uint64_t maxfreq;
1311 	uint64_t tick_limit_save = xc_tick_limit;
1312 	uint_t   tick_scale;
1313 	uint64_t top;
1314 	uint64_t bottom;
1315 	u_number tk;
1316 
1317 	md_t *mdp;
1318 	int nrnode;
1319 	mde_cookie_t *platlist;
1320 
1321 	/*
1322 	 * Look up the 'inter-cpu-latency' (optional) property in the
1323 	 * platform node of the MD.  The units are nanoseconds.
1324 	 */
1325 	if ((mdp = md_get_handle()) == NULL) {
1326 		cmn_err(CE_WARN, "recalc_xc_timeouts: "
1327 		    "Unable to initialize machine description");
1328 		return;
1329 	}
1330 
1331 	nrnode = md_alloc_scan_dag(mdp,
1332 	    md_root_node(mdp), "platform", "fwd", &platlist);
1333 
1334 	ASSERT(nrnode == 1);
1335 	if (nrnode < 1) {
1336 		cmn_err(CE_WARN, "recalc_xc_timeouts: platform node missing");
1337 		goto done;
1338 	}
1339 
1340 	if (md_get_prop_val(mdp, platlist[0],
1341 	    "inter-cpu-latency", &latency) == -1)
1342 		goto done;
1343 
1344 	/*
1345 	 * clock.h defines an assembly-language macro
1346 	 * (NATIVE_TIME_TO_NSEC_SCALE) to convert from %stick
1347 	 * units to nanoseconds.  Since the inter-cpu-latency
1348 	 * units are nanoseconds and the xc_* variables require
1349 	 * %stick units, we need the inverse of that function.
1350 	 * The trick is to perform the calculation without
1351 	 * floating point, but also without integer truncation
1352 	 * or overflow.  To understand the calculation below,
1353 	 * please read the discussion of the macro in clock.h.
1354 	 * Since this new code will be invoked infrequently,
1355 	 * we can afford to implement it in C.
1356 	 *
1357 	 * tick_scale is the reciprocal of nsec_scale which is
1358 	 * calculated at startup in setcpudelay().  The calc
1359 	 * of tick_limit parallels that of NATIVE_TIME_TO_NSEC_SCALE
1360 	 * except we use tick_scale instead of nsec_scale and
1361 	 * C instead of assembler.
1362 	 */
1363 	tick_scale = (uint_t)(((u_longlong_t)sys_tick_freq
1364 	    << (32 - nsec_shift)) / NANOSEC);
1365 
1366 	tk.whole = latency;
1367 	top = ((uint64_t)tk.half.high << 4) * tick_scale;
1368 	bottom = (((uint64_t)tk.half.low << 4) * (uint64_t)tick_scale) >> 32;
1369 	tick_limit = top + bottom;
1370 
1371 
1372 	/*
1373 	 * xc_init() calculated 'maxfreq' by looking at all the cpus,
1374 	 * and used it to derive some of the timeout variables that we
1375 	 * recalculate below.  We can back into the original value by
1376 	 * using the inverse of one of those calculations.
1377 	 */
1378 	maxfreq = xc_mondo_time_limit / xc_scale;
1379 
1380 	/*
1381 	 * Don't allow the new timeout (xc_tick_limit) to fall below
1382 	 * the system tick frequency (stick).  Allowing the timeout
1383 	 * to be set more tightly than this empirically determined
1384 	 * value may cause panics.
1385 	 */
1386 	tick_limit = tick_limit < sys_tick_freq ? sys_tick_freq : tick_limit;
1387 
1388 	tick_jump_limit = tick_limit / 32;
1389 	tick_limit *= xc_tick_limit_scale;
1390 
1391 	/*
1392 	 * Recalculate xc_scale since it is used in a callback function
1393 	 * (xc_func_timeout_adj) to adjust two of the timeouts dynamically.
1394 	 * Make the change in xc_scale proportional to the change in
1395 	 * xc_tick_limit.
1396 	 */
1397 	scale = (xc_scale * tick_limit + sys_tick_freq / 2) / tick_limit_save;
1398 	if (scale == 0)
1399 		scale = 1;
1400 
1401 	mondo_time_limit = maxfreq * scale;
1402 	func_time_limit = mondo_time_limit * xc_mondo_multiplier;
1403 
1404 	/*
1405 	 * Don't modify the timeouts if nothing has changed.  Else,
1406 	 * stuff the variables with the freshly calculated (temp)
1407 	 * variables.  This minimizes the window where the set of
1408 	 * values could be inconsistent.
1409 	 */
1410 	if (tick_limit != xc_tick_limit) {
1411 		xc_tick_limit = tick_limit;
1412 		xc_tick_jump_limit = tick_jump_limit;
1413 		xc_scale = scale;
1414 		xc_mondo_time_limit = mondo_time_limit;
1415 		xc_func_time_limit = func_time_limit;
1416 		/*
1417 		 * Force the new values to be used for future cross
1418 		 * calls.  This is necessary only when we increase
1419 		 * the timeouts.
1420 		 */
1421 		if (tick_limit > tick_limit_save) {
1422 			cpuset_t cpuset = cpu_ready_set;
1423 
1424 			xt_sync(cpuset);
1425 		}
1426 	}
1427 
1428 done:
1429 	if (nrnode > 0)
1430 		md_free_scan_dag(mdp, &platlist);
1431 	(void) md_fini_handle(mdp);
1432 }
1433 
1434 void
1435 mach_soft_state_init(void)
1436 {
1437 	int		i;
1438 	uint64_t	ra;
1439 
1440 	/*
1441 	 * Try to register soft_state api. If it fails, soft_state api has not
1442 	 * been implemented in the firmware, so do not bother to setup
1443 	 * soft_state in the kernel.
1444 	 */
1445 	if ((i = hsvc_register(&soft_state_hsvc, &soft_state_sup_minor)) != 0) {
1446 		return;
1447 	}
1448 	for (i = 0; i < SOLARIS_SOFT_STATE_MSG_CNT; i++) {
1449 		ASSERT(strlen((const char *)(void *)
1450 		    soft_state_message_strings + i) < SSM_SIZE);
1451 		if ((ra = va_to_pa(
1452 		    (void *)(soft_state_message_strings + i))) == -1ll) {
1453 			return;
1454 		}
1455 		soft_state_message_ra[i] = ra;
1456 	}
1457 	/*
1458 	 * Tell OBP that we are supporting Guest State
1459 	 */
1460 	prom_sun4v_soft_state_supported();
1461 	soft_state_initialized = 1;
1462 }
1463 
1464 void
1465 mach_set_soft_state(uint64_t state, uint64_t *string_ra)
1466 {
1467 	uint64_t	rc;
1468 
1469 	if (soft_state_initialized && *string_ra) {
1470 		rc = hv_soft_state_set(state, *string_ra);
1471 		if (rc != H_EOK) {
1472 			cmn_err(CE_WARN,
1473 			    "hv_soft_state_set returned %ld\n", rc);
1474 		}
1475 	}
1476 }
1477 
1478 void
1479 mach_get_soft_state(uint64_t *state, uint64_t *string_ra)
1480 {
1481 	uint64_t	rc;
1482 
1483 	if (soft_state_initialized && *string_ra) {
1484 		rc = hv_soft_state_get(*string_ra, state);
1485 		if (rc != H_EOK) {
1486 			cmn_err(CE_WARN,
1487 			    "hv_soft_state_get returned %ld\n", rc);
1488 			*state = -1;
1489 		}
1490 	}
1491 }
1492