xref: /titanic_50/usr/src/uts/sun4u/taco/io/ppm.conf (revision b494511a9cf72b1fc4eb13a0e593f55c624ab829) 
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4# The contents of this file are subject to the terms of the
5# Common Development and Distribution License, Version 1.0 only
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11# See the License for the specific language governing permissions
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16# If applicable, add the following below this CDDL HEADER, with the
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20# CDDL HEADER END
21#
22#
23# Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24# Use is subject to license terms.
25#
26#ident	"%Z%%M%	%I%	%E% SMI"
27#
28
29name="ppm" parent="pseudo" instance=0;
30
31#
32# ppm configuration format
33#
34# "ppm-domains" - in form of "domain_xxx" where "xxx" string highlights
35# the nature of the domain;
36#
37# "domain_xxx-model" - PM model: CPU, PCI, PCI_PROP, FET or LED.
38#
39# "domain_xxx-propname" - a property name that is exported by device in
40# a domain.  Currently, it is used by PCI_PROP model to identify devices
41# that are to have their clocks stopped when all power-manageable devices
42# in the domain are at D3 power level.
43#
44# "domain-xxx-devices" - a list of prom path(s) to include every devices
45# that fall into "domain_xxx", where wildcard '*' is allowed by following
46# the expectation:
47#
48# "domain-xxx-ctrl" - blank space separated definitions in form of
49# keyword=definition [keyword=definition...]
50#    The keywords are as follows, where 'method' must come before mask as it
51#       tells how to store 'mask' and 'val'.  Missing 'val' defaults to 0.
52#
53#    which keywords apply depend on cmd.  There are two sets as shown below.
54#    Here is the first:
55#	cmd=[CPU_GO | LED_ON | LED_OFF | FET_ON | FET_OFF | CLK_ON | CLK_OFF]
56# 	path=<prompath>	- control device's /devices pathname (includes minor)
57# 	method=[KIO|I2CKIO]	This selects a method which maybe
58#		an ioctl that sets a single value or an i2c ioctl that
59#		takes a value and a mask for access gpio register
60#	iord=<integer> - value of ioctl command for reading
61#	iowr=<integer> - value of ioctl command for writing
62# 	val=<integer>	- a single integer value, generally the value to which
63#			  to set the relevant bits of a register
64#	mask=<integer>	- which bits of val are relevant (if method is I2CKIO)
65#
66#    Here is the second:
67#	cmd=[CPU_NEXT | PRE_CHNG | POST_CHNG]
68# 	path=<prompath>	   - control device's prom pathname, including minor
69# 	method=[CPUSPEEDKIO | VCORE]  This selects a method that uses
70#			     information like cpu speed index, value for
71#			     adjust cpu core voltage, delays, etc.
72#	iowr=<integer>     - value of ioctl write command
73#	speeds=<integer>   - indicates the number of cpu speeds that are
74#			     supported
75#
76
77ppm-domains="domain_cpu", "domain_idefet", "domain_led",
78    "domain_pcislot_0", "domain_pcislot_1", "domain_pcislot_2",
79    "domain_pcislot_3", "domain_pcislot_4";
80
81
82#
83# 0x6a02 is JPPMIOC_NEXT	(('j' << 8) | 2)
84# 0x6a03 is JBPPMIOC_GO		(('j' << 8) | 3)
85#
86domain_cpu-devices="/SUNW,UltraSPARC-IIIi@*";
87domain_cpu-model="CPU";
88domain_cpu-control=
89    "cmd=CPU_NEXT path=/ppm@1e,0:jbus-ppm method=CPUSPEEDKIO iowr=0x6a02 speeds=3",
90    "cmd=PRE_CHNG path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo32 method=VCORE iowr=0x6c02 iord=0x6c01 val=4 delay=150000",
91    "cmd=CPU_GO path=/ppm@1e,0:jbus-ppm method=KIO iowr=0x6a03 val=0",
92    "cmd=POST_CHNG path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo32 method=VCORE iowr=0x6c02 iord=0x6c01 val=5";
93
94#
95# iord -- 0x6c01 is M1535PPMIOC_GET	(('l' << 8) | 1)
96# iowr -- 0x6c02 is M1535PPMIOC_SET	(('l' << 8) | 2)
97#
98# Notes
99#
100# - No devices to claim in the LED domain
101# - Both spled and idefet are active low
102#
103
104domain_idefet-devices = "/pci@1e,600000/ide@d";
105domain_idefet-model = "FET";
106domain_idefet-control =
107    "cmd=FET_ON path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo37 method=KIO iowr=0x6c02 iord=0x6c01 val=0 delay=1000000 post_delay=1000000",
108    "cmd=FET_OFF path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo37 method=KIO iowr=0x6c02 iord=0x6c01 val=2";
109
110domain_led-devices = "";
111domain_led-model = "LED";
112domain_led-control =
113    "cmd=LED_ON path=/pci@1e,600000/pmu@6/ppm@0,b3:spled method=KIO iowr=0x6c02 iord=0x6c01 val=0",
114    "cmd=LED_OFF path=/pci@1e,600000/pmu@6/ppm@0,b3:spled method=KIO iowr=0x6c02 iord=0x6c01 val=1";
115
116
117# The following describes per pci slot domain control.
118# Note that the "domain_pcislot?-devices" property contains wildcard
119# character '*', here is how '*' usage is defined in this context:
120#   first wildcard indicates device driver name,
121#   second wildcard, if presents, indicates function number.
122#
123# Slots 0 to 3 are on the PCI A leaf (/pci@1e,600000) and slot 4 (the
124# 66MHz slot) is on the PCI B leaf (/pci@1f,700000). Note that old Taco
125# spec (incorrectly) numbers these slots from 1 to 5 instead of
126# from 0 to 4.
127#
128
129# slot 0, PCIA segment, 33MHz
130#     iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_4) = 0x2310
131#     iord = (ICS951601_READ_CLOCK   | ICS951601_PCI1A_4) = 0x1310
132#
133domain_pcislot_0-devices = "/pci@1e,600000/*@2,*", "/pci@1e,600000/*@2";
134domain_pcislot_0-model = "PCI_PROP";
135domain_pcislot_0-propname = "nonidle-bus-clock-pm";
136domain_pcislot_0-control =
137    "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2310 iord=0x1310 val=1",
138    "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2310 iord=0x1310 val=0";
139
140# slot 1, PCIA segment, 33MHz
141#     iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_5) = 0x2320
142#     iord = (ICS951601_READ_CLOCK   | ICS951601_PCI1A_5) = 0x1320
143#
144domain_pcislot_1-devices = "/pci@1e,600000/*@3,*", "/pci@1e,600000/*@3";
145domain_pcislot_1-model = "PCI_PROP";
146domain_pcislot_1-propname = "nonidle-bus-clock-pm";
147domain_pcislot_1-control =
148    "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2320 iord=0x1320 val=1",
149    "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2320 iord=0x1320 val=0";
150
151# slot 2, PCIA segment, 33MHz
152#     iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_6) = 0x2340
153#     iord = (ICS951601_READ_CLOCK   | ICS951601_PCI1A_6) = 0x1340
154#
155domain_pcislot_2-devices = "/pci@1e,600000/*@4,*", "/pci@1e,600000/*@4";
156domain_pcislot_2-model = "PCI_PROP";
157domain_pcislot_2-propname = "nonidle-bus-clock-pm";
158domain_pcislot_2-control =
159    "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2340 iord=0x1340 val=1",
160    "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2340 iord=0x1340 val=0";
161
162# slot 3, PCIA segment, 33MHz
163#     iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_7) = 0x2380
164#     iord = (ICS951601_READ_CLOCK   | ICS951601_PCI1A_7) = 0x1380
165#
166domain_pcislot_3-devices = "/pci@1e,600000/*@5,*", "/pci@1e,600000/*@5";
167domain_pcislot_3-model = "PCI_PROP";
168domain_pcislot_3-propname = "nonidle-bus-clock-pm";
169domain_pcislot_3-control =
170    "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2380 iord=0x1380 val=1",
171    "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2380 iord=0x1380 val=0";
172
173# slot 4, PCIB segment, 66MHz
174#     iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI2B_1) = 0x2540
175#     iord = (ICS951601_READ_CLOCK   | ICS951601_PCI2B_1) = 0x1540
176#
177domain_pcislot_4-devices = "/pci@1f,700000/*@3,*", "/pci@1f,700000/*@3";
178domain_pcislot_4-model = "PCI_PROP";
179domain_pcislot_4-propname = "nonidle-bus-clock-pm";
180domain_pcislot_4-control =
181    "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2540 iord=0x1540 val=1",
182    "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2540 iord=0x1540 val=0";
183