1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_PTE_H 27 #define _SYS_PTE_H 28 29 #ifndef _ASM 30 #include <sys/types.h> 31 #endif /* _ASM */ 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 #ifndef _ASM 38 /* 39 * The tte struct is a 64 bit data type. Since we currently plan to 40 * use a V8 compiler all manipulations in C will be done using the bit fields 41 * or as 2 integers. In assembly code we will deal with it as a double (using 42 * ldx and stx). The structure is defined to force a double alignment. 43 * Note that USIIi uses bits [47:41] for diag, and [49:48] are reserved. 44 * Note that pa[46:32] includes USIIi diag bits [46:41] and USIII reserved 45 * bits [46:43]. 46 */ 47 typedef union { 48 struct tte { 49 uint32_t v:1; /* 1=valid mapping */ 50 uint32_t sz:2; /* 0=8k 1=64k 2=512k 3=4m */ 51 uint32_t nfo:1; /* 1=no-fault access only */ 52 53 uint32_t ie:1; /* 1=invert endianness */ 54 uint32_t hmenum:3; /* sw - # of hment in hme_blk */ 55 56 uint32_t rsv:7; /* former rsv:1 lockcnt:6 */ 57 uint32_t sz2:1; /* sz2[48] Panther, Olympus-C */ 58 uint32_t diag:1; /* See USII Note above. */ 59 uint32_t pahi:15; /* pa[46:32] See Note above */ 60 uint32_t palo:19; /* pa[31:13] */ 61 uint32_t no_sync:1; /* sw - ghost unload */ 62 63 uint32_t suspend:1; /* sw bits - suspended */ 64 uint32_t ref:1; /* sw - reference */ 65 uint32_t wr_perm:1; /* sw - write permission */ 66 uint32_t exec_synth:1; /* sw bits - itlb synthesis */ 67 68 uint32_t exec_perm:1; /* sw - execute permission */ 69 uint32_t l:1; /* 1=lock in tlb */ 70 uint32_t cp:1; /* 1=cache in ecache, icache */ 71 uint32_t cv:1; /* 1=cache in dcache */ 72 73 uint32_t e:1; /* 1=side effect */ 74 uint32_t p:1; /* 1=privilege required */ 75 uint32_t w:1; /* 1=writes allowed */ 76 uint32_t g:1; /* 1=any context matches */ 77 } tte_bit; 78 struct { 79 int32_t inthi; 80 uint32_t intlo; 81 } tte_int; 82 uint64_t ll; 83 } tte_t; 84 85 #define tte_val tte_bit.v /* use < 0 check in asm */ 86 #define tte_size tte_bit.sz 87 #define tte_size2 tte_bit.sz2 88 #define tte_nfo tte_bit.nfo 89 #define tte_ie tte_bit.ie /* XXX? */ 90 #define tte_hmenum tte_bit.hmenum 91 #define tte_pahi tte_bit.pahi 92 #define tte_palo tte_bit.palo 93 #define tte_no_sync tte_bit.no_sync 94 #define tte_suspend tte_bit.suspend 95 #define tte_ref tte_bit.ref 96 #define tte_wr_perm tte_bit.wr_perm 97 #define tte_exec_synth tte_bit.exec_synth 98 #define tte_exec_perm tte_bit.exec_perm 99 #define tte_lock tte_bit.l 100 #define tte_cp tte_bit.cp 101 #define tte_cv tte_bit.cv 102 #define tte_se tte_bit.e 103 #define tte_priv tte_bit.p 104 #define tte_hwwr tte_bit.w 105 #define tte_glb tte_bit.g 106 107 #define tte_inthi tte_int.inthi 108 #define tte_intlo tte_int.intlo 109 110 #endif /* !_ASM */ 111 112 /* 113 * Defines for valid, sz, sz2 fields in tte. 114 * The TTE_CSZ macro combines the sz and sz2 fields. 115 */ 116 #define TTE8K 0x0 117 #define TTE64K 0x1 118 #define TTE512K 0x2 119 #define TTE4M 0x3 120 #define TTE32M 0x4 121 #define TTE256M 0x5 122 #define TTESZ_VALID 0x4 123 124 #define TTE_SZ_SHFT_INT 29 125 #define TTE_SZ_SHFT 32+29 126 #define TTE_SZ_BITS 0x3 127 128 #define TTE_SZ2_SHFT_INT 14 129 #define TTE_SZ2_SHFT 32+14 130 #define TTE_SZ2_BITS 0x4 131 #define TTE_CSZ_BITS 0x7 132 #define TTE_CSZ(ttep) (((ttep)->tte_size2 << 2) | ((ttep)->tte_size)) 133 134 /* 135 * the tte lock cnt now lives in the hme blk and is 16 bits long. See 136 * comments in hme_blk declaration. 137 */ 138 #define MAX_TTE_LCKCNT (0x10000 - 1) 139 140 #define TTE_BSZS_SHIFT(sz) ((sz) * 3) 141 #define TTEBYTES(sz) (MMU_PAGESIZE << TTE_BSZS_SHIFT(sz)) 142 #define TTEPAGES(sz) (1 << TTE_BSZS_SHIFT(sz)) 143 #define TTE_PAGE_SHIFT(sz) (MMU_PAGESHIFT + TTE_BSZS_SHIFT(sz)) 144 #define TTE_PAGE_OFFSET(sz) (TTEBYTES(sz) - 1) 145 #define TTE_PAGEMASK(sz) (~TTE_PAGE_OFFSET(sz)) 146 #define TTE_PFNMASK(sz) (~(TTE_PAGE_OFFSET(sz) >> MMU_PAGESHIFT)) 147 148 #define TTE_PA_LSHIFT 17 /* used to do sllx on tte to get pa */ 149 150 #ifndef _ASM 151 152 #define TTE_PASHIFT 19 /* used to manage pahi and palo */ 153 #define TTE_PALOMASK ((1 << TTE_PASHIFT) -1) 154 /* 155 * Spitfire PFN is defined as bits [40:13] of the physical address. 156 * Cheetah PFN is defined as bits [42:13] of the physical address. 157 * Olympus-C PFN is defined as bits [46:13] of the physical address. 158 */ 159 #define TTE_TO_TTEPFN(ttep) \ 160 (((((pfn_t)((ttep)->tte_pahi)) << TTE_PASHIFT) | \ 161 (ttep)->tte_palo) & TTE_PFNMASK(TTE_CSZ(ttep))) 162 /* 163 * This define adds the vaddr page offset to obtain a correct pfn 164 */ 165 #define TTE_TO_PFN(vaddr, ttep) \ 166 (sfmmu_ttetopfn(ttep, vaddr)) 167 168 #define PFN_TO_TTE(entry, pfn) { \ 169 entry.tte_pahi = pfn >> TTE_PASHIFT; \ 170 entry.tte_palo = pfn & TTE_PALOMASK; \ 171 } 172 173 #endif /* !_ASM */ 174 175 /* 176 * The tte defines are separated into integers because the compiler doesn't 177 * support 64bit defines. 178 */ 179 /* Defines for tte using inthi */ 180 #define TTE_VALID_INT 0x80000000 181 #define TTE_NFO_INT 0x10000000 182 #define TTE_NFO_SHIFT 0x3 /* makes for an easy check */ 183 #define TTE_IE_INT 0x08000000 184 185 /* Defines for tte using intlo */ 186 #define TTE_SUSPEND_SHIFT 0 187 #define TTE_NOSYNC_INT 0x00001000 188 #define TTE_SUSPEND 0x00000800 189 #define TTE_REF_INT 0x00000400 190 #define TTE_WRPRM_INT 0x00000200 191 #define TTE_E_SYNTH_INT 0x00000100 192 #define TTE_EXECPRM_INT 0x00000080 193 #define TTE_LCK_INT 0x00000040 194 #define TTE_CP_INT 0x00000020 195 #define TTE_CV_INT 0x00000010 196 #define TTE_SIDEFF_INT 0x00000008 197 #define TTE_PRIV_INT 0x00000004 198 #define TTE_HWWR_INT 0x00000002 199 #define TTE_GLB_INT 0x00000001 200 201 #define TTE_PROT_INT (TTE_WRPRM_INT | TTE_PRIV_INT) 202 203 /* 204 * Define to clear the high-order 6 bits of the 47-bit PA in a tte. The 205 * Spitfire tte has PFN in [40:13] and uses [46:41] as part of Diag bits. 206 */ 207 #define TTE_SPITFIRE_PFNHI_CLEAR 0x3f 208 #define TTE_SPITFIRE_PFNHI_SHIFT 41 209 210 #ifndef ASM 211 212 /* Defines to help build ttes using inthi */ 213 #define TTE_SZ_INT(sz) \ 214 ((sz & TTE_SZ_BITS) << TTE_SZ_SHFT_INT) | \ 215 ((sz & TTE_SZ2_BITS) << TTE_SZ2_SHFT_INT) 216 #define TTE_HMENUM_INT(hmenum) ((hmenum) << 24) 217 /* XXX PFN is defined as bits [40-13] of the physical address */ 218 #define TTE_PFN_INTHI(pfn) ((pfn) >> TTE_PASHIFT) 219 #define TTE_VALID_CHECK(attr) \ 220 (((attr) & PROT_ALL) ? TTE_VALID_INT : 0) 221 #define TTE_IE_CHECK(attr) \ 222 (((attr) & HAT_STRUCTURE_LE) ? TTE_IE_INT : 0) 223 #define TTE_NFO_CHECK(attr) \ 224 (((attr) & HAT_NOFAULT) ? TTE_NFO_INT : 0) 225 226 /* Defines to help build ttes using intlo */ 227 #define TTE_PFN_INTLO(pfn) (((pfn) & TTE_PALOMASK) << 13) 228 #define TTE_WRPRM_CHECK(attr) \ 229 (((attr) & PROT_WRITE) ? TTE_WRPRM_INT : 0) 230 #define TTE_EXECPRM_CHECK(attr) \ 231 (((attr) & PROT_EXEC) ? TTE_EXECPRM_INT : 0) 232 #define TTE_NOSYNC_CHECK(attr) \ 233 (((attr) & HAT_NOSYNC) ? TTE_NOSYNC_INT : 0) 234 #define TTE_CP_CHECK(attr) \ 235 (((attr) & SFMMU_UNCACHEPTTE) ? 0: TTE_CP_INT) 236 #define TTE_CV_CHECK(attr) \ 237 (((attr) & SFMMU_UNCACHEVTTE) ? 0: TTE_CV_INT) 238 #define TTE_SE_CHECK(attr) \ 239 (((attr) & SFMMU_SIDEFFECT) ? TTE_SIDEFF_INT : 0) 240 #define TTE_PRIV_CHECK(attr) \ 241 (((attr) & PROT_USER) ? 0 : TTE_PRIV_INT) 242 243 #define MAKE_TTEATTR_INTHI(attr) \ 244 (TTE_VALID_CHECK(attr) | TTE_NFO_CHECK(attr) | TTE_IE_CHECK(attr)) 245 246 #define MAKE_TTE_INTHI(pfn, attr, sz, hmenum) \ 247 (MAKE_TTEATTR_INTHI(attr) | TTE_SZ_INT(sz) | \ 248 TTE_HMENUM_INT(hmenum) | TTE_PFN_INTHI(pfn)) 249 250 #define MAKE_TTEATTR_INTLO(attr) \ 251 (TTE_WRPRM_CHECK(attr) | TTE_NOSYNC_CHECK(attr) | \ 252 TTE_CP_CHECK(attr) | TTE_CV_CHECK(attr) | TTE_SE_CHECK(attr) | \ 253 TTE_PRIV_CHECK(attr) | TTE_EXECPRM_CHECK(attr)) 254 255 #define MAKE_TTE_INTLO(pfn, attr, sz, hmenum) \ 256 (TTE_PFN_INTLO(pfn) | TTE_REF_INT | MAKE_TTEATTR_INTLO(attr)) 257 258 #define TTEINTHI_ATTR (TTE_VALID_INT | TTE_IE_INT | TTE_NFO_INT) 259 260 #define TTEINTLO_ATTR \ 261 (TTE_WRPRM_INT | TTE_NOSYNC_INT | TTE_CP_INT | TTE_CV_INT | \ 262 TTE_SIDEFF_INT | TTE_PRIV_INT | TTE_EXECPRM_INT) 263 264 #define MAKE_TTE_MASK(ttep) \ 265 { \ 266 (ttep)->tte_bit.v = 1; \ 267 (ttep)->tte_bit.sz = 3; \ 268 (ttep)->tte_bit.nfo = 1; \ 269 (ttep)->tte_bit.ie = 1; \ 270 (ttep)->tte_bit.sz2 = 1; \ 271 (ttep)->tte_bit.pahi = 0x7fff; \ 272 (ttep)->tte_bit.palo = 0x7ffff; \ 273 (ttep)->tte_bit.exec_perm = 1; \ 274 (ttep)->tte_bit.l = 1; \ 275 (ttep)->tte_bit.cp = 1; \ 276 (ttep)->tte_bit.cv = 1; \ 277 (ttep)->tte_bit.e = 1; \ 278 (ttep)->tte_bit.p = 1; \ 279 (ttep)->tte_bit.w = 1; \ 280 (ttep)->tte_bit.g = 1; \ 281 } 282 283 /* 284 * Defines to check/set TTE bits. 285 */ 286 #define TTE_IS_VALID(ttep) ((ttep)->tte_inthi < 0) 287 #define TTE_SET_INVALID(ttep) ((ttep)->tte_val = 0) 288 #define TTE_IS_8K(ttep) (TTE_CSZ(ttep) == TTE8K) 289 #define TTE_IS_WRITABLE(ttep) ((ttep)->tte_wr_perm) 290 #define TTE_IS_EXECUTABLE(ttep) ((ttep)->tte_exec_perm) 291 #define TTE_IS_PRIVILEGED(ttep) ((ttep)->tte_priv) 292 #define TTE_IS_NOSYNC(ttep) ((ttep)->tte_no_sync) 293 #define TTE_IS_LOCKED(ttep) ((ttep)->tte_lock) 294 #define TTE_IS_GLOBAL(ttep) ((ttep)->tte_glb) 295 #define TTE_IS_SIDEFFECT(ttep) ((ttep)->tte_se) 296 #define TTE_IS_NFO(ttep) ((ttep)->tte_nfo) 297 298 #define TTE_IS_REF(ttep) ((ttep)->tte_ref) 299 #define TTE_IS_MOD(ttep) ((ttep)->tte_hwwr) 300 #define TTE_IS_IE(ttep) ((ttep)->tte_ie) 301 #define TTE_SET_SUSPEND(ttep) ((ttep)->tte_suspend = 1) 302 #define TTE_CLR_SUSPEND(ttep) ((ttep)->tte_suspend = 0) 303 #define TTE_IS_SUSPEND(ttep) ((ttep)->tte_suspend) 304 #define TTE_SET_REF(ttep) ((ttep)->tte_ref = 1) 305 #define TTE_CLR_REF(ttep) ((ttep)->tte_ref = 0) 306 #define TTE_SET_LOCKED(ttep) ((ttep)->tte_lock = 1) 307 #define TTE_CLR_LOCKED(ttep) ((ttep)->tte_lock = 0) 308 #define TTE_SET_MOD(ttep) ((ttep)->tte_hwwr = 1) 309 #define TTE_CLR_MOD(ttep) ((ttep)->tte_hwwr = 0) 310 #define TTE_SET_RM(ttep) \ 311 (((ttep)->tte_intlo) = (ttep)->tte_intlo | TTE_HWWR_INT | TTE_REF_INT) 312 #define TTE_CLR_RM(ttep) \ 313 (((ttep)->tte_intlo) = (ttep)->tte_intlo & \ 314 ~(TTE_HWWR_INT | TTE_REF_INT)) 315 316 #define TTE_SET_WRT(ttep) ((ttep)->tte_wr_perm = 1) 317 #define TTE_CLR_WRT(ttep) ((ttep)->tte_wr_perm = 0) 318 #define TTE_SET_EXEC(ttep) ((ttep)->tte_exec_perm = 1) 319 #define TTE_CLR_EXEC(ttep) ((ttep)->tte_exec_perm = 0) 320 #define TTE_SET_PRIV(ttep) ((ttep)->tte_priv = 1) 321 #define TTE_CLR_PRIV(ttep) ((ttep)->tte_priv = 0) 322 323 #define TTE_IS_VCACHEABLE(ttep) ((ttep)->tte_cv) 324 #define TTE_SET_VCACHEABLE(ttep) ((ttep)->tte_cv = 1) 325 #define TTE_CLR_VCACHEABLE(ttep) ((ttep)->tte_cv = 0) 326 #define TTE_IS_PCACHEABLE(ttep) ((ttep)->tte_cp) 327 #define TTE_SET_PCACHEABLE(ttep) ((ttep)->tte_cp = 1) 328 #define TTE_CLR_PCACHEABLE(ttep) ((ttep)->tte_cp = 0) 329 330 331 #define KPM_TTE_VCACHED(tte64, pfn, tte_sz) \ 332 tte64 = (((uint64_t)(TTE_VALID_INT | \ 333 (tte_sz) << TTE_SZ_SHFT_INT)) << 32) | \ 334 (((pfn) >> TTE_BSZS_SHIFT(tte_sz)) << \ 335 (TTE_BSZS_SHIFT(tte_sz) + MMU_PAGESHIFT)) | \ 336 (TTE_CP_INT | TTE_CV_INT | TTE_PRIV_INT | TTE_HWWR_INT) 337 338 #define KPM_TTE_VUNCACHED(tte64, pfn, tte_sz) \ 339 tte64 = (((uint64_t)(TTE_VALID_INT | \ 340 (tte_sz) << TTE_SZ_SHFT_INT)) << 32) | \ 341 (((pfn) >> TTE_BSZS_SHIFT(tte_sz)) << \ 342 (TTE_BSZS_SHIFT(tte_sz) + MMU_PAGESHIFT)) | \ 343 (TTE_CP_INT | TTE_PRIV_INT | TTE_HWWR_INT) 344 345 /* 346 * This define provides a generic method to set and clear multiple tte flags. 347 * A bitmask of all flags to be affected is passed in "flags" and a bitmask 348 * of the new values is passed in "newflags". 349 */ 350 #define TTE_SET_LOFLAGS(ttep, flags, newflags) \ 351 ((ttep)->tte_intlo = ((ttep)->tte_intlo & ~(flags)) | (newflags)) 352 353 #define TTE_GET_LOFLAGS(ttep, flags) ((ttep)->tte_intlo & flags) 354 355 #endif /* !_ASM */ 356 357 /* 358 * There is no support for non-coherent I-cache in sun4u 359 */ 360 #define TTE_SOFTEXEC_INT 0x00000000 361 #ifndef _ASM 362 #ifdef lint 363 /* fix lint warnings about constant conditionals and empty if */ 364 #define TTE_IS_SOFTEXEC(ttep) TTE_IS_EXECUTABLE(ttep) 365 #define TTE_SET_SOFTEXEC(ttep) TTE_SET_EXEC(ttep) 366 #define TTE_CLR_SOFTEXEC(ttep) TTE_CLR_EXEC(ttep) 367 #else 368 #define TTE_IS_SOFTEXEC(ttep) (0) 369 #define TTE_SET_SOFTEXEC(ttep) 370 #define TTE_CLR_SOFTEXEC(ttep) 371 #endif /* lint */ 372 #endif /* !_ASM */ 373 374 #ifdef __cplusplus 375 } 376 #endif 377 378 #endif /* !_SYS_PTE_H */ 379