xref: /titanic_50/usr/src/uts/sun4u/sys/pci/pci_fm.h (revision 5aefb6555731130ca4fd295960123d71f2d21fe8)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_PCI_FM_H
28 #define	_PCI_FM_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #include <sys/ddifm.h>
33 
34 #ifdef	__cplusplus
35 extern "C" {
36 #endif
37 
38 #ifdef _KERNEL
39 
40 #define	PBM_PRIMARY		1
41 #define	PBM_SECONDARY		0
42 #define	PBM_NONFATAL		0
43 #define	PBM_FATAL		1
44 #define	CB_NONFATAL		0
45 #define	CB_FATAL		1
46 #define	FM_LOG_PCI		0
47 #define	FM_LOG_PBM		1
48 #define	PCI_SIDEA		0
49 #define	PCI_SIDEB		1
50 #define	ECC_MAX_ERRS		6
51 #define	TARGET_MAX_ERRS		6
52 
53 /*
54  * Since pci_pbm_err_handler() is called by various interrupt/trap/callback
55  * handlers, it is necessary for it to know where it is being called from.
56  * Below are the flags passed to pci_pbm_err_handler() to give it knowledge
57  * of it's caller.
58  */
59 #define	PCI_TRAP_CALL		0x0
60 #define	PCI_CB_CALL		0x1
61 #define	PCI_INTR_CALL		0x2
62 #define	PCI_BUS_EXIT_CALL	0x3
63 #define	PCI_ECC_CALL		0x4
64 
65 #define	PCIX_ERROR_SUBCLASS	"pcix"
66 #define	PCIX_SECONDARY		"s-"
67 #define	PCIX_STAT		"pcix-stat"
68 #define	PCIX_PFAR		"pcix-pfar"
69 
70 extern errorq_t *pci_ecc_queue;		/* per-system ecc handling queue */
71 extern errorq_t *pci_target_queue;	/* per-system target handling queue */
72 
73 /*
74  * region where schizo pio ecc error was detected
75  */
76 typedef enum {
77 	SCH_REG_UPA,
78 	SCH_REG_PCIA_REG,
79 	SCH_REG_PCIA_MEM,
80 	SCH_REG_PCIA_CFGIO,
81 	SCH_REG_PCIB_REG,
82 	SCH_REG_PCIB_MEM,
83 	SCH_REG_PCIB_CFGIO,
84 	SCH_REG_SAFARI_REGS
85 } ecc_region_t;
86 
87 typedef struct pbm_fm_err {
88 	char *pbm_err_class;
89 	uint64_t pbm_reg_bit;
90 	int pbm_pri;
91 	int pbm_flag;
92 	char *pbm_terr_class;
93 } pbm_fm_err_t;
94 
95 typedef struct pci_target_err {
96 	uint64_t tgt_err_addr;
97 	uint64_t tgt_err_ena;
98 	uint64_t tgt_pci_addr;
99 	uint32_t tgt_pci_space;
100 	dev_info_t *tgt_dip;
101 	char *tgt_err_class;
102 	char *tgt_bridge_type;
103 } pci_target_err_t;
104 
105 typedef struct ecc_format {
106 	ecc_region_t ecc_region;
107 	uint64_t ecc_space;
108 	int ecc_side;
109 } ecc_format_t;
110 
111 typedef struct cb_fm_err {
112 	char *cb_err_class;
113 	uint64_t cb_reg_bit;
114 	int cb_fatal;
115 } cb_fm_err_t;
116 
117 typedef struct ecc_fm_err {
118 	char *ecc_err_class;
119 	uint64_t ecc_reg_bit;
120 	int ecc_type;
121 	int ecc_pri;
122 	uint64_t ecc_region_bits;
123 	int ecc_region;
124 	int ecc_flag;
125 } ecc_fm_err_t;
126 
127 /*
128  * iommu errstate used to store iommu specific registers
129  */
130 struct iommu_errstate {
131 	uint64_t iommu_stat;
132 	uint64_t iommu_tfar;
133 };
134 
135 struct pci_errstate {
136 	char *pci_err_class;
137 	uint16_t pci_cfg_stat;
138 	uint16_t pci_cfg_comm;
139 	uint64_t pci_pa;
140 };
141 
142 /*
143  * pbm errstate use to encompass the state for all errors
144  * detected by the pci block
145  */
146 struct pbm_errstate {
147 	char *pbm_err_class;
148 	int pbm_pri;
149 	int pbm_log;
150 	uint32_t pbm_err;
151 	uint32_t pbm_multi;
152 	char *pbm_bridge_type;
153 	uint64_t pbm_ctl_stat;
154 	uint64_t pbm_afsr;
155 	uint64_t pbm_afar;
156 	uint64_t pbm_va_log;
157 	uint64_t pbm_err_sl;
158 	iommu_errstate_t pbm_iommu;
159 	uint64_t pbm_pcix_stat;
160 	uint32_t pbm_pcix_pfar;
161 	pci_errstate_t pbm_pci;
162 	char *pbm_terr_class;
163 };
164 
165 /*
166  * ecc errstate used to store all state captured,
167  * upon detection of an ecc error.
168  */
169 struct ecc_errstate {
170 	char *ecc_bridge_type;
171 	ecc_t *ecc_p;
172 	uint64_t ecc_afsr;
173 	uint64_t ecc_afar;
174 	uint64_t ecc_offset;
175 	uint64_t ecc_dev_id;
176 	uint64_t ecc_dw_offset;
177 	struct async_flt ecc_aflt;
178 	ecc_intr_info_t ecc_ii_p;
179 	uint64_t ecc_ctrl;
180 	int ecc_pri;
181 	ecc_region_t ecc_region;
182 	uint64_t ecc_ena;
183 	uint64_t ecc_err_addr;
184 	char *ecc_err_type;
185 	int ecc_pg_ret;
186 	int ecc_caller;
187 	nvlist_t *ecc_fmri;
188 	uint64_t ecc_dimm_offset;
189 	char ecc_unum[UNUM_NAMLEN];
190 	char ecc_dimm_sid[DIMM_SERIAL_ID_LEN];
191 };
192 
193 /*
194  * control block error state
195  */
196 struct cb_errstate {
197 	char *cb_err_class;
198 	char *cb_bridge_type;
199 	uint64_t cb_csr;
200 	uint64_t cb_err;
201 	uint64_t cb_intr;
202 	uint64_t cb_elog;
203 	uint64_t cb_ecc;
204 	uint64_t cb_pcr;
205 	uint64_t cb_ue_afsr;
206 	uint64_t cb_ue_afar;
207 	uint64_t cb_ce_afsr;
208 	uint64_t cb_ce_afar;
209 	uint64_t cb_first_elog;
210 	uint64_t cb_first_eaddr;
211 	uint64_t cb_leaf_status;
212 	pbm_errstate_t cb_pbm[2];
213 };
214 
215 extern int pci_fm_init_child(dev_info_t *dip, dev_info_t *tdip, int cap,
216 		ddi_iblock_cookie_t *ibc);
217 extern void pci_bus_enter(dev_info_t *dip, ddi_acc_handle_t handle);
218 extern void pci_bus_exit(dev_info_t *dip, ddi_acc_handle_t handle);
219 extern void pbm_ereport_post(dev_info_t *dip, uint64_t ena,
220 		pbm_errstate_t *pbm_err);
221 extern void pci_fm_acc_setup(ddi_map_req_t *mp, dev_info_t *rdip);
222 extern int pci_handle_lookup(dev_info_t *dip, int type, uint64_t fme_ena,
223 		void *afar);
224 extern void pci_fmri_create(dev_info_t *dip, pci_common_t *cmn_p);
225 extern void pci_fm_create(pci_t *pci_p);
226 extern void pci_fm_destroy(pci_t *pci_p);
227 extern int pci_err_callback(dev_info_t *dip, ddi_fm_error_t *derr,
228 		const void *impl_data);
229 #endif /* _KERNEL */
230 
231 #ifdef	__cplusplus
232 }
233 #endif
234 
235 #endif	/* _PCI_FM_H */
236