1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_MACHSYSTM_H 27 #define _SYS_MACHSYSTM_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 /* 32 * Numerous platform-dependent interfaces that don't seem to belong 33 * in any other header file. 34 * 35 * This file should not be included by code that purports to be 36 * platform-independent. 37 */ 38 39 #ifndef _ASM 40 #include <sys/types.h> 41 #include <sys/scb.h> 42 #include <sys/varargs.h> 43 #include <sys/machparam.h> 44 #include <sys/thread.h> 45 #include <vm/seg_enum.h> 46 #include <sys/processor.h> 47 #include <sys/sunddi.h> 48 #include <sys/memlist.h> 49 #include <sys/async.h> 50 #include <sys/errorq.h> 51 #endif /* _ASM */ 52 53 #ifdef __cplusplus 54 extern "C" { 55 #endif 56 57 #ifdef _KERNEL 58 59 #ifndef _ASM 60 /* 61 * The following enum types determine how interrupts are distributed 62 * on a sun4u system. 63 */ 64 enum intr_policies { 65 /* 66 * Target interrupt at the CPU running the add_intrspec 67 * thread. Also used to target all interrupts at the panicing 68 * CPU. 69 */ 70 INTR_CURRENT_CPU = 0, 71 72 /* 73 * Target all interrupts at the boot cpu 74 */ 75 INTR_BOOT_CPU, 76 77 /* 78 * Flat distribution of all interrupts 79 */ 80 INTR_FLAT_DIST, 81 82 /* 83 * Weighted distribution of all interrupts 84 */ 85 INTR_WEIGHTED_DIST 86 }; 87 88 89 /* 90 * Structure that defines the interrupt distribution list. It contains 91 * enough info about the interrupt so that it can callback the parent 92 * nexus driver and retarget the interrupt to a different CPU. 93 */ 94 struct intr_dist { 95 struct intr_dist *next; /* link to next in list */ 96 void (*func)(void *); /* Callback function */ 97 void *arg; /* Nexus parent callback arg 1 */ 98 }; 99 100 /* 101 * Miscellaneous cpu_state changes 102 */ 103 extern void power_down(const char *); 104 extern void do_shutdown(void); 105 106 /* 107 * Number of seconds until power is shut off 108 */ 109 extern int thermal_powerdown_delay; 110 111 112 /* 113 * prom-related 114 */ 115 extern int obpdebug; 116 extern int forthdebug_supported; 117 extern uint_t tba_taken_over; 118 extern void forthdebug_init(void); 119 extern void init_vx_handler(void); 120 extern void kern_preprom(void); 121 extern void kern_postprom(void); 122 123 /* 124 * externally (debugger or prom) initiated panic 125 */ 126 extern struct regs sync_reg_buf; 127 extern uint64_t sync_tt; 128 extern void sync_handler(void); 129 130 /* 131 * Trap-related 132 */ 133 struct regs; 134 extern void trap(struct regs *rp, caddr_t addr, uint32_t type, 135 uint32_t mmu_fsr); 136 extern void *get_tba(void); 137 extern void *set_tba(void *); 138 extern caddr_t set_trap_table(void); 139 extern struct scb trap_table; 140 141 struct trap_info { 142 struct regs *trap_regs; 143 uint_t trap_type; 144 caddr_t trap_addr; 145 uint_t trap_mmu_fsr; 146 }; 147 148 /* 149 * misc. primitives 150 */ 151 extern void debug_flush_windows(void); 152 extern void flush_windows(void); 153 extern int getprocessorid(void); 154 extern void reestablish_curthread(void); 155 156 extern void stphys(uint64_t physaddr, int value); 157 extern int ldphys(uint64_t physaddr); 158 extern void stdphys(uint64_t physaddr, uint64_t value); 159 extern uint64_t lddphys(uint64_t physaddr); 160 161 extern void stphysio(u_longlong_t physaddr, uint_t value); 162 extern uint_t ldphysio(u_longlong_t physaddr); 163 extern void sthphysio(u_longlong_t physaddr, ushort_t value); 164 extern ushort_t ldhphysio(u_longlong_t physaddr); 165 extern void stbphysio(u_longlong_t physaddr, uchar_t value); 166 extern uchar_t ldbphysio(u_longlong_t physaddr); 167 extern void stdphysio(u_longlong_t physaddr, u_longlong_t value); 168 extern u_longlong_t lddphysio(u_longlong_t physaddr); 169 170 extern int pf_is_dmacapable(pfn_t); 171 172 extern int dip_to_cpu_id(dev_info_t *dip, processorid_t *cpu_id); 173 174 extern void set_cmp_error_steering(void); 175 176 /* 177 * SPARCv9 %ver register and field definitions 178 */ 179 180 #define ULTRA_VER_MANUF(x) ((x) >> 48) 181 #define ULTRA_VER_IMPL(x) (((x) >> 32) & 0xFFFF) 182 #define ULTRA_VER_MASK(x) (((x) >> 24) & 0xFF) 183 184 extern uint64_t ultra_getver(void); 185 186 /* 187 * bootup-time 188 */ 189 extern int ncpunode; 190 extern int niobus; 191 192 extern void segnf_init(void); 193 extern void kern_setup1(void); 194 extern void startup(void); 195 extern void post_startup(void); 196 extern void install_va_to_tte(void); 197 extern void setwstate(uint_t); 198 extern void create_va_to_tte(void); 199 extern int memscrub_init(void); 200 201 extern void kcpc_hw_init(void); 202 extern void kcpc_hw_startup_cpu(ushort_t); 203 extern int kcpc_hw_load_pcbe(void); 204 205 /* 206 * Interrupts 207 */ 208 struct cpu; 209 extern struct cpu cpu0; 210 extern size_t intr_add_pools; 211 extern struct intr_req *intr_add_head; 212 extern struct intr_req *intr_add_tail; 213 extern struct scb *set_tbr(struct scb *); 214 215 extern uint_t disable_vec_intr(void); 216 extern void enable_vec_intr(uint_t); 217 extern void setintrenable(int); 218 219 extern void intr_dist_add(void (*f)(void *), void *); 220 extern void intr_dist_rem(void (*f)(void *), void *); 221 extern void intr_dist_add_weighted(void (*f)(void *, int32_t, int32_t), void *); 222 extern void intr_dist_rem_weighted(void (*f)(void *, int32_t, int32_t), void *); 223 224 extern uint32_t intr_dist_cpuid(void); 225 226 void intr_dist_cpuid_add_device_weight(uint32_t cpuid, dev_info_t *dip, 227 int32_t weight); 228 void intr_dist_cpuid_rem_device_weight(uint32_t cpuid, dev_info_t *dip); 229 230 extern void intr_redist_all_cpus(void); 231 extern void intr_redist_all_cpus_shutdown(void); 232 233 extern void send_dirint(int, int); 234 extern void setsoftint(uint_t); 235 extern void setsoftint_tl1(uint64_t, uint64_t); 236 extern void siron(void); 237 extern uint64_t getidsr(void); 238 extern void intr_enqueue_req(uint_t pil, uint32_t inum); 239 extern void intr_dequeue_req(uint_t pil, uint32_t inum); 240 extern void wr_clr_softint(uint_t); 241 242 /* 243 * Time- and %tick-related 244 */ 245 extern hrtime_t rdtick(void); 246 extern void tick_write_delta(uint64_t); 247 extern void tickcmpr_set(uint64_t); 248 extern void tickcmpr_reset(void); 249 extern void tickcmpr_disable(void); 250 extern int tickcmpr_disabled(void); 251 extern uint32_t cbe_level14_inum; 252 253 /* 254 * Caches 255 */ 256 extern int vac; 257 extern int cache; 258 extern int use_mp; 259 extern uint_t vac_mask; 260 extern uint64_t ecache_flushaddr; 261 extern int dcache_size; /* Maximum dcache size */ 262 extern int dcache_linesize; /* Minimum dcache linesize */ 263 extern int icache_size; /* Maximum icache size */ 264 extern int icache_linesize; /* Minimum icache linesize */ 265 extern int ecache_alignsize; /* Maximum ecache linesize for struct align */ 266 extern int ecache_size; /* Maximum ecache size */ 267 extern int ecache_associativity; /* ecache associativity */ 268 extern int ecache_setsize; /* Maximum ecache setsize possible */ 269 extern int cpu_setsize; /* Maximum ecache setsize of configured cpus */ 270 271 /* 272 * VM 273 */ 274 extern int do_pg_coloring; 275 extern int do_virtual_coloring; 276 extern int use_page_coloring; 277 extern int use_virtual_coloring; 278 extern uint_t vac_colors_mask; 279 280 extern void ndata_alloc_init(struct memlist *, uintptr_t, uintptr_t); 281 extern void *ndata_alloc(struct memlist *, size_t, size_t); 282 extern void *ndata_extra_base(struct memlist *, size_t); 283 extern size_t ndata_maxsize(struct memlist *); 284 extern size_t ndata_spare(struct memlist *, size_t, size_t); 285 extern int ndata_alloc_cpus(struct memlist *); 286 extern int ndata_alloc_page_freelists(struct memlist *, int); 287 extern int ndata_alloc_dmv(struct memlist *); 288 extern int ndata_alloc_tsbs(struct memlist *, pgcnt_t); 289 extern int ndata_alloc_hat(struct memlist *, pgcnt_t, pgcnt_t); 290 extern caddr_t alloc_page_freelists(int, caddr_t, int); 291 extern caddr_t alloc_hme_buckets(caddr_t, int); 292 extern size_t page_ctrs_sz(void); 293 extern caddr_t page_ctrs_alloc(caddr_t); 294 extern void page_freelist_coalesce_all(int); 295 extern void ppmapinit(void); 296 extern void hwblkpagecopy(const void *, void *); 297 extern void hw_pa_bcopy32(uint64_t, uint64_t); 298 299 extern int pp_slots; 300 extern int pp_consistent_coloring; 301 302 /* 303 * ppcopy/hwblkpagecopy interaction. See ppage.c. 304 */ 305 #define PPAGE_STORE_VCOLORING 0x1 /* use vcolors to maintain consistency */ 306 #define PPAGE_LOAD_VCOLORING 0x2 /* use vcolors to maintain consistency */ 307 #define PPAGE_STORES_POLLUTE 0x4 /* stores pollute VAC */ 308 #define PPAGE_LOADS_POLLUTE 0x8 /* loads pollute VAC */ 309 310 /* 311 * VIS-accelerated copy/zero 312 */ 313 extern int use_hw_bcopy; 314 extern uint_t hw_copy_limit_1; 315 extern uint_t hw_copy_limit_2; 316 extern uint_t hw_copy_limit_4; 317 extern uint_t hw_copy_limit_8; 318 extern int use_hw_bzero; 319 320 #ifdef CHEETAH 321 #define VIS_COPY_THRESHOLD 256 322 #else 323 #define VIS_COPY_THRESHOLD 900 324 #endif 325 326 /* 327 * MP 328 */ 329 extern void idle_other_cpus(void); 330 extern void resume_other_cpus(void); 331 extern void stop_other_cpus(void); 332 extern void idle_stop_xcall(void); 333 extern void set_idle_cpu(int); 334 extern void unset_idle_cpu(int); 335 extern void mp_cpu_quiesce(struct cpu *); 336 337 /* 338 * Error handling 339 */ 340 extern void set_error_enable(uint64_t neer); 341 extern void set_error_enable_tl1(uint64_t neer, uint64_t action); 342 extern uint64_t get_error_enable(void); 343 extern void get_asyncflt(uint64_t *afsr); 344 extern void set_asyncflt(uint64_t afsr); 345 extern void get_asyncaddr(uint64_t *afar); 346 extern void scrubphys(uint64_t paddr, int ecache_size); 347 extern void clearphys(uint64_t paddr, int ecache_size, int ecache_linesize); 348 extern void flushecacheline(uint64_t paddr, int ecache_size); 349 extern int ce_scrub_xdiag_recirc(struct async_flt *, errorq_t *, 350 errorq_elem_t *, size_t); 351 extern char *flt_to_error_type(struct async_flt *); 352 353 /* 354 * Panic at TL > 0 355 */ 356 extern uint64_t cpu_pa[]; 357 extern void ptl1_init_cpu(struct cpu *); 358 359 /* 360 * Defines for DR interfaces 361 */ 362 #define DEVI_BRANCH_CHILD 0x01 /* Walk immediate children of root */ 363 #define DEVI_BRANCH_CONFIGURE 0x02 /* Configure branch after create */ 364 #define DEVI_BRANCH_DESTROY 0x04 /* Destroy branch after unconfigure */ 365 #define DEVI_BRANCH_EVENT 0x08 /* Post NDI event */ 366 #define DEVI_BRANCH_PROM 0x10 /* Branches derived from PROM nodes */ 367 #define DEVI_BRANCH_SID 0x20 /* SID node branches */ 368 #define DEVI_BRANCH_ROOT 0x40 /* Node is the root of a branch */ 369 370 typedef struct devi_branch { 371 void *arg; 372 void (*devi_branch_callback)(dev_info_t *, void *, uint_t); 373 int type; 374 union { 375 int (*prom_branch_select)(pnode_t, void *, uint_t); 376 int (*sid_branch_create)(dev_info_t *, void *, uint_t); 377 } create; 378 } devi_branch_t; 379 380 381 /* 382 * Prototypes which really belongs to sunddi.c, and should be moved to 383 * sunddi.c if there is another platform using these calls. 384 */ 385 extern int e_ddi_branch_create(dev_info_t *pdip, devi_branch_t *bp, 386 dev_info_t **dipp, uint_t flags); 387 extern int e_ddi_branch_configure(dev_info_t *rdip, dev_info_t **dipp, 388 uint_t flags); 389 extern int e_ddi_branch_unconfigure(dev_info_t *rdip, dev_info_t **dipp, 390 uint_t flags); 391 extern int e_ddi_branch_destroy(dev_info_t *rdip, dev_info_t **dipp, 392 uint_t flags); 393 extern void e_ddi_branch_hold(dev_info_t *rdip); 394 extern void e_ddi_branch_rele(dev_info_t *rdip); 395 extern int e_ddi_branch_held(dev_info_t *rdip); 396 extern int e_ddi_branch_referenced(dev_info_t *rdip, 397 int (*cb)(dev_info_t *dip, void *, uint_t), void *arg); 398 399 /* 400 * Constants which define the "hole" in the 64-bit sfmmu address space. 401 * These are set to specific values by the CPU module code. 402 */ 403 extern caddr_t hole_start, hole_end; 404 405 /* kpm mapping window */ 406 extern size_t kpm_size; 407 extern uchar_t kpm_size_shift; 408 extern caddr_t kpm_vbase; 409 410 #define INVALID_VADDR(a) (((a) >= hole_start && (a) < hole_end)) 411 412 extern void adjust_hw_copy_limits(int); 413 414 #endif /* _ASM */ 415 416 /* 417 * Actions for set_error_enable_tl1 418 */ 419 #define EER_SET_ABSOLUTE 0x0 420 #define EER_SET_SETBITS 0x1 421 #define EER_SET_CLRBITS 0x2 422 423 #endif /* _KERNEL */ 424 425 #ifdef __cplusplus 426 } 427 #endif 428 429 #endif /* _SYS_MACHSYSTM_H */ 430