1*7c478bd9Sstevel@tonic-gate /* 2*7c478bd9Sstevel@tonic-gate * CDDL HEADER START 3*7c478bd9Sstevel@tonic-gate * 4*7c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*7c478bd9Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*7c478bd9Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*7c478bd9Sstevel@tonic-gate * with the License. 8*7c478bd9Sstevel@tonic-gate * 9*7c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*7c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*7c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 12*7c478bd9Sstevel@tonic-gate * and limitations under the License. 13*7c478bd9Sstevel@tonic-gate * 14*7c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*7c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*7c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*7c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*7c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*7c478bd9Sstevel@tonic-gate * 20*7c478bd9Sstevel@tonic-gate * CDDL HEADER END 21*7c478bd9Sstevel@tonic-gate */ 22*7c478bd9Sstevel@tonic-gate /* 23*7c478bd9Sstevel@tonic-gate * Copyright (c) 1991-2000 by Sun Microsystems, Inc. 24*7c478bd9Sstevel@tonic-gate * All rights reserved. 25*7c478bd9Sstevel@tonic-gate */ 26*7c478bd9Sstevel@tonic-gate 27*7c478bd9Sstevel@tonic-gate #ifndef _SYS_IOMMU_H 28*7c478bd9Sstevel@tonic-gate #define _SYS_IOMMU_H 29*7c478bd9Sstevel@tonic-gate 30*7c478bd9Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 31*7c478bd9Sstevel@tonic-gate 32*7c478bd9Sstevel@tonic-gate #if defined(_KERNEL) && !defined(_ASM) 33*7c478bd9Sstevel@tonic-gate #include <sys/sunddi.h> 34*7c478bd9Sstevel@tonic-gate #include <sys/sysiosbus.h> 35*7c478bd9Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 36*7c478bd9Sstevel@tonic-gate #endif /* defined(_KERNEL) && !defined(_ASM) */ 37*7c478bd9Sstevel@tonic-gate 38*7c478bd9Sstevel@tonic-gate #ifdef __cplusplus 39*7c478bd9Sstevel@tonic-gate extern "C" { 40*7c478bd9Sstevel@tonic-gate #endif 41*7c478bd9Sstevel@tonic-gate 42*7c478bd9Sstevel@tonic-gate #ifndef _ASM 43*7c478bd9Sstevel@tonic-gate /* constants for DVMA */ 44*7c478bd9Sstevel@tonic-gate /* 45*7c478bd9Sstevel@tonic-gate * It takes an 8byte TSB entry to map i an 8k page, so the conversion 46*7c478bd9Sstevel@tonic-gate * from tsb size to dvma mapping is to multiply by 1000 or 0x400 47*7c478bd9Sstevel@tonic-gate * left shift by 10 does this 48*7c478bd9Sstevel@tonic-gate */ 49*7c478bd9Sstevel@tonic-gate #define IOMMU_TSB_TO_RNG 0xa 50*7c478bd9Sstevel@tonic-gate #define IOMMU_TSB_SIZE_8M 0x2000 51*7c478bd9Sstevel@tonic-gate #define IOMMU_TSB_SIZE_16M 0x4000 52*7c478bd9Sstevel@tonic-gate #define IOMMU_TSB_SIZE_32M 0x8000 53*7c478bd9Sstevel@tonic-gate #define IOMMU_TSB_SIZE_64M 0x10000 54*7c478bd9Sstevel@tonic-gate #define IOMMU_TSB_SIZE_128M 0x20000 55*7c478bd9Sstevel@tonic-gate #define IOMMU_TSB_SIZE_256M 0x40000 56*7c478bd9Sstevel@tonic-gate #define IOMMU_TSB_SIZE_512M 0x80000 57*7c478bd9Sstevel@tonic-gate #define IOMMU_TSB_SIZE_1G 0x100000 58*7c478bd9Sstevel@tonic-gate 59*7c478bd9Sstevel@tonic-gate #define IOMMU_PAGESIZE 0x2000 /* 8k page */ 60*7c478bd9Sstevel@tonic-gate #define IOMMU_PAGEMASK 0x1fff 61*7c478bd9Sstevel@tonic-gate #define IOMMU_PAGEOFFSET (IOMMU_PAGESIZE - 1) 62*7c478bd9Sstevel@tonic-gate #define IOMMU_N_TTES (IOMMU_DVMA_RANGE/IOMMU_PAGESIZE) 63*7c478bd9Sstevel@tonic-gate #define IOMMU_TSB_TBL_SIZE (IOMMU_N_TTES << 3) /* 8B for each entry */ 64*7c478bd9Sstevel@tonic-gate #define IOMMU_PAGESHIFT 13 65*7c478bd9Sstevel@tonic-gate 66*7c478bd9Sstevel@tonic-gate #define OFF_IOMMU_CTRL_REG 0x2400 67*7c478bd9Sstevel@tonic-gate #define IOMMU_CTRL_REG_SIZE (NATURAL_REG_SIZE) 68*7c478bd9Sstevel@tonic-gate #define OFF_TSB_BASE_ADDR 0x2408 69*7c478bd9Sstevel@tonic-gate #define TSB_BASE_ADDR_SIZE (NATURAL_REG_SIZE) 70*7c478bd9Sstevel@tonic-gate #define OFF_IOMMU_FLUSH_REG 0x2410 71*7c478bd9Sstevel@tonic-gate #define IOMMU_FLUSH_REG (NATURAL_REG_SIZE) 72*7c478bd9Sstevel@tonic-gate #define OFF_IOMMU_TLB_TAG 0x4580 73*7c478bd9Sstevel@tonic-gate #define OFF_IOMMU_TLB_DATA 0x4600 74*7c478bd9Sstevel@tonic-gate 75*7c478bd9Sstevel@tonic-gate #define TSB_SIZE 3 /* 64M of DVMA */ 76*7c478bd9Sstevel@tonic-gate #define TSB_SIZE_SHIFT 16 77*7c478bd9Sstevel@tonic-gate #define IOMMU_TLB_ENTRIES 16 78*7c478bd9Sstevel@tonic-gate 79*7c478bd9Sstevel@tonic-gate #define IOMMU_DISABLE 0 /* Turns off the IOMMU */ 80*7c478bd9Sstevel@tonic-gate #define IOMMU_ENABLE 1 /* Turns on the IOMMU */ 81*7c478bd9Sstevel@tonic-gate #define IOMMU_TLB_VALID 0x40000000ull 82*7c478bd9Sstevel@tonic-gate #define IOMMU_DIAG_ENABLE 0x2ull 83*7c478bd9Sstevel@tonic-gate 84*7c478bd9Sstevel@tonic-gate /* 85*7c478bd9Sstevel@tonic-gate * Bit positions in the TLB entries 86*7c478bd9Sstevel@tonic-gate */ 87*7c478bd9Sstevel@tonic-gate #define IOMMU_TLBTAG_WRITABLE (1 << 21) 88*7c478bd9Sstevel@tonic-gate #define IOMMU_TLBTAB_STREAM (1 << 20) 89*7c478bd9Sstevel@tonic-gate #define IOMMU_TLBTAG_SIZE (1 << 19) 90*7c478bd9Sstevel@tonic-gate #define IOMMU_TLBTAG_VA_MASK 0x7ffff /* 19-bit vpn */ 91*7c478bd9Sstevel@tonic-gate #define IOMMU_TLBTAG_VA_SHIFT 13 92*7c478bd9Sstevel@tonic-gate 93*7c478bd9Sstevel@tonic-gate #define IOMMU_TLBDATA_VALID (1 << 30) 94*7c478bd9Sstevel@tonic-gate #define IOMMU_TLBDATA_LOCAL (1 << 29) 95*7c478bd9Sstevel@tonic-gate #define IOMMU_TLBDATA_CACHEABLE (1 << 28) 96*7c478bd9Sstevel@tonic-gate #define IOMMU_TLBDATA_PA_MASK 0xfffffff /* 28-bit ppn */ 97*7c478bd9Sstevel@tonic-gate #define IOMMU_TLBDATA_PA_SHIFT 13 98*7c478bd9Sstevel@tonic-gate 99*7c478bd9Sstevel@tonic-gate /* 100*7c478bd9Sstevel@tonic-gate * define IOPTEs 101*7c478bd9Sstevel@tonic-gate */ 102*7c478bd9Sstevel@tonic-gate #define IOTTE_PFN_MSK 0x1ffffffe000ull 103*7c478bd9Sstevel@tonic-gate #define IOTTE_CACHE 0x10ull 104*7c478bd9Sstevel@tonic-gate #define IOTTE_WRITE 0x2ull 105*7c478bd9Sstevel@tonic-gate #define IOTTE_STREAM 0x1000000000000000ull 106*7c478bd9Sstevel@tonic-gate #define IOTTE_INTRA 0x800000000000000ull 107*7c478bd9Sstevel@tonic-gate #define IOTTE_64K_PAGE 0x2000000000000000ull 108*7c478bd9Sstevel@tonic-gate #endif /* _ASM */ 109*7c478bd9Sstevel@tonic-gate #define IOTTE_VALID 0x8000000000000000ull 110*7c478bd9Sstevel@tonic-gate #define IOTTE_PFN_SHIFT 13 111*7c478bd9Sstevel@tonic-gate 112*7c478bd9Sstevel@tonic-gate /* 113*7c478bd9Sstevel@tonic-gate * IOMMU pages to bytes, and back (with and without rounding) 114*7c478bd9Sstevel@tonic-gate */ 115*7c478bd9Sstevel@tonic-gate #define iommu_ptob(x) ((x) << IOMMU_PAGESHIFT) 116*7c478bd9Sstevel@tonic-gate #define iommu_btop(x) (((ioaddr_t)(x)) >> IOMMU_PAGESHIFT) 117*7c478bd9Sstevel@tonic-gate #define iommu_btopr(x) \ 118*7c478bd9Sstevel@tonic-gate ((((ioaddr_t)(x) + IOMMU_PAGEOFFSET) >> IOMMU_PAGESHIFT)) 119*7c478bd9Sstevel@tonic-gate 120*7c478bd9Sstevel@tonic-gate #if defined(_KERNEL) && !defined(_ASM) 121*7c478bd9Sstevel@tonic-gate 122*7c478bd9Sstevel@tonic-gate /* sbus nexus private dma mapping structure. */ 123*7c478bd9Sstevel@tonic-gate struct dma_impl_priv { 124*7c478bd9Sstevel@tonic-gate ddi_dma_impl_t mp; 125*7c478bd9Sstevel@tonic-gate struct sbus_soft_state *softsp; 126*7c478bd9Sstevel@tonic-gate volatile int sync_flag; 127*7c478bd9Sstevel@tonic-gate uint64_t phys_sync_flag; 128*7c478bd9Sstevel@tonic-gate }; 129*7c478bd9Sstevel@tonic-gate 130*7c478bd9Sstevel@tonic-gate extern int iommu_init(struct sbus_soft_state *, caddr_t); 131*7c478bd9Sstevel@tonic-gate extern int iommu_resume_init(struct sbus_soft_state *); 132*7c478bd9Sstevel@tonic-gate extern int iommu_dma_mctl(dev_info_t *, dev_info_t *, ddi_dma_handle_t, 133*7c478bd9Sstevel@tonic-gate enum ddi_dma_ctlops, off_t *, size_t *, caddr_t *, uint_t); 134*7c478bd9Sstevel@tonic-gate extern int iommu_dma_map(dev_info_t *, dev_info_t *, struct ddi_dma_req *, 135*7c478bd9Sstevel@tonic-gate ddi_dma_handle_t *); 136*7c478bd9Sstevel@tonic-gate extern int iommu_dma_allochdl(dev_info_t *, dev_info_t *, ddi_dma_attr_t *, 137*7c478bd9Sstevel@tonic-gate int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *); 138*7c478bd9Sstevel@tonic-gate extern int iommu_dma_freehdl(dev_info_t *, dev_info_t *, ddi_dma_handle_t); 139*7c478bd9Sstevel@tonic-gate extern int iommu_dma_bindhdl(dev_info_t *, dev_info_t *, ddi_dma_handle_t, 140*7c478bd9Sstevel@tonic-gate struct ddi_dma_req *, ddi_dma_cookie_t *, uint_t *); 141*7c478bd9Sstevel@tonic-gate extern int iommu_dma_unbindhdl(dev_info_t *, dev_info_t *, ddi_dma_handle_t); 142*7c478bd9Sstevel@tonic-gate extern int iommu_dma_flush(dev_info_t *, dev_info_t *, ddi_dma_handle_t, 143*7c478bd9Sstevel@tonic-gate off_t, size_t, uint_t); 144*7c478bd9Sstevel@tonic-gate extern int iommu_dma_win(dev_info_t *, dev_info_t *, ddi_dma_handle_t, 145*7c478bd9Sstevel@tonic-gate uint_t, off_t *, size_t *, ddi_dma_cookie_t *, uint_t *); 146*7c478bd9Sstevel@tonic-gate 147*7c478bd9Sstevel@tonic-gate extern void iommu_dvma_kaddr_load(ddi_dma_handle_t h, caddr_t a, uint_t len, 148*7c478bd9Sstevel@tonic-gate uint_t index, ddi_dma_cookie_t *cp); 149*7c478bd9Sstevel@tonic-gate 150*7c478bd9Sstevel@tonic-gate extern void iommu_dvma_unload(ddi_dma_handle_t h, uint_t objindex, uint_t view); 151*7c478bd9Sstevel@tonic-gate 152*7c478bd9Sstevel@tonic-gate extern void iommu_dvma_sync(ddi_dma_handle_t h, uint_t objindex, uint_t view); 153*7c478bd9Sstevel@tonic-gate 154*7c478bd9Sstevel@tonic-gate #endif /* _KERNEL && !_ASM */ 155*7c478bd9Sstevel@tonic-gate 156*7c478bd9Sstevel@tonic-gate #ifdef __cplusplus 157*7c478bd9Sstevel@tonic-gate } 158*7c478bd9Sstevel@tonic-gate #endif 159*7c478bd9Sstevel@tonic-gate 160*7c478bd9Sstevel@tonic-gate #endif /* _SYS_IOMMU_H */ 161