1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 /* 30 * PCI nexus HotPlug devctl interface 31 */ 32 #include <sys/types.h> 33 #include <sys/conf.h> 34 #include <sys/kmem.h> 35 #include <sys/async.h> 36 #include <sys/sysmacros.h> 37 #include <sys/sunddi.h> 38 #include <sys/sunndi.h> 39 #include <sys/ddi_impldefs.h> 40 #include <sys/pci/pci_obj.h> 41 #include <sys/pci_tools.h> 42 #include <sys/pci/pci_tools_ext.h> 43 #include <sys/open.h> 44 #include <sys/errno.h> 45 #include <sys/file.h> 46 #include <sys/policy.h> 47 #include <sys/hotplug/pci/pcihp.h> 48 49 /*LINTLIBRARY*/ 50 51 static int pci_open(dev_t *devp, int flags, int otyp, cred_t *credp); 52 static int pci_close(dev_t dev, int flags, int otyp, cred_t *credp); 53 static int pci_devctl_ioctl(dev_info_t *dip, int cmd, intptr_t arg, int mode, 54 cred_t *credp, int *rvalp); 55 static int pci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, 56 cred_t *credp, int *rvalp); 57 static int pci_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, 58 int flags, char *name, caddr_t valuep, int *lengthp); 59 60 struct cb_ops pci_cb_ops = { 61 pci_open, /* open */ 62 pci_close, /* close */ 63 nodev, /* strategy */ 64 nodev, /* print */ 65 nodev, /* dump */ 66 nodev, /* read */ 67 nodev, /* write */ 68 pci_ioctl, /* ioctl */ 69 nodev, /* devmap */ 70 nodev, /* mmap */ 71 nodev, /* segmap */ 72 nochpoll, /* poll */ 73 pci_prop_op, /* cb_prop_op */ 74 NULL, /* streamtab */ 75 D_NEW | D_MP | D_HOTPLUG, /* Driver compatibility flag */ 76 CB_REV, /* rev */ 77 nodev, /* int (*cb_aread)() */ 78 nodev /* int (*cb_awrite)() */ 79 }; 80 81 extern struct cb_ops *pcihp_ops; 82 83 /* ARGSUSED3 */ 84 static int 85 pci_open(dev_t *devp, int flags, int otyp, cred_t *credp) 86 { 87 pci_t *pci_p; 88 int rval; 89 uint_t orig_pci_soft_state; 90 91 /* 92 * Make sure the open is for the right file type. 93 */ 94 if (otyp != OTYP_CHR) 95 return (EINVAL); 96 97 /* 98 * Get the soft state structure for the device. 99 */ 100 pci_p = DEV_TO_SOFTSTATE(*devp); 101 if (pci_p == NULL) 102 return (ENXIO); 103 104 /* 105 * Handle the open by tracking the device state. 106 */ 107 DEBUG2(DBG_OPEN, pci_p->pci_dip, "devp=%x: flags=%x\n", devp, flags); 108 mutex_enter(&pci_p->pci_mutex); 109 orig_pci_soft_state = pci_p->pci_soft_state; 110 if (flags & FEXCL) { 111 if (pci_p->pci_soft_state != PCI_SOFT_STATE_CLOSED) { 112 mutex_exit(&pci_p->pci_mutex); 113 DEBUG0(DBG_OPEN, pci_p->pci_dip, "busy\n"); 114 return (EBUSY); 115 } 116 pci_p->pci_soft_state = PCI_SOFT_STATE_OPEN_EXCL; 117 } else { 118 if (pci_p->pci_soft_state == PCI_SOFT_STATE_OPEN_EXCL) { 119 mutex_exit(&pci_p->pci_mutex); 120 DEBUG0(DBG_OPEN, pci_p->pci_dip, "busy\n"); 121 return (EBUSY); 122 } 123 pci_p->pci_soft_state = PCI_SOFT_STATE_OPEN; 124 } 125 126 if (pci_p->hotplug_capable == B_TRUE) { 127 if (rval = pcihp_ops->cb_open(devp, flags, otyp, credp)) { 128 pci_p->pci_soft_state = orig_pci_soft_state; 129 mutex_exit(&pci_p->pci_mutex); 130 return (rval); 131 } 132 } 133 134 pci_p->pci_open_count++; 135 mutex_exit(&pci_p->pci_mutex); 136 137 return (0); 138 } 139 140 141 /* ARGSUSED */ 142 static int 143 pci_close(dev_t dev, int flags, int otyp, cred_t *credp) 144 { 145 pci_t *pci_p; 146 int rval; 147 148 if (otyp != OTYP_CHR) 149 return (EINVAL); 150 151 pci_p = DEV_TO_SOFTSTATE(dev); 152 if (pci_p == NULL) 153 return (ENXIO); 154 155 DEBUG2(DBG_CLOSE, pci_p->pci_dip, "dev=%x: flags=%x\n", dev, flags); 156 mutex_enter(&pci_p->pci_mutex); 157 158 if (pci_p->hotplug_capable == B_TRUE) 159 if (rval = pcihp_ops->cb_close(dev, flags, otyp, credp)) { 160 mutex_exit(&pci_p->pci_mutex); 161 return (rval); 162 } 163 164 pci_p->pci_soft_state = PCI_SOFT_STATE_CLOSED; 165 pci_p->pci_open_count = 0; 166 mutex_exit(&pci_p->pci_mutex); 167 return (0); 168 } 169 170 /* ARGSUSED */ 171 static int 172 pci_devctl_ioctl(dev_info_t *dip, int cmd, intptr_t arg, int mode, 173 cred_t *credp, int *rvalp) 174 { 175 int rv = 0; 176 struct devctl_iocdata *dcp; 177 uint_t bus_state; 178 179 /* 180 * We can use the generic implementation for these ioctls 181 */ 182 switch (cmd) { 183 case DEVCTL_DEVICE_GETSTATE: 184 case DEVCTL_DEVICE_ONLINE: 185 case DEVCTL_DEVICE_OFFLINE: 186 case DEVCTL_BUS_GETSTATE: 187 return (ndi_devctl_ioctl(dip, cmd, arg, mode, 0)); 188 } 189 190 /* 191 * read devctl ioctl data 192 */ 193 if (ndi_dc_allochdl((void *)arg, &dcp) != NDI_SUCCESS) 194 return (EFAULT); 195 196 switch (cmd) { 197 198 case DEVCTL_DEVICE_RESET: 199 DEBUG0(DBG_IOCTL, dip, "DEVCTL_DEVICE_RESET\n"); 200 rv = ENOTSUP; 201 break; 202 203 204 case DEVCTL_BUS_QUIESCE: 205 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_QUIESCE\n"); 206 if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) 207 if (bus_state == BUS_QUIESCED) 208 break; 209 (void) ndi_set_bus_state(dip, BUS_QUIESCED); 210 break; 211 212 case DEVCTL_BUS_UNQUIESCE: 213 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_UNQUIESCE\n"); 214 if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) 215 if (bus_state == BUS_ACTIVE) 216 break; 217 (void) ndi_set_bus_state(dip, BUS_ACTIVE); 218 break; 219 220 case DEVCTL_BUS_RESET: 221 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_RESET\n"); 222 rv = ENOTSUP; 223 break; 224 225 case DEVCTL_BUS_RESETALL: 226 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_RESETALL\n"); 227 rv = ENOTSUP; 228 break; 229 230 default: 231 rv = ENOTTY; 232 } 233 234 ndi_dc_freehdl(dcp); 235 return (rv); 236 } 237 238 239 static int 240 pci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, int *rvalp) 241 { 242 pci_t *pci_p; 243 dev_info_t *dip; 244 minor_t minor = getminor(dev); 245 int rv = ENOTTY; 246 247 pci_p = DEV_TO_SOFTSTATE(dev); 248 if (pci_p == NULL) 249 return (ENXIO); 250 251 dip = pci_p->pci_dip; 252 DEBUG2(DBG_IOCTL, dip, "dev=%x: cmd=%x\n", dev, cmd); 253 254 #ifdef PCI_DMA_TEST 255 if (IS_DMATEST(cmd)) { 256 *rvalp = pci_dma_test(cmd, dip, pci_p, arg); 257 return (0); 258 } 259 #endif 260 261 switch (PCIHP_AP_MINOR_NUM_TO_PCI_DEVNUM(minor)) { 262 case PCI_TOOL_REG_MINOR_NUM: 263 264 switch (cmd) { 265 case PCITOOL_DEVICE_SET_REG: 266 case PCITOOL_DEVICE_GET_REG: 267 268 /* Require full privileges. */ 269 if (secpolicy_kmdb(credp)) 270 rv = EPERM; 271 else 272 rv = pcitool_dev_reg_ops( 273 dev, (void *)arg, cmd, mode); 274 break; 275 276 case PCITOOL_NEXUS_SET_REG: 277 case PCITOOL_NEXUS_GET_REG: 278 279 /* Require full privileges. */ 280 if (secpolicy_kmdb(credp)) 281 rv = EPERM; 282 else 283 rv = pcitool_bus_reg_ops( 284 dev, (void *)arg, cmd, mode); 285 break; 286 } 287 288 break; 289 290 case PCI_TOOL_INTR_MINOR_NUM: 291 292 switch (cmd) { 293 case PCITOOL_DEVICE_SET_INTR: 294 295 /* Require PRIV_SYS_RES_CONFIG, same as psradm */ 296 if (secpolicy_ponline(credp)) { 297 rv = EPERM; 298 break; 299 } 300 301 /*FALLTHRU*/ 302 /* These require no special privileges. */ 303 case PCITOOL_DEVICE_GET_INTR: 304 case PCITOOL_DEVICE_NUM_INTR: 305 rv = pcitool_intr_admn(dev, (void *)arg, cmd, mode); 306 break; 307 } 308 309 break; 310 311 /* 312 * All non-PCItool ioctls go through here, including: 313 * devctl ioctls with minor number PCIHP_DEVCTL_MINOR and 314 * those for attachment points with where minor number is the 315 * device number. 316 */ 317 default: 318 if (pci_p->hotplug_capable == B_TRUE) 319 rv = pcihp_ops->cb_ioctl( 320 dev, cmd, arg, mode, credp, rvalp); 321 else 322 rv = pci_devctl_ioctl( 323 dip, cmd, arg, mode, credp, rvalp); 324 break; 325 } 326 327 return (rv); 328 } 329 330 static int pci_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, 331 int flags, char *name, caddr_t valuep, int *lengthp) 332 { 333 if (ddi_prop_exists(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 334 "hotplug-capable")) 335 return ((pcihp_get_cb_ops())->cb_prop_op(dev, dip, 336 prop_op, flags, name, valuep, lengthp)); 337 338 return (ddi_prop_op(dev, dip, prop_op, flags, name, valuep, lengthp)); 339 } 340