xref: /titanic_50/usr/src/uts/sun4u/chicago/io/ppm.conf (revision 49335bdececa5fc091b6c63763f9176524390b5e)
1#
2# CDDL HEADER START
3#
4# The contents of this file are subject to the terms of the
5# Common Development and Distribution License, Version 1.0 only
6# (the "License").  You may not use this file except in compliance
7# with the License.
8#
9# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10# or http://www.opensolaris.org/os/licensing.
11# See the License for the specific language governing permissions
12# and limitations under the License.
13#
14# When distributing Covered Code, include this CDDL HEADER in each
15# file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16# If applicable, add the following below this CDDL HEADER, with the
17# fields enclosed by brackets "[]" replaced with your own identifying
18# information: Portions Copyright [yyyy] [name of copyright owner]
19#
20# CDDL HEADER END
21#
22#
23# Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24# Use is subject to license terms.
25#
26#pragma ident	"%Z%%M%	%I%	%E% SMI"
27#
28
29name="ppm" parent="pseudo" instance=0;
30
31#
32# ppm configuration format
33#
34# "ppm-domains" - in form of "domain_xxx" where "xxx" string highlights
35# the nature of the domain;
36#
37# "domain_xxx-model" - PM model: CPU, PCI, PCI_PROP, PCIE, FET or LED.
38#
39# "domain_xxx-propname" - a property name that is exported by device in
40# a domain.  Currently, it is used by PCI_PROP model to identify devices
41# that are to have their clocks stopped when all power-manageable devices
42# in the domain are at D3 power level.
43#
44# "domain-xxx-devices" - a list of prom path match patterns to match devices
45# that fall into "domain_xxx", where wildcard '*' is allowed by observing
46# the following expectations:
47#	. a single wildcard with exact match up to (but exclude) the wildcard
48#	  which then terminates the match pattern;
49#	. a single wildcard that does not terminate a match pattern must
50#	  match driver name (followed by '@');
51#	. with two wildcard occurences, the first is to match driver name,
52#	  the second function id, as well as the last character of the match
53#	  pattern.
54#
55# "domain-xxx-ctrl" - blank space separated definitions in the form of
56# keyword=definition [keyword=definition...]
57#    The keywords are as follows, where 'method' must come before mask as it
58#       tells how to store 'mask' and 'val'.  Missing 'val' defaults to 0.
59#
60#    which keywords apply depends on cmd.  There are two sets as shown below.
61#    Here is the first:
62#	cmd=[CPU_GO | LED_ON | LED_OFF | FET_ON | FET_OFF | CLK_ON | CLK_OFF]
63# 	path=<prompath>	- control device's prom pathname (includes minor)
64# 	method=[KIO|I2CKIO]	This selects a method which may be
65#		an ioctl that sets a single value or an i2c ioctl that
66#		takes a value and a mask to access gpio register
67#	iord=<integer> - value of ioctl command for reading
68#	iowr=<integer> - value of ioctl command for writing
69# 	val=<integer>	- a single integer value, generally the value to which
70#			  the relevant bits of a register will be set
71#	mask=<integer>	- which bits of val are relevant (if method is I2CKIO)
72#
73#    Here is the second:
74#	cmd=[CPU_NEXT | PRE_CHNG | POST_CHNG]
75# 	path=<prompath>	   - control device's prom pathname, including minor
76# 	method=[CPUSPEEDKIO | VCORE]  This selects a method that uses
77#			     information like cpu speed index, value for
78#			     adjust cpu core voltage, delays, etc.
79#	iowr=<integer>     - value of ioctl write command
80#	speeds=<integer>   - indicates the number of cpu speeds that are
81#			     supported
82
83ppm-domains="domain_cpu", "domain_diskfet1", "domain_diskfet2", "domain_diskfet3",
84    "domain_diskfet4", "domain_led", "domain_pciegfx";
85
86#
87# 0x6a02 is JBPPMIOC_NEXT	(('j' << 8) | 2)
88# 0x6a03 is JBPPMIOC_GO		(('j' << 8) | 3)
89#
90domain_cpu-devices="/SUNW,UltraSPARC-IIIi@*", "/SUNW,UltraSPARC-IIIi+@*";
91domain_cpu-model="CPU";
92domain_cpu-control=
93    "cmd=CPU_NEXT path=/ppm@1f,0:jbus-ppm method=CPUSPEEDKIO iowr=0x6a02 speeds=3",
94    "cmd=CPU_GO path=/ppm@1f,0:jbus-ppm method=KIO iowr=0x6a03 val=0";
95
96#
97# iowr -- 0x4D82 is GPIO_SET_OUTPUT per sys/i2c/clients/i2c_gpio.h file
98# iord -- 0x4D80 is GPIO_GET_INPUT per sys/i2c/clients/i2c_gpio.h file
99# mask -- bit mask for control pin
100# val  -- pin value to set on/off
101# delay -- minimum delay between FET off and FET on
102# post_delay -- delay after turning on/off the FET
103#
104domain_diskfet1-devices = "/pci@1e,600000/pci@0/pci@a/pci@0/LSILogic,sas@0/sd@0,0";
105domain_diskfet1-model = "FET";
106domain_diskfet1-control =
107    "cmd=FET_ON path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x01 val=0x01 post_delay=1500000",
108    "cmd=FET_OFF path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x01 val=0";
109
110domain_diskfet2-devices = "/pci@1e,600000/pci@0/pci@a/pci@0/LSILogic,sas@0/sd@1,0";
111domain_diskfet2-model = "FET";
112domain_diskfet2-control =
113    "cmd=FET_ON path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x02 val=0x02 post_delay=1500000",
114    "cmd=FET_OFF path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x02 val=0";
115
116domain_diskfet3-devices = "/pci@1e,600000/pci@0/pci@a/pci@0/LSILogic,sas@0/sd@2,0";
117domain_diskfet3-model = "FET";
118domain_diskfet3-control =
119    "cmd=FET_ON path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x04 val=0x04 post_delay=1500000",
120    "cmd=FET_OFF path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x04 val=0";
121
122domain_diskfet4-devices = "/pci@1e,600000/pci@0/pci@a/pci@0/LSILogic,sas@0/sd@3,0";
123domain_diskfet4-model = "FET";
124domain_diskfet4-control =
125    "cmd=FET_ON path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x08 val=0x08 post_delay=1500000",
126    "cmd=FET_OFF path=/ebus@1f,464000/i2c@3,80/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x08 val=0";
127
128#
129# Manipulate the front-panel LED.  This platform uses ACTIVE low.
130#
131# Note: no devices to claim in this domain
132#
133domain_led-devices = "";
134domain_led-model = "LED";
135domain_led-control =
136    "cmd=LED_ON path=/i2c@1f,530000/gpio@0,30:pca9556_1 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x01 val=0x00",
137    "cmd=LED_OFF path=/i2c@1f,530000/gpio@0,30:pca9556_1 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x01 val=0x01";
138
139#
140# PCI Express Primary Graphics Slot (directly attached to root complex(Fire))
141#
142domain_pciegfx-devices = "/pci@1f,700000/*";
143domain_pciegfx-model = "PCIE";
144domain_pciegfx-control =
145    "cmd=PRE_PWR_OFF path=/pci@1f,700000:devctl method=KIO iowr=0x504D0001 val=0x00",
146    "cmd=PRE_PWR_ON path=/pci@1f,700000:devctl method=KIO iowr=0x504D0002 val=0x00",
147    "cmd=POST_PWR_ON path=/pci@1f,700000:devctl method=KIO iowr=0x504D0003 val=0x00 post_delay=100000",
148    "cmd=CLK_OFF path=/i2c@1f,530000/gpio@0,30:pca9556_1 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x10 val=0x00",
149    "cmd=CLK_ON path=/i2c@1f,530000/gpio@0,30:pca9556_1 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x10 val=0x10",
150    "cmd=PWR_OFF path=/i2c@1f,530000/gpio@0,30:pca9556_1 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x08 val=0x00",
151    "cmd=PWR_ON path=/i2c@1f,530000/gpio@0,30:pca9556_1 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x08 val=0x08",
152    "cmd=RESET_OFF path=/i2c@1f,530000/gpio@0,30:pca9556_1 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x04 val=0x04 delay=10000",
153    "cmd=RESET_ON path=/i2c@1f,530000/gpio@0,30:pca9556_1 method=I2CKIO iowr=0x4D82 iord=0x0 mask=0x04 val=0x00";
154