1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_PX_LIB_H 28 #define _SYS_PX_LIB_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* 37 * Include all data structures and definitions in this file that are 38 * required between the common and hardware specific code. 39 */ 40 41 #define DIP_TO_HANDLE(dip) ((px_t *)DIP_TO_STATE(dip))->px_dev_hdl 42 43 /* 44 * The following macros define the mmu page size and related operations. 45 */ 46 #define MMU_PAGE_SHIFT 13 47 #define MMU_PAGE_SIZE (1 << MMU_PAGE_SHIFT) 48 #define MMU_PAGE_MASK ~(MMU_PAGE_SIZE - 1) 49 #define MMU_PAGE_OFFSET (MMU_PAGE_SIZE - 1) 50 #define MMU_PTOB(x) (((uint64_t)(x)) << MMU_PAGE_SHIFT) 51 #define MMU_BTOP(x) ((x) >> MMU_PAGE_SHIFT) 52 #define MMU_BTOPR(x) MMU_BTOP((x) + MMU_PAGE_OFFSET) 53 54 /* MMU map flags */ 55 #define MMU_MAP_MP 0 56 #define MMU_MAP_BUF 1 57 58 typedef struct px px_t; 59 typedef struct px_msiq px_msiq_t; 60 61 extern int px_lib_dev_init(dev_info_t *dip, devhandle_t *dev_hdl); 62 extern int px_lib_dev_fini(dev_info_t *dip); 63 extern int px_lib_map_vconfig(dev_info_t *dip, ddi_map_req_t *mp, 64 pci_config_offset_t off, pci_regspec_t *rp, caddr_t *addrp); 65 extern int px_lib_intr_devino_to_sysino(dev_info_t *dip, devino_t devino, 66 sysino_t *sysino); 67 extern int px_lib_intr_getvalid(dev_info_t *dip, sysino_t sysino, 68 intr_valid_state_t *intr_valid_state); 69 extern int px_lib_intr_setvalid(dev_info_t *dip, sysino_t sysino, 70 intr_valid_state_t intr_valid_state); 71 extern int px_lib_intr_getstate(dev_info_t *dip, sysino_t sysino, 72 intr_state_t *intr_state); 73 extern int px_lib_intr_setstate(dev_info_t *dip, sysino_t sysino, 74 intr_state_t intr_state); 75 extern int px_lib_intr_gettarget(dev_info_t *dip, sysino_t sysino, 76 cpuid_t *cpuid); 77 extern int px_lib_intr_settarget(dev_info_t *dip, sysino_t sysino, 78 cpuid_t cpuid); 79 extern int px_lib_intr_reset(dev_info_t *dip); 80 81 #ifdef FMA 82 extern void px_fill_rc_status(px_fault_t *px_fault_p, 83 pciex_rc_error_regs_t *rc_status); 84 #endif 85 86 extern int px_lib_iommu_map(dev_info_t *dip, tsbid_t tsbid, pages_t pages, 87 io_attributes_t io_attributes, void *addr, size_t pfn_index, int flag); 88 extern int px_lib_iommu_demap(dev_info_t *dip, tsbid_t tsbid, pages_t pages); 89 extern int px_lib_iommu_getmap(dev_info_t *dip, tsbid_t tsbid, 90 io_attributes_t *attributes_p, r_addr_t *r_addr_p); 91 extern int px_lib_dma_bypass_rngchk(ddi_dma_attr_t *attrp, uint64_t *lo_p, 92 uint64_t *hi_p); 93 extern int px_lib_iommu_getbypass(dev_info_t *dip, r_addr_t ra, 94 io_attributes_t io_attributes, io_addr_t *io_addr_p); 95 extern int px_lib_dma_sync(dev_info_t *dip, dev_info_t *rdip, 96 ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 97 98 /* 99 * MSIQ Functions: 100 */ 101 extern int px_lib_msiq_init(dev_info_t *dip); 102 extern int px_lib_msiq_fini(dev_info_t *dip); 103 extern int px_lib_msiq_info(dev_info_t *dip, msiqid_t msiq_id, 104 r_addr_t *ra_p, uint_t *msiq_rec_cnt_p); 105 extern int px_lib_msiq_getvalid(dev_info_t *dip, msiqid_t msiq_id, 106 pci_msiq_valid_state_t *msiq_valid_state); 107 extern int px_lib_msiq_setvalid(dev_info_t *dip, msiqid_t msiq_id, 108 pci_msiq_valid_state_t msiq_valid_state); 109 extern int px_lib_msiq_getstate(dev_info_t *dip, msiqid_t msiq_id, 110 pci_msiq_state_t *msiq_state); 111 extern int px_lib_msiq_setstate(dev_info_t *dip, msiqid_t msiq_id, 112 pci_msiq_state_t msiq_state); 113 extern int px_lib_msiq_gethead(dev_info_t *dip, msiqid_t msiq_id, 114 msiqhead_t *msiq_head); 115 extern int px_lib_msiq_sethead(dev_info_t *dip, msiqid_t msiq_id, 116 msiqhead_t msiq_head); 117 extern int px_lib_msiq_gettail(dev_info_t *dip, msiqid_t msiq_id, 118 msiqtail_t *msiq_tail); 119 extern void px_lib_get_msiq_rec(dev_info_t *dip, px_msiq_t *msiq_p, 120 msiq_rec_t *msiq_rec_p); 121 122 /* 123 * MSI Functions: 124 */ 125 extern int px_lib_msi_init(dev_info_t *dip); 126 extern int px_lib_msi_getmsiq(dev_info_t *dip, msinum_t msi_num, 127 msiqid_t *msiq_id); 128 extern int px_lib_msi_setmsiq(dev_info_t *dip, msinum_t msi_num, 129 msiqid_t msiq_id, msi_type_t msitype); 130 extern int px_lib_msi_getvalid(dev_info_t *dip, msinum_t msi_num, 131 pci_msi_valid_state_t *msi_valid_state); 132 extern int px_lib_msi_setvalid(dev_info_t *dip, msinum_t msi_num, 133 pci_msi_valid_state_t msi_valid_state); 134 extern int px_lib_msi_getstate(dev_info_t *dip, msinum_t msi_num, 135 pci_msi_state_t *msi_state); 136 extern int px_lib_msi_setstate(dev_info_t *dip, msinum_t msi_num, 137 pci_msi_state_t msi_state); 138 139 /* 140 * MSG Functions: 141 */ 142 extern int px_lib_msg_getmsiq(dev_info_t *dip, pcie_msg_type_t msg_type, 143 msiqid_t *msiq_id); 144 extern int px_lib_msg_setmsiq(dev_info_t *dip, pcie_msg_type_t msg_type, 145 msiqid_t msiq_id); 146 extern int px_lib_msg_getvalid(dev_info_t *dip, pcie_msg_type_t msg_type, 147 pcie_msg_valid_state_t *msg_valid_state); 148 extern int px_lib_msg_setvalid(dev_info_t *dip, pcie_msg_type_t msg_type, 149 pcie_msg_valid_state_t msg_valid_state); 150 151 /* 152 * CPR Suspend/Resume Functions: 153 */ 154 extern int px_lib_suspend(dev_info_t *dip); 155 extern void px_lib_resume(dev_info_t *dip); 156 157 /* 158 * PCI tool Functions: 159 */ 160 extern int px_lib_tools_dev_reg_ops(dev_info_t *dip, void *arg, 161 int cmd, int mode); 162 extern int px_lib_tools_bus_reg_ops(dev_info_t *dip, void *arg, int cmd, 163 int mode); 164 extern int px_lib_tools_intr_admn(dev_info_t *dip, void *arg, int cmd, 165 int mode); 166 167 /* 168 * PPM interface 169 */ 170 extern int px_lib_pmctl(int cmd, px_t *px_p); 171 172 /* 173 * Misc Functions: 174 */ 175 extern uint64_t px_lib_get_cb(dev_info_t *dip); 176 extern void px_lib_set_cb(dev_info_t *dip, uint64_t val); 177 178 /* 179 * Peek and poke access ddi_ctlops helper functions 180 */ 181 extern int px_lib_ctlops_poke(dev_info_t *dip, dev_info_t *rdip, 182 peekpoke_ctlops_t *in_args); 183 extern int px_lib_ctlops_peek(dev_info_t *dip, dev_info_t *rdip, 184 peekpoke_ctlops_t *in_args, void *result); 185 186 /* 187 * Error handling functions 188 */ 189 #define PX_INTR_PAYLOAD_SIZE 8 /* 64 bit words */ 190 typedef struct px_fault { 191 dev_info_t *px_fh_dip; 192 sysino_t px_fh_sysino; 193 uint_t (*px_err_func)(caddr_t px_fault); 194 devino_t px_intr_ino; 195 uint64_t px_intr_payload[PX_INTR_PAYLOAD_SIZE]; 196 } px_fault_t; 197 198 extern int px_err_add_intr(px_fault_t *px_fault_p); 199 extern void px_err_rem_intr(px_fault_t *px_fault_p); 200 201 #ifdef __cplusplus 202 } 203 #endif 204 205 #endif /* _SYS_PX_LIB_H */ 206