xref: /titanic_50/usr/src/uts/sun4/io/px/px_fdvma.c (revision 1da7e59911a9f3f267c3ef294dc342767dee7952)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 /*
27  * Internal PCI Fast DVMA implementation
28  */
29 #include <sys/types.h>
30 #include <sys/kmem.h>
31 #include <sys/async.h>
32 #include <sys/sysmacros.h>
33 #include <sys/sunddi.h>
34 #include <sys/ddi_impldefs.h>
35 #include <sys/dvma.h>
36 #include "px_obj.h"
37 
38 /*LINTLIBRARY*/
39 
40 static struct dvma_ops fdvma_ops;
41 typedef struct fast_dvma fdvma_t;
42 
43 /*
44  * The following routines are used to implement the sun4u fast dvma
45  * routines on this bus.
46  */
47 
48 /*ARGSUSED*/
49 static void
50 px_fdvma_load(ddi_dma_handle_t h, caddr_t a, uint_t len, uint_t index,
51 	ddi_dma_cookie_t *cp)
52 {
53 	ddi_dma_impl_t *mp = (ddi_dma_impl_t *)h;
54 	fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma;
55 	px_t *px_p = (px_t *)fdvma_p->softsp;
56 	px_mmu_t *mmu_p = px_p->px_mmu_p;
57 	dev_info_t *dip = px_p->px_dip;
58 	px_dvma_addr_t dvma_addr, dvma_pg;
59 	uint32_t offset;
60 	size_t npages, pg_index;
61 	uint64_t attr;
62 
63 	offset = (uint32_t)(uintptr_t)a & MMU_PAGE_OFFSET;
64 	npages = MMU_BTOPR(len + offset);
65 	if (!npages)
66 		return;
67 
68 	/* make sure we don't exceed reserved boundary */
69 	DBG(DBG_FAST_DVMA, dip, "load index=%x: %p+%x ", index, a, len);
70 	if (index + npages > mp->dmai_ndvmapages) {
71 		cmn_err(px_panic_on_fatal_errors ? CE_PANIC : CE_WARN,
72 		    "%s%d: kaddr_load index(%x)+pgs(%lx) exceeds limit\n",
73 		    ddi_driver_name(dip), ddi_get_instance(dip),
74 		    index, npages);
75 		return;
76 	}
77 	fdvma_p->pagecnt[index] = npages;
78 
79 	dvma_addr = mp->dmai_mapping + MMU_PTOB(index);
80 	dvma_pg = MMU_BTOP(dvma_addr);
81 	pg_index = dvma_pg - mmu_p->dvma_base_pg;
82 
83 	/* construct the dma cookie to be returned */
84 	MAKE_DMA_COOKIE(cp, dvma_addr | offset, len);
85 	DBG(DBG_FAST_DVMA | DBG_CONT, dip, "cookie: %x+%x\n",
86 	    cp->dmac_address, cp->dmac_size);
87 
88 	attr = PX_GET_TTE_ATTR(mp->dmai_rflags, mp->dmai_attr.dma_attr_flags);
89 
90 	if (px_lib_iommu_map(dip, PCI_TSBID(0, pg_index), npages,
91 	    PX_ADD_ATTR_EXTNS(attr, mp->dmai_bdf), (void *)a, 0,
92 	    MMU_MAP_BUF) != DDI_SUCCESS) {
93 		cmn_err(CE_WARN, "%s%d: kaddr_load can't get "
94 		    "page frame for vaddr %lx", ddi_driver_name(dip),
95 		    ddi_get_instance(dip), (uintptr_t)a);
96 	}
97 }
98 
99 /*ARGSUSED*/
100 static void
101 px_fdvma_unload(ddi_dma_handle_t h, uint_t index, uint_t sync_flag)
102 {
103 	ddi_dma_impl_t *mp = (ddi_dma_impl_t *)h;
104 	fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma;
105 	px_t *px_p = (px_t *)fdvma_p->softsp;
106 	size_t npages = fdvma_p->pagecnt[index];
107 	px_dvma_addr_t dvma_pg = MMU_BTOP(mp->dmai_mapping + MMU_PTOB(index));
108 
109 	DBG(DBG_FAST_DVMA, px_p->px_dip,
110 	    "unload index=%x sync_flag=%x %x+%x+%x\n", index, sync_flag,
111 	    mp->dmai_mapping, MMU_PTOB(index), MMU_PTOB(npages));
112 
113 	px_mmu_unmap_pages(px_p->px_mmu_p, mp, dvma_pg, npages);
114 	fdvma_p->pagecnt[index] = 0;
115 }
116 
117 /*ARGSUSED*/
118 static void
119 px_fdvma_sync(ddi_dma_handle_t h, uint_t index, uint_t sync_flag)
120 {
121 	ddi_dma_impl_t *mp = (ddi_dma_impl_t *)h;
122 	fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma;
123 	px_t *px_p = (px_t *)fdvma_p->softsp;
124 	size_t npg = fdvma_p->pagecnt[index];
125 
126 	DBG(DBG_FAST_DVMA, px_p->px_dip,
127 	    "sync index=%x sync_flag=%x %x+%x+%x\n", index, sync_flag,
128 	    mp->dmai_mapping, MMU_PTOB(index), MMU_PTOB(npg));
129 }
130 
131 int
132 px_fdvma_reserve(dev_info_t *dip, dev_info_t *rdip, px_t *px_p,
133 	ddi_dma_req_t *dmareq, ddi_dma_handle_t *handlep)
134 {
135 	fdvma_t *fdvma_p;
136 	px_dvma_addr_t dvma_pg;
137 	px_mmu_t *mmu_p = px_p->px_mmu_p;
138 	size_t npages;
139 	ddi_dma_impl_t *mp;
140 	ddi_dma_lim_t *lim_p = dmareq->dmar_limits;
141 	ulong_t hi = lim_p->dlim_addr_hi;
142 	ulong_t lo = lim_p->dlim_addr_lo;
143 	size_t counter_max = (lim_p->dlim_cntr_max + 1) & MMU_PAGE_MASK;
144 
145 	if (px_disable_fdvma)
146 		return (DDI_FAILURE);
147 
148 	DBG(DBG_DMA_CTL, dip, "DDI_DMA_RESERVE: rdip=%s%d\n",
149 	    ddi_driver_name(rdip), ddi_get_instance(rdip));
150 
151 	/*
152 	 * Check the limit structure.
153 	 */
154 	if ((lo >= hi) || (hi < mmu_p->mmu_dvma_base))
155 		return (DDI_DMA_BADLIMITS);
156 
157 	/*
158 	 * Check the size of the request.
159 	 */
160 	npages = dmareq->dmar_object.dmao_size;
161 	if (npages > mmu_p->mmu_dvma_reserve)
162 		return (DDI_DMA_NORESOURCES);
163 
164 	/*
165 	 * Allocate the dma handle.
166 	 */
167 	mp = kmem_zalloc(sizeof (px_dma_hdl_t), KM_SLEEP);
168 
169 	/*
170 	 * Get entries from dvma space map.
171 	 * (vmem_t *vmp,
172 	 *	size_t size, size_t align, size_t phase,
173 	 *	size_t nocross, void *minaddr, void *maxaddr, int vmflag)
174 	 */
175 	dvma_pg = MMU_BTOP((ulong_t)vmem_xalloc(mmu_p->mmu_dvma_map,
176 	    MMU_PTOB(npages), MMU_PAGE_SIZE, 0,
177 	    counter_max, (void *)lo, (void *)(hi + 1),
178 	    dmareq->dmar_fp == DDI_DMA_SLEEP ? VM_SLEEP : VM_NOSLEEP));
179 	if (dvma_pg == 0) {
180 		kmem_free(mp, sizeof (px_dma_hdl_t));
181 		return (DDI_DMA_NOMAPPING);
182 	}
183 	mmu_p->mmu_dvma_reserve -= npages;
184 
185 	/*
186 	 * Create the fast dvma request structure.
187 	 */
188 	fdvma_p = kmem_alloc(sizeof (fdvma_t), KM_SLEEP);
189 	fdvma_p->pagecnt = kmem_alloc(npages * sizeof (uint_t), KM_SLEEP);
190 	fdvma_p->ops = &fdvma_ops;
191 	fdvma_p->softsp = (caddr_t)px_p;
192 	fdvma_p->sync_flag = NULL;
193 
194 	/*
195 	 * Initialize the handle.
196 	 */
197 	mp->dmai_rdip = rdip;
198 	mp->dmai_rflags = DMP_BYPASSNEXUS | DDI_DMA_READ | DMP_NOSYNC;
199 	mp->dmai_burstsizes = dmareq->dmar_limits->dlim_burstsizes;
200 	mp->dmai_mapping = MMU_PTOB(dvma_pg);
201 	mp->dmai_ndvmapages = npages;
202 	mp->dmai_size = npages * MMU_PAGE_SIZE;
203 	mp->dmai_nwin = 0;
204 	mp->dmai_fdvma = (caddr_t)fdvma_p;
205 
206 	/*
207 	 * The bdf protection value is set to immediate child
208 	 * at first. It gets modified by switch/bridge drivers
209 	 * as the code traverses down the fabric topology.
210 	 *
211 	 * XXX No IOMMU protection for broken devices.
212 	 */
213 	ASSERT((intptr_t)ddi_get_parent_data(rdip) >> 1 == 0);
214 	mp->dmai_bdf = ((intptr_t)ddi_get_parent_data(rdip) == 1) ? 0 :
215 	    pcie_get_bdf_for_dma_xfer(dip, rdip);
216 
217 	DBG(DBG_DMA_CTL, dip,
218 	    "DDI_DMA_RESERVE: mp=%p dvma=%x npages=%x private=%p\n",
219 	    mp, mp->dmai_mapping, npages, fdvma_p);
220 	*handlep = (ddi_dma_handle_t)mp;
221 	return (DDI_SUCCESS);
222 }
223 
224 int
225 px_fdvma_release(dev_info_t *dip, px_t *px_p, ddi_dma_impl_t *mp)
226 {
227 	px_mmu_t *mmu_p = px_p->px_mmu_p;
228 	size_t npages;
229 	fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma;
230 
231 	if (px_disable_fdvma)
232 		return (DDI_FAILURE);
233 
234 	/* validate fdvma handle */
235 	if (!(mp->dmai_rflags & DMP_BYPASSNEXUS)) {
236 		DBG(DBG_DMA_CTL, dip, "DDI_DMA_RELEASE: not fast dma\n");
237 		return (DDI_FAILURE);
238 	}
239 
240 	/* flush all reserved dvma addresses from mmu */
241 	px_mmu_unmap_window(mmu_p, mp);
242 
243 	npages = mp->dmai_ndvmapages;
244 	vmem_xfree(mmu_p->mmu_dvma_map, (void *)mp->dmai_mapping,
245 	    MMU_PTOB(npages));
246 
247 	mmu_p->mmu_dvma_reserve += npages;
248 	mp->dmai_ndvmapages = 0;
249 
250 	/* see if there is anyone waiting for dvma space */
251 	if (mmu_p->mmu_dvma_clid != 0) {
252 		DBG(DBG_DMA_CTL, dip, "run dvma callback\n");
253 		ddi_run_callback(&mmu_p->mmu_dvma_clid);
254 	}
255 
256 	/* free data structures */
257 	kmem_free(fdvma_p->pagecnt, npages * sizeof (uint_t));
258 	kmem_free(fdvma_p, sizeof (fdvma_t));
259 	kmem_free(mp, sizeof (px_dma_hdl_t));
260 
261 	/* see if there is anyone waiting for kmem */
262 	if (px_kmem_clid != 0) {
263 		DBG(DBG_DMA_CTL, dip, "run handle callback\n");
264 		ddi_run_callback(&px_kmem_clid);
265 	}
266 	return (DDI_SUCCESS);
267 }
268 
269 static struct dvma_ops fdvma_ops = {
270 	DVMAO_REV,
271 	px_fdvma_load,
272 	px_fdvma_unload,
273 	px_fdvma_sync
274 };
275