1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 /* 30 * PCI nexus HotPlug devctl interface 31 */ 32 #include <sys/types.h> 33 #include <sys/conf.h> 34 #include <sys/kmem.h> 35 #include <sys/async.h> 36 #include <sys/sysmacros.h> 37 #include <sys/sunddi.h> 38 #include <sys/sunndi.h> 39 #include <sys/ddi_impldefs.h> 40 #include <sys/open.h> 41 #include <sys/errno.h> 42 #include <sys/file.h> 43 #include <sys/policy.h> 44 #include <sys/hotplug/pci/pcihp.h> 45 #include "px_obj.h" 46 #include <sys/pci_tools.h> 47 #include "px_tools.h" 48 #include "pcie_pwr.h" 49 50 /*LINTLIBRARY*/ 51 52 static int px_open(dev_t *devp, int flags, int otyp, cred_t *credp); 53 static int px_close(dev_t dev, int flags, int otyp, cred_t *credp); 54 static int px_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, 55 cred_t *credp, int *rvalp); 56 static int px_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, 57 int flags, char *name, caddr_t valuep, int *lengthp); 58 59 struct cb_ops px_cb_ops = { 60 px_open, /* open */ 61 px_close, /* close */ 62 nodev, /* strategy */ 63 nodev, /* print */ 64 nodev, /* dump */ 65 nodev, /* read */ 66 nodev, /* write */ 67 px_ioctl, /* ioctl */ 68 nodev, /* devmap */ 69 nodev, /* mmap */ 70 nodev, /* segmap */ 71 nochpoll, /* poll */ 72 px_prop_op, /* cb_prop_op */ 73 NULL, /* streamtab */ 74 D_NEW | D_MP | D_HOTPLUG, /* Driver compatibility flag */ 75 CB_REV, /* rev */ 76 nodev, /* int (*cb_aread)() */ 77 nodev /* int (*cb_awrite)() */ 78 }; 79 80 /* ARGSUSED3 */ 81 static int 82 px_open(dev_t *devp, int flags, int otyp, cred_t *credp) 83 { 84 px_t *px_p; 85 86 /* 87 * Make sure the open is for the right file type. 88 */ 89 if (otyp != OTYP_CHR) 90 return (EINVAL); 91 92 /* 93 * Get the soft state structure for the device. 94 */ 95 px_p = DEV_TO_SOFTSTATE(*devp); 96 if (px_p == NULL) 97 return (ENXIO); 98 99 /* 100 * Handle the open by tracking the device state. 101 */ 102 DBG(DBG_OPEN, px_p->px_dip, "devp=%x: flags=%x\n", devp, flags); 103 mutex_enter(&px_p->px_mutex); 104 if (flags & FEXCL) { 105 if (px_p->px_soft_state != PX_SOFT_STATE_CLOSED) { 106 mutex_exit(&px_p->px_mutex); 107 DBG(DBG_OPEN, px_p->px_dip, "busy\n"); 108 return (EBUSY); 109 } 110 px_p->px_soft_state = PX_SOFT_STATE_OPEN_EXCL; 111 } else { 112 if (px_p->px_soft_state == PX_SOFT_STATE_OPEN_EXCL) { 113 mutex_exit(&px_p->px_mutex); 114 DBG(DBG_OPEN, px_p->px_dip, "busy\n"); 115 return (EBUSY); 116 } 117 px_p->px_soft_state = PX_SOFT_STATE_OPEN; 118 } 119 px_p->px_open_count++; 120 mutex_exit(&px_p->px_mutex); 121 return (0); 122 } 123 124 125 /* ARGSUSED */ 126 static int 127 px_close(dev_t dev, int flags, int otyp, cred_t *credp) 128 { 129 px_t *px_p; 130 131 if (otyp != OTYP_CHR) 132 return (EINVAL); 133 134 px_p = DEV_TO_SOFTSTATE(dev); 135 if (px_p == NULL) 136 return (ENXIO); 137 138 DBG(DBG_CLOSE, px_p->px_dip, "dev=%x: flags=%x\n", dev, flags); 139 mutex_enter(&px_p->px_mutex); 140 px_p->px_soft_state = PX_SOFT_STATE_CLOSED; 141 px_p->px_open_count = 0; 142 mutex_exit(&px_p->px_mutex); 143 return (0); 144 } 145 146 /* ARGSUSED */ 147 static int 148 px_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, int *rvalp) 149 { 150 px_t *px_p; 151 dev_info_t *dip; 152 struct devctl_iocdata *dcp; 153 uint_t bus_state; 154 int rv = DDI_SUCCESS; 155 int minor = getminor(dev); 156 157 px_p = DEV_TO_SOFTSTATE(dev); 158 if (px_p == NULL) 159 return (ENXIO); 160 161 dip = px_p->px_dip; 162 DBG(DBG_IOCTL, dip, "dev=%x: cmd=%x\n", dev, cmd); 163 164 #ifdef PX_DMA_TEST 165 if (IS_DMATEST(cmd)) { 166 *rvalp = px_dma_test(cmd, dip, px_p, arg); 167 return (0); 168 } 169 #endif /* PX_DMA_TEST */ 170 171 switch (PCIHP_AP_MINOR_NUM_TO_PCI_DEVNUM(minor)) { 172 173 /* 174 * PCI tools. 175 */ 176 case PCI_TOOL_REG_MINOR_NUM: 177 178 switch (cmd) { 179 case PCITOOL_DEVICE_SET_REG: 180 case PCITOOL_DEVICE_GET_REG: 181 182 /* Require full privileges. */ 183 if (secpolicy_kmdb(credp)) 184 rv = EPERM; 185 else 186 rv = pxtool_dev_reg_ops(dip, 187 (void *)arg, cmd, mode); 188 break; 189 190 case PCITOOL_NEXUS_SET_REG: 191 case PCITOOL_NEXUS_GET_REG: 192 193 /* Require full privileges. */ 194 if (secpolicy_kmdb(credp)) 195 rv = EPERM; 196 else 197 rv = pxtool_bus_reg_ops(dip, 198 (void *)arg, cmd, mode); 199 break; 200 201 default: 202 rv = ENOTTY; 203 } 204 return (rv); 205 206 case PCI_TOOL_INTR_MINOR_NUM: 207 208 switch (cmd) { 209 case PCITOOL_DEVICE_SET_INTR: 210 211 /* 212 * Require PRIV_SYS_RES_CONFIG, 213 * same as psradm 214 */ 215 if (secpolicy_ponline(credp)) { 216 rv = EPERM; 217 break; 218 } 219 220 /*FALLTHRU*/ 221 /* These require no special privileges. */ 222 case PCITOOL_DEVICE_GET_INTR: 223 case PCITOOL_DEVICE_NUM_INTR: 224 rv = pxtool_intr(dip, (void *)arg, cmd, mode); 225 break; 226 227 default: 228 rv = ENOTTY; 229 } 230 return (rv); 231 232 default: 233 break; 234 } 235 236 if ((cmd & ~PPMREQ_MASK) == PPMREQ) { 237 238 /* Need privileges to use these ioctls. */ 239 if (drv_priv(credp)) { 240 DBG(DBG_TOOLS, dip, 241 "px_tools: Insufficient privileges\n"); 242 243 return (EPERM); 244 } 245 return (px_lib_pmctl(cmd, px_p)); 246 } 247 248 /* 249 * We can use the generic implementation for these ioctls 250 */ 251 switch (cmd) { 252 case DEVCTL_DEVICE_GETSTATE: 253 case DEVCTL_DEVICE_ONLINE: 254 case DEVCTL_DEVICE_OFFLINE: 255 case DEVCTL_BUS_GETSTATE: 256 return (ndi_devctl_ioctl(dip, cmd, arg, mode, 0)); 257 } 258 259 /* 260 * read devctl ioctl data 261 */ 262 if (ndi_dc_allochdl((void *)arg, &dcp) != NDI_SUCCESS) 263 return (EFAULT); 264 265 switch (cmd) { 266 267 case DEVCTL_DEVICE_RESET: 268 DBG(DBG_IOCTL, dip, "DEVCTL_DEVICE_RESET\n"); 269 rv = ENOTSUP; 270 break; 271 272 273 case DEVCTL_BUS_QUIESCE: 274 DBG(DBG_IOCTL, dip, "DEVCTL_BUS_QUIESCE\n"); 275 if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) 276 if (bus_state == BUS_QUIESCED) 277 break; 278 (void) ndi_set_bus_state(dip, BUS_QUIESCED); 279 break; 280 281 case DEVCTL_BUS_UNQUIESCE: 282 DBG(DBG_IOCTL, dip, "DEVCTL_BUS_UNQUIESCE\n"); 283 if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) 284 if (bus_state == BUS_ACTIVE) 285 break; 286 (void) ndi_set_bus_state(dip, BUS_ACTIVE); 287 break; 288 289 case DEVCTL_BUS_RESET: 290 DBG(DBG_IOCTL, dip, "DEVCTL_BUS_RESET\n"); 291 rv = ENOTSUP; 292 break; 293 294 case DEVCTL_BUS_RESETALL: 295 DBG(DBG_IOCTL, dip, "DEVCTL_BUS_RESETALL\n"); 296 rv = ENOTSUP; 297 break; 298 299 default: 300 rv = ENOTTY; 301 } 302 303 ndi_dc_freehdl(dcp); 304 return (rv); 305 } 306 307 static int px_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, 308 int flags, char *name, caddr_t valuep, int *lengthp) 309 { 310 if (ddi_prop_exists(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 311 "hotplug-capable")) 312 return ((pcihp_get_cb_ops())->cb_prop_op(dev, dip, 313 prop_op, flags, name, valuep, lengthp)); 314 315 return (ddi_prop_op(dev, dip, prop_op, flags, name, valuep, lengthp)); 316 } 317