17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 57c478bd9Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 67c478bd9Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 77c478bd9Sstevel@tonic-gate * with the License. 87c478bd9Sstevel@tonic-gate * 97c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 107c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 117c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 127c478bd9Sstevel@tonic-gate * and limitations under the License. 137c478bd9Sstevel@tonic-gate * 147c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 157c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 167c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 177c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 187c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 197c478bd9Sstevel@tonic-gate * 207c478bd9Sstevel@tonic-gate * CDDL HEADER END 217c478bd9Sstevel@tonic-gate */ 227c478bd9Sstevel@tonic-gate /* 23*65a89a64Smarx * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 247c478bd9Sstevel@tonic-gate * Use is subject to license terms. 257c478bd9Sstevel@tonic-gate */ 267c478bd9Sstevel@tonic-gate 277c478bd9Sstevel@tonic-gate #ifndef _SYS_PCB_H 287c478bd9Sstevel@tonic-gate #define _SYS_PCB_H 297c478bd9Sstevel@tonic-gate 307c478bd9Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 317c478bd9Sstevel@tonic-gate 327c478bd9Sstevel@tonic-gate #include <sys/regset.h> 337c478bd9Sstevel@tonic-gate #include <sys/segments.h> 347c478bd9Sstevel@tonic-gate 357c478bd9Sstevel@tonic-gate #ifdef __cplusplus 367c478bd9Sstevel@tonic-gate extern "C" { 377c478bd9Sstevel@tonic-gate #endif 387c478bd9Sstevel@tonic-gate 397c478bd9Sstevel@tonic-gate #ifndef _ASM 407c478bd9Sstevel@tonic-gate typedef struct fpu_ctx { 417c478bd9Sstevel@tonic-gate kfpu_t fpu_regs; /* kernel save area for FPU */ 427c478bd9Sstevel@tonic-gate uint_t fpu_flags; /* FPU state flags */ 437c478bd9Sstevel@tonic-gate } fpu_ctx_t; 447c478bd9Sstevel@tonic-gate 457c478bd9Sstevel@tonic-gate typedef struct pcb { 467c478bd9Sstevel@tonic-gate fpu_ctx_t pcb_fpu; /* fpu state */ 477c478bd9Sstevel@tonic-gate uint_t pcb_flags; /* state flags; cleared on fork */ 487c478bd9Sstevel@tonic-gate greg_t pcb_drstat; /* status debug register (%dr6) */ 497c478bd9Sstevel@tonic-gate unsigned char pcb_instr; /* /proc: instruction at stop */ 507c478bd9Sstevel@tonic-gate #if defined(__amd64) 517c478bd9Sstevel@tonic-gate uintptr_t pcb_fsbase; 527c478bd9Sstevel@tonic-gate uintptr_t pcb_gsbase; 537c478bd9Sstevel@tonic-gate selector_t pcb_ds; 547c478bd9Sstevel@tonic-gate selector_t pcb_es; 557c478bd9Sstevel@tonic-gate selector_t pcb_fs; 567c478bd9Sstevel@tonic-gate selector_t pcb_gs; 577c478bd9Sstevel@tonic-gate #endif /* __amd64 */ 587c478bd9Sstevel@tonic-gate user_desc_t pcb_fsdesc; /* private per-lwp %fs descriptors */ 597c478bd9Sstevel@tonic-gate user_desc_t pcb_gsdesc; /* private per-lwp %gs descriptors */ 607c478bd9Sstevel@tonic-gate } pcb_t; 617c478bd9Sstevel@tonic-gate 627c478bd9Sstevel@tonic-gate #endif /* ! _ASM */ 637c478bd9Sstevel@tonic-gate 647c478bd9Sstevel@tonic-gate /* pcb_flags */ 657c478bd9Sstevel@tonic-gate #define DEBUG_PENDING 0x02 /* single-step of lcall for a sys call */ 667c478bd9Sstevel@tonic-gate #define INSTR_VALID 0x08 /* value in pcb_instr is valid (/proc) */ 677c478bd9Sstevel@tonic-gate #define NORMAL_STEP 0x10 /* normal debugger-requested single-step */ 687c478bd9Sstevel@tonic-gate #define WATCH_STEP 0x20 /* single-stepping in watchpoint emulation */ 697c478bd9Sstevel@tonic-gate #define CPC_OVERFLOW 0x40 /* performance counters overflowed */ 707c478bd9Sstevel@tonic-gate #define RUPDATE_PENDING 0x80 /* new register values in the pcb -> regs */ 71*65a89a64Smarx #define REQUEST_STEP 0x100 /* request pending to single-step this lwp */ 72*65a89a64Smarx #define REQUEST_NOSTEP 0x200 /* request pending to disable single-step */ 737c478bd9Sstevel@tonic-gate 747c478bd9Sstevel@tonic-gate /* fpu_flags */ 757c478bd9Sstevel@tonic-gate #define FPU_EN 0x1 /* flag signifying fpu in use */ 767c478bd9Sstevel@tonic-gate #define FPU_VALID 0x2 /* fpu_regs has valid fpu state */ 777c478bd9Sstevel@tonic-gate #define FPU_MODIFIED 0x4 /* fpu_regs is modified (/proc) */ 787c478bd9Sstevel@tonic-gate 797c478bd9Sstevel@tonic-gate #define FPU_INVALID 0x0 /* fpu context is not in use */ 807c478bd9Sstevel@tonic-gate 817c478bd9Sstevel@tonic-gate /* fpu_flags */ 827c478bd9Sstevel@tonic-gate 837c478bd9Sstevel@tonic-gate #ifdef __cplusplus 847c478bd9Sstevel@tonic-gate } 857c478bd9Sstevel@tonic-gate #endif 867c478bd9Sstevel@tonic-gate 877c478bd9Sstevel@tonic-gate #endif /* _SYS_PCB_H */ 88