xref: /titanic_50/usr/src/uts/intel/io/pci/pci_autoconfig.c (revision 8fc7923fdc5ec102fd07ccf5c85608bb0e55f529)
1ae115bc7Smrj /*
2ae115bc7Smrj  * CDDL HEADER START
3ae115bc7Smrj  *
4ae115bc7Smrj  * The contents of this file are subject to the terms of the
5ae115bc7Smrj  * Common Development and Distribution License (the "License").
6ae115bc7Smrj  * You may not use this file except in compliance with the License.
7ae115bc7Smrj  *
8ae115bc7Smrj  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9ae115bc7Smrj  * or http://www.opensolaris.org/os/licensing.
10ae115bc7Smrj  * See the License for the specific language governing permissions
11ae115bc7Smrj  * and limitations under the License.
12ae115bc7Smrj  *
13ae115bc7Smrj  * When distributing Covered Code, include this CDDL HEADER in each
14ae115bc7Smrj  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15ae115bc7Smrj  * If applicable, add the following below this CDDL HEADER, with the
16ae115bc7Smrj  * fields enclosed by brackets "[]" replaced with your own identifying
17ae115bc7Smrj  * information: Portions Copyright [yyyy] [name of copyright owner]
18ae115bc7Smrj  *
19ae115bc7Smrj  * CDDL HEADER END
20ae115bc7Smrj  */
21ae115bc7Smrj /*
2205f867c3Sgs150176  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
23ae115bc7Smrj  * Use is subject to license terms.
24ae115bc7Smrj  */
25ae115bc7Smrj 
26ae115bc7Smrj /*
27ae115bc7Smrj  * Determine the PCI configuration mechanism recommended by the BIOS.
28ae115bc7Smrj  */
29ae115bc7Smrj 
30ae115bc7Smrj #include <sys/types.h>
31ae115bc7Smrj #include <sys/sunddi.h>
32ae115bc7Smrj #include <sys/pci_impl.h>
33ae115bc7Smrj #include <sys/ddi_subrdefs.h>
34ae115bc7Smrj #include <sys/bootconf.h>
35ae115bc7Smrj #include <sys/psw.h>
36ae115bc7Smrj #include <sys/modctl.h>
37ae115bc7Smrj #include <sys/errno.h>
38ae115bc7Smrj #include <sys/pci.h>
39ae115bc7Smrj #include <sys/pci_cfgspace.h>
40ae115bc7Smrj #include <sys/reboot.h>
41ae115bc7Smrj #include <sys/pci_cfgspace_impl.h>
42ae115bc7Smrj #include <sys/mutex.h>
43ae115bc7Smrj 
44ae115bc7Smrj extern int pci_boot_debug;
45ae115bc7Smrj 
46ae115bc7Smrj /*
47ae115bc7Smrj  * Interface routines
48ae115bc7Smrj  */
49ae115bc7Smrj void pci_enumerate(int);
50ae115bc7Smrj void pci_setup_tree(void);
51ae115bc7Smrj void pci_reprogram(void);
52*8fc7923fSDana Myers void bus_res_fini(void);
53ae115bc7Smrj 
54ae115bc7Smrj static struct modlmisc modlmisc = {
55613b2871SRichard Bean 	&mod_miscops, "PCI BIOS interface"
56ae115bc7Smrj };
57ae115bc7Smrj 
58ae115bc7Smrj static struct modlinkage modlinkage = {
59ae115bc7Smrj 	MODREV_1, (void *)&modlmisc, NULL
60ae115bc7Smrj };
61ae115bc7Smrj 
62ae115bc7Smrj int
_init(void)63ae115bc7Smrj _init(void)
64ae115bc7Smrj {
65ae115bc7Smrj 	int	err;
66ae115bc7Smrj 
67ae115bc7Smrj 	if ((err = mod_install(&modlinkage)) != 0)
68ae115bc7Smrj 		return (err);
69ae115bc7Smrj 
70ae115bc7Smrj 	impl_bus_add_probe(pci_enumerate);
71ae115bc7Smrj 	return (0);
72ae115bc7Smrj }
73ae115bc7Smrj 
74ae115bc7Smrj int
_fini(void)75ae115bc7Smrj _fini(void)
76ae115bc7Smrj {
77ae115bc7Smrj 	int	err;
78ae115bc7Smrj 
79ae115bc7Smrj 	if ((err = mod_remove(&modlinkage)) != 0)
80ae115bc7Smrj 		return (err);
81ae115bc7Smrj 
82ae115bc7Smrj 	impl_bus_delete_probe(pci_enumerate);
83*8fc7923fSDana Myers 	bus_res_fini();
84ae115bc7Smrj 	return (0);
85ae115bc7Smrj }
86ae115bc7Smrj 
87ae115bc7Smrj int
_info(struct modinfo * modinfop)88ae115bc7Smrj _info(struct modinfo *modinfop)
89ae115bc7Smrj {
90ae115bc7Smrj 	return (mod_info(&modlinkage, modinfop));
91ae115bc7Smrj }
92ae115bc7Smrj 
93ae115bc7Smrj 
94ae115bc7Smrj /*
95ae115bc7Smrj  * This function is invoked twice: first time, with reprogram=0 to
96ae115bc7Smrj  * set up the PCI portion of the device tree. The second time is
97ae115bc7Smrj  * for reprogramming devices not set up by the BIOS.
98ae115bc7Smrj  */
99ae115bc7Smrj void
pci_enumerate(int reprogram)100ae115bc7Smrj pci_enumerate(int reprogram)
101ae115bc7Smrj {
102ae115bc7Smrj 	extern void add_pci_fixes(void);
103ae115bc7Smrj 	extern void undo_pci_fixes(void);
104ae115bc7Smrj 
105ae115bc7Smrj 	add_pci_fixes();
106ae115bc7Smrj 
107ae115bc7Smrj 	if (reprogram) {
108ae115bc7Smrj 		pci_reprogram();
109ae115bc7Smrj 		undo_pci_fixes();
110ae115bc7Smrj 		return;
111ae115bc7Smrj 	}
112ae115bc7Smrj 
113ae115bc7Smrj 	/* setup device tree */
114ae115bc7Smrj 	pci_setup_tree();
115ae115bc7Smrj 	undo_pci_fixes();
116ae115bc7Smrj }
117