1*b60f2a0bSfr41279# 2*b60f2a0bSfr41279# CDDL HEADER START 3*b60f2a0bSfr41279# 4*b60f2a0bSfr41279# The contents of this file are subject to the terms of the 5*b60f2a0bSfr41279# Common Development and Distribution License (the "License"). 6*b60f2a0bSfr41279# You may not use this file except in compliance with the License. 7*b60f2a0bSfr41279# 8*b60f2a0bSfr41279# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*b60f2a0bSfr41279# or http://www.opensolaris.org/os/licensing. 10*b60f2a0bSfr41279# See the License for the specific language governing permissions 11*b60f2a0bSfr41279# and limitations under the License. 12*b60f2a0bSfr41279# 13*b60f2a0bSfr41279# When distributing Covered Code, include this CDDL HEADER in each 14*b60f2a0bSfr41279# file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*b60f2a0bSfr41279# If applicable, add the following below this CDDL HEADER, with the 16*b60f2a0bSfr41279# fields enclosed by brackets "[]" replaced with your own identifying 17*b60f2a0bSfr41279# information: Portions Copyright [yyyy] [name of copyright owner] 18*b60f2a0bSfr41279# 19*b60f2a0bSfr41279# CDDL HEADER END 20*b60f2a0bSfr41279# 21*b60f2a0bSfr41279# 22*b60f2a0bSfr41279# Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23*b60f2a0bSfr41279# Use is subject to license terms. 24*b60f2a0bSfr41279# 25*b60f2a0bSfr41279#ident "%Z%%M% %I% %E% SMI" 26*b60f2a0bSfr41279# 27*b60f2a0bSfr41279# Configuration and targets for bignum module 28*b60f2a0bSfr41279# specific to AMD 64-bit architecture, amd64. 29*b60f2a0bSfr41279# 30*b60f2a0bSfr41279# Bignum configuration (BIGNUM_CFG): 31*b60f2a0bSfr41279# PSR_MUL: 32*b60f2a0bSfr41279# There is a processor-specific implementation bignum multiply functions 33*b60f2a0bSfr41279# HWCAP: 34*b60f2a0bSfr41279# There are multiple implementations of bignum functions, and the 35*b60f2a0bSfr41279# appropriate one must be chosen at run time, based on testing 36*b60f2a0bSfr41279# hardware capabilites. 37*b60f2a0bSfr41279# 38*b60f2a0bSfr41279# -DPSR_MUL: 39*b60f2a0bSfr41279# For AMD64, there is a processor-specific implementation of 40*b60f2a0bSfr41279# the bignum multiply functions, which takes advantage of the 41*b60f2a0bSfr41279# 64x64->128 bit multiply instruction. 42*b60f2a0bSfr41279# 43*b60f2a0bSfr41279# -UHWCAP: 44*b60f2a0bSfr41279# There is only one implementation, because the 128 bit multiply using 45*b60f2a0bSfr41279# general-purpose registers is faster than any MMX or SSE2 implementation. 46*b60f2a0bSfr41279 47*b60f2a0bSfr41279BIGNUM_CFG = -DPSR_MUL 48*b60f2a0bSfr41279 49*b60f2a0bSfr41279$(OBJS_DIR)/bignumimpl.o $(LINTS_DIR)/bignumimpl.ln := \ 50*b60f2a0bSfr41279 CPPFLAGS += $(BIGNUM_CFG) 51*b60f2a0bSfr41279$(OBJS_DIR)/bignum_amd64.o $(LINTS_DIR)/bignum_amd64.ln := \ 52*b60f2a0bSfr41279 CPPFLAGS += $(BIGNUM_CFG) 53*b60f2a0bSfr41279 54*b60f2a0bSfr41279$(OBJS_DIR)/bignum_amd64.o: $(BIGNUMDIR)/amd64/bignum_amd64.c 55*b60f2a0bSfr41279 $(COMPILE.c) -o $@ $(BIGNUMDIR)/amd64/bignum_amd64.c 56*b60f2a0bSfr41279 $(CTFCONVERT_O) 57*b60f2a0bSfr41279 $(POST_PROCESS_O) 58*b60f2a0bSfr41279 59*b60f2a0bSfr41279$(OBJS_DIR)/bignum_amd64_asm.o: $(BIGNUMDIR)/amd64/bignum_amd64_asm.s 60*b60f2a0bSfr41279 $(COMPILE.s) -P -o $@ $(BIGNUM_CFG) $(BIGNUMDIR)/amd64/bignum_amd64_asm.s 61*b60f2a0bSfr41279 $(POST_PROCESS_O) 62*b60f2a0bSfr41279 63*b60f2a0bSfr41279$(LINTS_DIR)/bignum_amd64.ln: $(BIGNUMDIR)/amd64/bignum_amd64.c 64*b60f2a0bSfr41279 @($(LHEAD) $(LINT.c) $(BIGNUMDIR)/amd64/bignum_amd64.c $(LTAIL)) 65*b60f2a0bSfr41279 66*b60f2a0bSfr41279$(LINTS_DIR)/bignum_amd64_asm.ln: $(BIGNUMDIR)/amd64/bignum_amd64_asm.s 67*b60f2a0bSfr41279 @($(LHEAD) $(LINT.s) $(BIGNUMDIR)/amd64/bignum_amd64_asm.s $(LTAIL)) 68