xref: /titanic_50/usr/src/uts/intel/asm/cpu.h (revision 6e541dddacc0a95840d0a16564b1adbebdf55695)
17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate  * CDDL HEADER START
37c478bd9Sstevel@tonic-gate  *
47c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*6e541dddSmrj  * Common Development and Distribution License (the "License").
6*6e541dddSmrj  * You may not use this file except in compliance with the License.
77c478bd9Sstevel@tonic-gate  *
87c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
107c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
117c478bd9Sstevel@tonic-gate  * and limitations under the License.
127c478bd9Sstevel@tonic-gate  *
137c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
147c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
167c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
177c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
187c478bd9Sstevel@tonic-gate  *
197c478bd9Sstevel@tonic-gate  * CDDL HEADER END
207c478bd9Sstevel@tonic-gate  */
217c478bd9Sstevel@tonic-gate /*
22*6e541dddSmrj  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
237c478bd9Sstevel@tonic-gate  * Use is subject to license terms.
247c478bd9Sstevel@tonic-gate  */
257c478bd9Sstevel@tonic-gate 
267c478bd9Sstevel@tonic-gate #ifndef _ASM_CPU_H
277c478bd9Sstevel@tonic-gate #define	_ASM_CPU_H
287c478bd9Sstevel@tonic-gate 
297c478bd9Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
307c478bd9Sstevel@tonic-gate 
317c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
327c478bd9Sstevel@tonic-gate extern "C" {
337c478bd9Sstevel@tonic-gate #endif
347c478bd9Sstevel@tonic-gate 
357c478bd9Sstevel@tonic-gate #if !defined(__lint) && defined(__GNUC__)
367c478bd9Sstevel@tonic-gate 
377c478bd9Sstevel@tonic-gate #if defined(__i386) || defined(__amd64)
387c478bd9Sstevel@tonic-gate 
397c478bd9Sstevel@tonic-gate extern __inline__ void ht_pause(void)
407c478bd9Sstevel@tonic-gate {
417c478bd9Sstevel@tonic-gate 	__asm__ __volatile__(
427c478bd9Sstevel@tonic-gate 	    "pause");
437c478bd9Sstevel@tonic-gate }
447c478bd9Sstevel@tonic-gate 
457c478bd9Sstevel@tonic-gate extern __inline__ void cli(void)
467c478bd9Sstevel@tonic-gate {
477c478bd9Sstevel@tonic-gate 	__asm__ __volatile__(
487c478bd9Sstevel@tonic-gate 	    "cli" : : : "memory");
497c478bd9Sstevel@tonic-gate }
507c478bd9Sstevel@tonic-gate 
517c478bd9Sstevel@tonic-gate extern __inline__ void sti(void)
527c478bd9Sstevel@tonic-gate {
537c478bd9Sstevel@tonic-gate 	__asm__ __volatile__(
547c478bd9Sstevel@tonic-gate 	    "sti");
557c478bd9Sstevel@tonic-gate }
567c478bd9Sstevel@tonic-gate 
577c478bd9Sstevel@tonic-gate extern __inline__ void i86_halt(void)
587c478bd9Sstevel@tonic-gate {
597c478bd9Sstevel@tonic-gate 	__asm__ __volatile__(
607c478bd9Sstevel@tonic-gate 	    "sti; hlt");
617c478bd9Sstevel@tonic-gate }
627c478bd9Sstevel@tonic-gate 
637c478bd9Sstevel@tonic-gate #endif	/* __i386 || defined(__amd64) */
647c478bd9Sstevel@tonic-gate 
65*6e541dddSmrj #if defined(__amd64)
66*6e541dddSmrj 
67*6e541dddSmrj extern __inline__ void __set_ds(selector_t value)
68*6e541dddSmrj {
69*6e541dddSmrj 	__asm__ __volatile__(
70*6e541dddSmrj 	"movw	%0, %%ds"
71*6e541dddSmrj 	: /* no output */
72*6e541dddSmrj 	: "r" (value));
73*6e541dddSmrj }
74*6e541dddSmrj 
75*6e541dddSmrj extern __inline__ void __set_es(selector_t value)
76*6e541dddSmrj {
77*6e541dddSmrj 	__asm__ __volatile__(
78*6e541dddSmrj 	"movw	%0, %%es"
79*6e541dddSmrj 	: /* no output */
80*6e541dddSmrj 	: "r" (value));
81*6e541dddSmrj }
82*6e541dddSmrj 
83*6e541dddSmrj extern __inline__ void __set_fs(selector_t value)
84*6e541dddSmrj {
85*6e541dddSmrj 	__asm__ __volatile__(
86*6e541dddSmrj 	"movw	%0, %%fs"
87*6e541dddSmrj 	: /* no output */
88*6e541dddSmrj 	: "r" (value));
89*6e541dddSmrj }
90*6e541dddSmrj 
91*6e541dddSmrj extern __inline__ void __set_gs(selector_t value)
92*6e541dddSmrj {
93*6e541dddSmrj 	__asm__ __volatile__(
94*6e541dddSmrj 	"movw	%0, %%gs"
95*6e541dddSmrj 	: /* no output */
96*6e541dddSmrj 	: "r" (value));
97*6e541dddSmrj }
98*6e541dddSmrj 
99*6e541dddSmrj extern __inline__ void __swapgs(void)
100*6e541dddSmrj {
101*6e541dddSmrj 	__asm__ __volatile__(
102*6e541dddSmrj 	"mfence; swapgs");
103*6e541dddSmrj }
104*6e541dddSmrj 
105*6e541dddSmrj #endif	/* __amd64 */
106*6e541dddSmrj 
1077c478bd9Sstevel@tonic-gate #endif	/* !__lint && __GNUC__ */
1087c478bd9Sstevel@tonic-gate 
1097c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
1107c478bd9Sstevel@tonic-gate }
1117c478bd9Sstevel@tonic-gate #endif
1127c478bd9Sstevel@tonic-gate 
1137c478bd9Sstevel@tonic-gate #endif	/* _ASM_CPU_H */
114