xref: /titanic_50/usr/src/uts/i86pc/sys/apic_common.h (revision c9a6ea2e938727c95af7108c5e00eee4c890c7ae)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
23  */
24 
25 #ifndef _SYS_APIC_COMMON_H
26 #define	_SYS_APIC_COMMON_H
27 
28 #include <sys/psm_types.h>
29 #include <sys/avintr.h>
30 #include <sys/privregs.h>
31 #include <sys/pci.h>
32 
33 #ifdef	__cplusplus
34 extern "C" {
35 #endif
36 
37 /*
38  * Functions & Variables common to pcplusmp & apix
39  */
40 
41 #include <sys/psm_common.h>
42 
43 /* Methods for multiple IOAPIC */
44 enum apic_ioapic_method_type {
45 	APIC_MUL_IOAPIC_NONE,		/* use to disable pcplusmp fallback */
46 	APIC_MUL_IOAPIC_MASK,		/* Set RT Entry Mask bit before EOI */
47 	APIC_MUL_IOAPIC_DEOI,		/* Directed EOI */
48 	APIC_MUL_IOAPIC_IOXAPIC,	/* IOxAPIC */
49 	APIC_MUL_IOAPIC_IIR,		/* IOMMU interrup remapping */
50 	APIC_MUL_IOAPIC_PCPLUSMP	/* Fall back to old pcplusmp */
51 };
52 
53 #define	APIX_IS_DIRECTED_EOI(type)	\
54 	((type) == APIC_MUL_IOAPIC_DEOI || (type) == APIC_MUL_IOAPIC_IIR)
55 #define	APIX_IS_MASK_RDT(type)	\
56 	((type) == APIC_MUL_IOAPIC_NONE || (type) == APIC_MUL_IOAPIC_MASK)
57 
58 extern int	apix_enable;
59 extern int	apix_loaded(void);
60 extern enum apic_ioapic_method_type apix_mul_ioapic_method;
61 
62 extern int	apic_oneshot;
63 /* to allow disabling one-shot capability */
64 extern int	apic_oneshot_enable;
65 
66 /* Now the ones for Dynamic Interrupt distribution */
67 extern int	apic_enable_dynamic_migration;
68 
69 extern int apic_have_32bit_cr8;
70 
71 extern struct psm_ops *psmops;
72 
73 /*
74  * These variables are frequently accessed in apic_intr_enter(),
75  * apic_intr_exit and apic_setspl, so group them together
76  */
77 extern volatile uint32_t *apicadr;	/* virtual addr of local APIC	*/
78 extern uchar_t	apic_io_vectbase[MAX_IO_APIC];
79 extern uchar_t	apic_io_vectend[MAX_IO_APIC];
80 extern uchar_t	apic_io_ver[MAX_IO_APIC];
81 extern int	apic_io_max;
82 extern int 	apic_nvidia_io_max;
83 extern int apic_setspl_delay;		/* apic_setspl - delay enable	*/
84 extern int apic_clkvect;
85 
86 /* vector at which error interrupts come in */
87 extern int apic_errvect;
88 extern int apic_enable_error_intr;
89 extern int apic_error_display_delay;
90 
91 /* vector at which performance counter overflow interrupts come in */
92 extern int apic_cpcovf_vect;
93 extern int apic_enable_cpcovf_intr;
94 
95 /* vector at which CMCI interrupts come in */
96 extern int apic_cmci_vect;
97 extern int cmi_enable_cmci;
98 extern void cmi_cmci_trap(void);
99 
100 extern kmutex_t cmci_cpu_setup_lock;	/* protects cmci_cpu_setup_registered */
101 extern int cmci_cpu_setup_registered;
102 
103 extern int	apic_forceload;
104 
105 extern int	apic_coarse_hrtime;	/* 0 - use accurate slow gethrtime() */
106 					/* 1 - use gettime() for performance */
107 extern int	apic_flat_model;		/* 0 - clustered. 1 - flat */
108 
109 extern int	apic_panic_on_nmi;
110 extern int	apic_panic_on_apic_error;
111 
112 extern int	apic_verbose;
113 
114 /* minimum number of timer ticks to program to */
115 extern int apic_min_timer_ticks;
116 
117 #ifdef DEBUG
118 extern int	apic_debug;
119 extern int	apic_restrict_vector;
120 
121 extern int	apic_debug_msgbuf[APIC_DEBUG_MSGBUFSIZE];
122 extern int	apic_debug_msgbufindex;
123 
124 #endif /* DEBUG */
125 
126 extern uint_t	apic_nsec_per_intr;
127 extern uint_t	apic_nticks;
128 extern uint_t	apic_skipped_redistribute;
129 
130 extern uint_t	last_count_read;
131 extern lock_t	apic_mode_switch_lock;
132 extern lock_t	apic_gethrtime_lock;
133 extern volatile int	apic_hrtime_stamp;
134 extern volatile hrtime_t apic_nsec_since_boot;
135 extern uint_t	apic_hertz_count;
136 
137 extern uint64_t apic_ticks_per_SFnsecs;	/* # of ticks in SF nsecs */
138 
139 extern int	apic_hrtime_error;
140 extern int	apic_remote_hrterr;
141 extern int	apic_num_nmis;
142 extern int	apic_apic_error;
143 extern int	apic_num_apic_errors;
144 extern int	apic_num_cksum_errors;
145 
146 extern int	apic_error;
147 
148 /* use to make sure only one cpu handles the nmi */
149 extern lock_t	apic_nmi_lock;
150 /* use to make sure only one cpu handles the error interrupt */
151 extern lock_t	apic_error_lock;
152 
153 /* Patchable global variables. */
154 extern int	apic_kmdb_on_nmi;	/* 0 - no, 1 - yes enter kmdb */
155 extern uint32_t	apic_divide_reg_init;	/* 0 - divide by 2 */
156 
157 extern apic_intrmap_ops_t *apic_vt_ops;
158 
159 #ifdef	DEBUG
160 extern int	apic_break_on_cpu;
161 extern int	apic_stretch_interrupts;
162 extern int	apic_stretch_ISR;	/* IPL of 3 matches nothing now */
163 #endif
164 
165 extern ddi_periodic_t apic_periodic_id;
166 
167 extern void apic_nmi_intr(caddr_t arg, struct regs *rp);
168 extern int	apic_clkinit();
169 extern hrtime_t apic_gettime();
170 extern hrtime_t apic_gethrtime();
171 extern int	apic_cpu_start(processorid_t cpuid, caddr_t ctx);
172 extern int	apic_cpu_stop(processorid_t cpuid, caddr_t ctx);
173 extern int	apic_cpu_add(psm_cpu_request_t *reqp);
174 extern int	apic_cpu_remove(psm_cpu_request_t *reqp);
175 extern int	apic_cpu_ops(psm_cpu_request_t *reqp);
176 extern void	apic_switch_ipi_callback(boolean_t enter);
177 extern void	apic_send_ipi(int cpun, int ipl);
178 extern void	apic_set_idlecpu(processorid_t cpun);
179 extern void	apic_unset_idlecpu(processorid_t cpun);
180 extern void	apic_shutdown(int cmd, int fcn);
181 extern void	apic_preshutdown(int cmd, int fcn);
182 extern processorid_t	apic_get_next_processorid(processorid_t cpun);
183 extern void	apic_timer_reprogram(hrtime_t time);
184 extern void	apic_timer_enable(void);
185 extern void	apic_timer_disable(void);
186 
187 extern int apic_error_intr();
188 extern void apic_cpcovf_mask_clear(void);
189 extern int cmci_cpu_setup(cpu_setup_t what, int cpuid, void *arg);
190 extern void apic_intrmap_init(int apic_mode);
191 extern processorid_t apic_find_cpu(int flag);
192 extern processorid_t apic_get_next_bind_cpu(void);
193 
194 extern int	apic_support_msi;
195 extern int	apic_multi_msi_enable;
196 extern int	apic_msix_enable;
197 
198 extern uint32_t apic_get_localapicid(uint32_t cpuid);
199 extern uchar_t apic_get_ioapicid(uchar_t ioapicindex);
200 
201 #ifdef	__cplusplus
202 }
203 #endif
204 
205 #endif	/* _SYS_APIC_COMMON_H */
206