1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22/* 23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27#pragma ident "%Z%%M% %I% %E% SMI" 28 29/ 30/ Inline functions specific to the i86pc kernel running on bare metal. 31/ 32 33/ 34/ return value of cr3 register 35/ 36 .inline getcr3,0 37 movq %cr3, %rax 38 .end 39 40/ 41/ reload cr3 register with its current value 42/ 43 .inline reload_cr3,0 44 movq %cr3, %rdi 45 movq %rdi, %cr3 46 .end 47 48/ 49/ return value of cr8 register 50/ 51 .inline getcr8,0 52 movq %cr8, %rax 53 .end 54 55/ 56/ set cr8 register 57/ 58 .inline setcr8,0 59 movq %rdi, %cr8 60 .end 61 62/ 63/ enable interrupts 64/ 65 .inline sti,0 66 sti 67 .end 68 69/ 70/ disable interrupts 71/ 72 .inline cli,0 73 cli 74 .end 75 76/ 77/ disable interrupts and return value describing if interrupts were enabled 78/ 79 .inline clear_int_flag,0 80 pushfq 81 cli 82 popq %rax 83 .end 84 85 .inline intr_clear,0 86 pushfq 87 cli 88 popq %rax 89 .end 90 91/ 92/ return the value of the flags register 93/ 94 .inline getflags,0 95 pushfq 96 popq %rax 97 .end 98 99/ 100/ restore interrupt enable flag to value returned from 'clear_int_flag' above 101/ 102 .inline restore_int_flag,4 103 testq $0x200, %rdi 104 jz 1f 105 sti 1061: 107 .end 108 109 .inline intr_restore,4 110 testq $0x200, %rdi 111 jz 1f 112 sti 1131: 114 .end 115 116/ 117/ in and out 118/ 119 .inline inb,4 120 movq %rdi, %rdx 121 xorq %rax, %rax 122 inb (%dx) 123 .end 124 125 .inline inw,4 126 movq %rdi, %rdx 127 xorq %rax, %rax 128 inw (%dx) 129 .end 130 131 .inline inl,4 132 movq %rdi, %rdx 133 xorq %rax, %rax 134 inl (%dx) 135 .end 136 137 .inline outb,8 138 movq %rdi, %rdx 139 movq %rsi, %rax 140 outb (%dx) 141 .end 142 143 .inline outw,8 144 movq %rdi, %rdx 145 movq %rsi, %rax 146 outw (%dx) 147 .end 148 149 .inline outl,8 150 movq %rdi, %rdx 151 movq %rsi, %rax 152 outl (%dx) 153 .end 154 155/* 156 * Call the halt instruction. This will put the CPU to sleep until 157 * it is again awoken via an interrupt. 158 * This function should be called with interrupts already disabled 159 * for the CPU. 160 * Note that "sti" will only enable interrupts at the end of the 161 * subsequent instruction...in this case: "hlt". 162 */ 163 .inline i86_halt,0 164 sti 165 hlt 166 .end 167/ 168/ execute the bsrw instruction 169/ 170 .inline bsrw_insn,4 171 xorl %eax, %eax 172 bsrw %di, %ax 173 .end 174 175