1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SATA_DEFS_H 28 #define _SATA_DEFS_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 #include <sys/scsi/generic/mode.h> 37 38 /* 39 * Common ATA commands (subset) 40 */ 41 #define SATAC_DIAG 0x90 /* diagnose command */ 42 #define SATAC_RECAL 0x10 /* restore cmd, 4 bits step rate */ 43 #define SATAC_FORMAT 0x50 /* format track command */ 44 #define SATAC_SET_FEATURES 0xef /* set features */ 45 #define SATAC_IDLE_IM 0xe1 /* idle immediate */ 46 #define SATAC_STANDBY_IM 0xe0 /* standby immediate */ 47 #define SATAC_DOOR_LOCK 0xde /* door lock */ 48 #define SATAC_DOOR_UNLOCK 0xdf /* door unlock */ 49 #define SATAC_IDLE 0xe3 /* idle */ 50 51 /* 52 * ATA/ATAPI disk commands (subset) 53 */ 54 #define SATAC_DEVICE_RESET 0x08 /* ATAPI device reset */ 55 #define SATAC_DOWNLOAD_MICROCODE 0x92 /* Download microcode */ 56 #define SATAC_EJECT 0xed /* media eject */ 57 #define SATAC_FLUSH_CACHE 0xe7 /* flush write-cache */ 58 #define SATAC_ID_DEVICE 0xec /* IDENTIFY DEVICE */ 59 #define SATAC_ID_PACKET_DEVICE 0xa1 /* ATAPI identify packet device */ 60 #define SATAC_INIT_DEVPARMS 0x91 /* initialize device parameters */ 61 #define SATAC_PACKET 0xa0 /* ATAPI packet */ 62 #define SATAC_RDMULT 0xc4 /* read multiple w/DMA */ 63 #define SATAC_RDSEC 0x20 /* read sector */ 64 #define SATAC_RDVER 0x40 /* read verify */ 65 #define SATAC_READ_DMA 0xc8 /* read DMA */ 66 #define SATAC_SEEK 0x70 /* seek */ 67 #define SATAC_SERVICE 0xa2 /* queued/overlap service */ 68 #define SATAC_SETMULT 0xc6 /* set multiple mode */ 69 #define SATAC_WRITE_DMA 0xca /* write (multiple) w/DMA */ 70 #define SATAC_WRMULT 0xc5 /* write multiple */ 71 #define SATAC_WRSEC 0x30 /* write sector */ 72 #define SATAC_RDSEC_EXT 0x24 /* read sector extended (LBA48) */ 73 #define SATAC_READ_DMA_EXT 0x25 /* read DMA extended (LBA48) */ 74 #define SATAC_RDMULT_EXT 0x29 /* read multiple extended (LBA48) */ 75 #define SATAC_WRSEC_EXT 0x34 /* read sector extended (LBA48) */ 76 #define SATAC_WRITE_DMA_EXT 0x35 /* read DMA extended (LBA48) */ 77 #define SATAC_WRMULT_EXT 0x39 /* read multiple extended (LBA48) */ 78 79 #define SATAC_READ_DMA_QUEUED 0xc7 /* read DMA / may be queued */ 80 #define SATAC_READ_DMA_QUEUED_EXT 0x26 /* read DMA ext / may be queued */ 81 #define SATAC_WRITE_DMA_QUEUED 0xcc /* read DMA / may be queued */ 82 #define SATAC_WRITE_DMA_QUEUED_EXT 0x36 /* read DMA ext / may be queued */ 83 #define SATAC_READ_PM_REG 0xe4 /* read port mult reg */ 84 #define SATAC_WRITE_PM_REG 0xe8 /* write port mult reg */ 85 86 #define SATAC_READ_FPDMA_QUEUED 0x60 /* First-Party-DMA read queued */ 87 #define SATAC_WRITE_FPDMA_QUEUED 0x61 /* First-Party-DMA write queued */ 88 89 #define SATAC_READ_LOG_EXT 0x2f /* read log */ 90 91 #define SATAC_SMART 0xb0 /* SMART */ 92 93 #define SATA_LOG_PAGE_10 0x10 /* log page 0x10 - SATA error */ 94 /* 95 * Power Managment Commands (subset) 96 */ 97 #define SATAC_CHECK_POWER_MODE 0xe5 /* check power mode */ 98 99 #define SATA_PWRMODE_STANDBY 0 /* standby mode */ 100 #define SATA_PWRMODE_IDLE 0x80 /* idle mode */ 101 #define SATA_PWRMODE_ACTIVE 0xFF /* active or idle mode, rev7 spec */ 102 103 104 /* 105 * SMART FEATURES Subcommands 106 */ 107 #define SATA_SMART_READ_DATA 0xd0 108 #define SATA_SMART_ATTR_AUTOSAVE 0xd2 109 #define SATA_SMART_EXECUTE_OFFLINE_IMM 0xd4 110 #define SATA_SMART_READ_LOG 0xd5 111 #define SATA_SMART_WRITE_LOG 0xd6 112 #define SATA_SMART_ENABLE_OPS 0xd8 113 #define SATA_SMART_DISABLE_OPS 0xd9 114 #define SATA_SMART_RETURN_STATUS 0xda 115 116 /* 117 * SET FEATURES Subcommands 118 */ 119 #define SATAC_SF_ENABLE_WRITE_CACHE 0x02 120 #define SATAC_SF_TRANSFER_MODE 0x03 121 #define SATAC_SF_ENABLE_ACOUSTIC 0x42 122 #define SATAC_SF_DISABLE_READ_AHEAD 0x55 123 #define SATAC_SF_DISABLE_WRITE_CACHE 0x82 124 #define SATAC_SF_ENABLE_READ_AHEAD 0xaa 125 #define SATAC_SF_DISABLE_ACOUSTIC 0xc2 126 127 /* 128 * SET FEATURES transfer mode values 129 */ 130 #define SATAC_TRANSFER_MODE_PIO_DEFAULT 0x00 131 #define SATAC_TRANSFER_MODE_PIO_DISABLE_IODRY 0x01 132 #define SATAC_TRANSFER_MODE_PIO_FLOW_CONTROL 0x08 133 #define SATAC_TRANSFER_MODE_MULTI_WORD_DMA 0x20 134 #define SATAC_TRANSFER_MODE_ULTRA_DMA 0x40 135 136 /* 137 * Download microcode subcommands 138 */ 139 #define SATA_DOWNLOAD_MCODE_TEMP 1 /* Revert on/ reset/pwr cycle */ 140 #define SATA_DOWNLOAD_MCODE_SAVE 7 /* No offset, keep mcode */ 141 142 143 /* Generic ATA definitions */ 144 145 #define SATA_TAG_QUEUING_SHIFT 3 146 #define SATA_TAG_QUEUING_MASK 0x1f 147 /* 148 * Identify Device data 149 * Although bot ATA and ATAPI devices' Identify Data has the same lenght, 150 * some words have different meaning/content and/or are irrelevant for 151 * other type of device. 152 * Following is the ATA Device Identify data layout 153 */ 154 typedef struct sata_id { 155 /* WORD */ 156 /* OFFSET COMMENT */ 157 ushort_t ai_config; /* 0 general configuration bits */ 158 ushort_t ai_fixcyls; /* 1 # of cylinders (obsolete) */ 159 ushort_t ai_resv0; /* 2 # reserved */ 160 ushort_t ai_heads; /* 3 # of heads (obsolete) */ 161 ushort_t ai_trksiz; /* 4 # of bytes/track (retired) */ 162 ushort_t ai_secsiz; /* 5 # of bytes/sector (retired) */ 163 ushort_t ai_sectors; /* 6 # of sectors/track (obsolete) */ 164 ushort_t ai_resv1[3]; /* 7 "Vendor Unique" */ 165 char ai_drvser[20]; /* 10 Serial number */ 166 ushort_t ai_buftype; /* 20 Buffer type */ 167 ushort_t ai_bufsz; /* 21 Buffer size in 512 byte incr */ 168 ushort_t ai_ecc; /* 22 # of ecc bytes avail on rd/wr */ 169 char ai_fw[8]; /* 23 Firmware revision */ 170 char ai_model[40]; /* 27 Model # */ 171 ushort_t ai_mult1; /* 47 Multiple command flags */ 172 ushort_t ai_dwcap; /* 48 Doubleword capabilities */ 173 ushort_t ai_cap; /* 49 Capabilities */ 174 ushort_t ai_resv2; /* 50 Reserved */ 175 ushort_t ai_piomode; /* 51 PIO timing mode */ 176 ushort_t ai_dmamode; /* 52 DMA timing mode */ 177 ushort_t ai_validinfo; /* 53 bit0: wds 54-58, bit1: 64-70 */ 178 ushort_t ai_curcyls; /* 54 # of current cylinders */ 179 ushort_t ai_curheads; /* 55 # of current heads */ 180 ushort_t ai_cursectrk; /* 56 # of current sectors/track */ 181 ushort_t ai_cursccp[2]; /* 57 current sectors capacity */ 182 ushort_t ai_mult2; /* 59 multiple sectors info */ 183 ushort_t ai_addrsec[2]; /* 60 LBA only: no of addr secs */ 184 ushort_t ai_sworddma; /* 62 single word dma modes */ 185 ushort_t ai_dworddma; /* 63 double word dma modes */ 186 ushort_t ai_advpiomode; /* 64 advanced PIO modes supported */ 187 ushort_t ai_minmwdma; /* 65 min multi-word dma cycle info */ 188 ushort_t ai_recmwdma; /* 66 rec multi-word dma cycle info */ 189 ushort_t ai_minpio; /* 67 min PIO cycle info */ 190 ushort_t ai_minpioflow; /* 68 min PIO cycle info w/flow ctl */ 191 ushort_t ai_resv3[2]; /* 69,70 reserved */ 192 ushort_t ai_typtime[2]; /* 71-72 timing */ 193 ushort_t ai_resv4[2]; /* 73-74 reserved */ 194 ushort_t ai_qdepth; /* 75 queue depth */ 195 ushort_t ai_satacap; /* 76 SATA capabilities */ 196 ushort_t ai_resv5; /* 77 reserved */ 197 ushort_t ai_satafsup; /* 78 SATA features supported */ 198 ushort_t ai_satafenbl; /* 79 SATA features enabled */ 199 ushort_t ai_majorversion; /* 80 major versions supported */ 200 ushort_t ai_minorversion; /* 81 minor version number supported */ 201 ushort_t ai_cmdset82; /* 82 command set supported */ 202 ushort_t ai_cmdset83; /* 83 more command sets supported */ 203 ushort_t ai_cmdset84; /* 84 more command sets supported */ 204 ushort_t ai_features85; /* 85 enabled features */ 205 ushort_t ai_features86; /* 86 enabled features */ 206 ushort_t ai_features87; /* 87 enabled features */ 207 ushort_t ai_ultradma; /* 88 Ultra DMA mode */ 208 ushort_t ai_erasetime; /* 89 security erase time */ 209 ushort_t ai_erasetimex; /* 90 enhanced security erase time */ 210 ushort_t ai_adv_pwr_mgmt; /* 91 advanced power management time */ 211 ushort_t ai_master_pwd; /* 92 master password revision code */ 212 ushort_t ai_hrdwre_reset; /* 93 hardware reset result */ 213 ushort_t ai_acoustic; /* 94 accoustic management values */ 214 ushort_t ai_stream_min_sz; /* 95 stream minimum request size */ 215 ushort_t ai_stream_xfer_d; /* 96 streaming transfer time (DMA) */ 216 ushort_t ai_stream_lat; /* 97 streaming access latency */ 217 ushort_t ai_streamperf[2]; /* 98-99 streaming performance gran. */ 218 ushort_t ai_addrsecxt[4]; /* 100 extended max LBA sector */ 219 ushort_t ai_stream_xfer_p; /* 104 streaming transfer time (PIO) */ 220 ushort_t ai_padding1; /* 105 pad */ 221 ushort_t ai_phys_sect_sz; /* 106 physical sector size */ 222 ushort_t ai_seek_delay; /* 107 inter-seek delay time (usecs) */ 223 ushort_t ai_naa_ieee_oui; /* 108 NAA/IEEE OUI */ 224 ushort_t ai_ieee_oui_uid; /* 109 IEEE OUT/unique id */ 225 ushort_t ai_uid_mid; /* 110 unique id (mid) */ 226 ushort_t ai_uid_low; /* 111 unique id (low) */ 227 ushort_t ai_resv_wwn[4]; /* 112-115 reserved for WWN ext. */ 228 ushort_t ai_incits; /* 116 reserved for INCITS TR-37-2004 */ 229 ushort_t ai_words_lsec[2]; /* 117-118 words per logical sector */ 230 ushort_t ai_cmdset119; /* 119 more command sets supported */ 231 ushort_t ai_features120; /* 120 enabled features */ 232 ushort_t ai_padding2[6]; /* pad to 126 */ 233 ushort_t ai_rmsn; /* 127 removable media notification */ 234 ushort_t ai_securestatus; /* 128 security status */ 235 ushort_t ai_vendor[31]; /* 129-159 vendor specific */ 236 ushort_t ai_padding3[16]; /* 160 pad to 176 */ 237 ushort_t ai_curmedser[30]; /* 176-205 current media serial # */ 238 ushort_t ai_sctsupport; /* 206 SCT command transport */ 239 ushort_t ai_padding4[48]; /* 207 pad to 255 */ 240 ushort_t ai_integrity; /* 255 integrity word */ 241 } sata_id_t; 242 243 244 /* Identify Device: general config bits - word 0 */ 245 246 #define SATA_ATA_TYPE_MASK 0x8001 /* ATA Device type mask */ 247 #define SATA_ATA_TYPE 0x0000 /* ATA device */ 248 #define SATA_REM_MEDIA 0x0080 /* Removable media */ 249 #define SATA_INCOMPLETE_DATA 0x0004 /* Incomplete Identify Device data */ 250 251 #define SATA_ID_SERIAL_OFFSET 10 252 #define SATA_ID_SERIAL_LEN 20 253 #define SATA_ID_MODEL_OFFSET 27 254 #define SATA_ID_MODEL_LEN 40 255 #define SATA_ID_FW_LEN 8 256 257 /* Identify Device: common capability bits - word 49 */ 258 259 #define SATA_DMA_SUPPORT 0x0100 260 #define SATA_LBA_SUPPORT 0x0200 261 #define SATA_IORDY_DISABLE 0x0400 262 #define SATA_IORDY_SUPPORT 0x0800 263 #define SATA_STANDBYTIMER 0x2000 264 265 /* Identify Device: ai_validinfo (word 53) */ 266 267 #define SATA_VALIDINFO_88 0x0004 /* word 88 supported fields valid */ 268 269 /* Identify Device: ai_majorversion (word 80) */ 270 271 #define SATA_MAJVER_6 0x0040 /* ATA/ATAPI-6 version supported */ 272 #define SATA_MAJVER_4 0x0010 /* ATA/ATAPI-4 version supported */ 273 274 /* Identify Device: command set supported/enabled bits - words 83 and 86 */ 275 276 #define SATA_EXT48 0x0400 /* 48 bit address feature */ 277 #define SATA_RW_DMA_QUEUED_CMD 0x0002 /* R/W DMA Queued supported */ 278 #define SATA_DWNLOAD_MCODE_CMD 0x0001 /* Download Microcode CMD supp/enbld */ 279 #define SATA_ACOUSTIC_MGMT 0x0200 /* Acoustic Management features */ 280 281 /* Identify Device: command set supported/enabled bits - words 82 and 85 */ 282 283 #define SATA_SMART_SUPPORTED 0x0001 /* SMART feature set is supported */ 284 #define SATA_WRITE_CACHE 0x0020 /* Write Cache supported/enabled */ 285 #define SATA_LOOK_AHEAD 0x0040 /* Look Ahead supported/enabled */ 286 #define SATA_DEVICE_RESET_CMD 0x0200 /* Device Reset CMD supported/enbld */ 287 #define SATA_READ_BUFFER_CMD 0x2000 /* Read Buffer CMD supported/enbld */ 288 #define SATA_WRITE_BUFFER_CMD 0x1000 /* Write Buffer CMD supported/enbld */ 289 #define SATA_SMART_ENABLED 0x0001 /* SMART feature set is enabled */ 290 291 /* Identify Device: command set supported/enabled bits - words 84 & 87 */ 292 #define SATA_SMART_SELF_TEST_SUPPORTED 0x0002 /* SMART self-test supported */ 293 294 #define SATA_MDMA_SEL_MASK 0x0700 /* Multiword DMA selected */ 295 #define SATA_MDMA_2_SEL 0x0400 /* Multiword DMA mode 2 selected */ 296 #define SATA_MDMA_1_SEL 0x0200 /* Multiword DMA mode 1 selected */ 297 #define SATA_MDMA_0_SEL 0x0100 /* Multiword DMA mode 0 selected */ 298 #define SATA_MDMA_2_SUP 0x0004 /* Multiword DMA mode 2 supported */ 299 #define SATA_MDMA_1_SUP 0x0002 /* Multiword DMA mode 1 supported */ 300 #define SATA_MDMA_0_SUP 0x0001 /* Multiword DMA mode 0 supported */ 301 302 /* Identify Device: command set supported/enabled bits - word 206 */ 303 304 /* All are SCT Command Transport support */ 305 #define SATA_SCT_CMD_TRANS_SUP 0x0001 /* anything */ 306 #define SATA_SCT_CMD_TRANS_LNG_SECT_SUP 0x0002 /* Long Sector Access */ 307 #define SATA_SCT_CMD_TRANS_WR_SAME_SUP 0x0004 /* Write Same */ 308 #define SATA_SCT_CMD_TRANS_ERR_RCOV_SUP 0x0008 /* Error Recovery Control */ 309 #define SATA_SCT_CMD_TRANS_FEAT_CTL_SUP 0x0010 /* Features Control */ 310 #define SATA_SCT_CMD_TRANS_DATA_TBL_SUP 0x0020 /* Data Tables supported */ 311 312 #define SATA_DISK_SECTOR_SIZE 512 /* HD physical sector size */ 313 314 /* Identify Packet Device data definitions (ATAPI devices) */ 315 316 /* Identify Packet Device: general config bits - word 0 */ 317 318 #define SATA_ATAPI_TYPE_MASK 0xc000 319 #define SATA_ATAPI_TYPE 0x8000 /* ATAPI device */ 320 #define SATA_ATAPI_ID_PKT_SZ 0x0003 /* Packet size mask */ 321 #define SATA_ATAPI_ID_PKT_12B 0x0000 /* Packet size 12 bytes */ 322 #define SATA_ATAPI_ID_PKT_16B 0x0001 /* Packet size 16 bytes */ 323 #define SATA_ATAPI_ID_DRQ_TYPE 0x0060 /* DRQ asserted in 3ms after pkt */ 324 #define SATA_ATAPI_ID_DRQ_INTR 0x0020 /* Obsolete in ATA/ATAPI 7 */ 325 326 #define SATA_ATAPI_ID_DEV_TYPE 0x0f00 /* device type/command set mask */ 327 #define SATA_ATAPI_ID_DEV_SHFT 8 328 #define SATA_ATAPI_DIRACC_DEV 0x0000 /* Direct Access device */ 329 #define SATA_ATAPI_SQACC_DEV 0x0100 /* Sequential access dev (tape ?) */ 330 #define SATA_ATAPI_CDROM_DEV 0x0500 /* CD_ROM device */ 331 332 /* 333 * Status bits from ATAPI Interrupt reason register (AT_COUNT) register 334 */ 335 #define SATA_ATAPI_I_COD 0x01 /* Command or Data */ 336 #define SATA_ATAPI_I_IO 0x02 /* IO direction */ 337 #define SATA_ATAPI_I_RELEASE 0x04 /* Release for ATAPI overlap */ 338 339 /* ATAPI feature reg definitions */ 340 341 #define SATA_ATAPI_F_OVERLAP 0x02 342 343 344 /* 345 * ATAPI IDENTIFY_DRIVE capabilities word 346 */ 347 348 #define SATA_ATAPI_ID_CAP_DMA 0x0100 349 #define SATA_ATAPI_ID_CAP_OVERLAP 0x2000 350 351 /* 352 * ATAPI signature bits 353 */ 354 #define SATA_ATAPI_SIG_HI 0xeb /* in high cylinder register */ 355 #define SATA_ATAPI_SIG_LO 0x14 /* in low cylinder register */ 356 357 /* These values are pre-set for CD_ROM/DVD ? */ 358 359 #define SATA_ATAPI_SECTOR_SIZE 2048 360 #define SATA_ATAPI_MAX_BYTES_PER_DRQ 0xf800 /* 16 bits - 2KB ie 62KB */ 361 #define SATA_ATAPI_HEADS 64 362 #define SATA_ATAPI_SECTORS_PER_TRK 32 363 364 /* SATA Capabilites bits (word 76) */ 365 366 #define SATA_NCQ 0x100 367 #define SATA_2_SPEED 0x004 368 #define SATA_1_SPEED 0x002 369 370 /* SATA Features Supported (word 78) - not used */ 371 372 /* SATA Features Enabled (word 79) - not used */ 373 374 /* 375 * Generic NCQ related defines 376 */ 377 378 #define NQ 0x80 /* Not a queued cmd - tag not valid */ 379 #define NCQ_TAG_MASK 0x1f /* NCQ command tag mask */ 380 #define FIS_TYPE_REG_H2D 0x27 /* Reg FIS - Host to Device */ 381 #define FIS_CMD_UPDATE 0x80 382 /* 383 * Status bits from AT_STATUS register 384 */ 385 #define SATA_STATUS_BSY 0x80 /* controller busy */ 386 #define SATA_STATUS_DRDY 0x40 /* drive ready */ 387 #define SATA_STATUS_DF 0x20 /* device fault */ 388 #define SATA_STATUS_DSC 0x10 /* seek operation complete */ 389 #define SATA_STATUS_DRQ 0x08 /* data request */ 390 #define SATA_STATUS_CORR 0x04 /* obsolete */ 391 #define SATA_STATUS_IDX 0x02 /* obsolete */ 392 #define SATA_STATUS_ERR 0x01 /* error flag */ 393 394 /* 395 * Status bits from AT_ERROR register 396 */ 397 #define SATA_ERROR_ICRC 0x80 /* CRC data transfer error detected */ 398 #define SATA_ERROR_UNC 0x40 /* uncorrectable data error */ 399 #define SATA_ERROR_MC 0x20 /* Media change */ 400 #define SATA_ERROR_IDNF 0x10 /* ID/Address not found */ 401 #define SATA_ERROR_MCR 0x08 /* media change request */ 402 #define SATA_ERROR_ABORT 0x04 /* aborted command */ 403 #define SATA_ERROR_NM 0x02 /* no media */ 404 #define SATA_ERROR_EOM 0x02 /* end of media (Packet cmds) */ 405 #define SATA_ERROR_ILI 0x01 /* cmd sepcific */ 406 407 408 /* 409 * Bits from the device control register 410 */ 411 #define SATA_DEVCTL_NIEN 0x02 /* not interrupt enabled */ 412 #define SATA_DEVCTL_SRST 0x04 /* software reset */ 413 #define SATA_DEVCTL_HOB 0x80 /* high order bit */ 414 415 /* device_reg */ 416 #define SATA_ADH_LBA 0x40 /* addressing in LBA mode not chs */ 417 418 419 #define SCSI_LOG_PAGE_HDR_LEN 4 /* # bytes of a SCSI log page header */ 420 #define SCSI_LOG_PARAM_HDR_LEN 4 /* # byttes of a SCSI log param hdr */ 421 422 /* Number of log entries per extended selftest log block */ 423 #define ENTRIES_PER_EXT_SELFTEST_LOG_BLK 19 424 425 /* Number of entries per SCSI LOG SENSE SELFTEST RESULTS page */ 426 #define SCSI_ENTRIES_IN_LOG_SENSE_SELFTEST_RESULTS 20 427 428 /* Length of a SCSI LOG SENSE SELFTEST RESULTS parameter */ 429 #define SCSI_LOG_SENSE_SELFTEST_PARAM_LEN 0x10 430 431 #define DIAGNOSTIC_FAILURE_ON_COMPONENT 0x40 432 433 #define SCSI_COMPONENT_81 0x81 434 #define SCSI_COMPONENT_82 0x82 435 #define SCSI_COMPONENT_83 0x83 436 #define SCSI_COMPONENT_84 0x84 437 #define SCSI_COMPONENT_85 0x85 438 #define SCSI_COMPONENT_86 0x86 439 #define SCSI_COMPONENT_87 0x87 440 #define SCSI_COMPONENT_88 0x88 441 442 #define SCSI_ASC_ATA_DEV_FEAT_NOT_ENABLED 0x67 443 #define SCSI_ASCQ_ATA_DEV_FEAT_NOT_ENABLED 0x0b 444 445 #define SCSI_PREDICTED_FAILURE 0x5d 446 #define SCSI_GENERAL_HD_FAILURE 0x10 447 448 #define SCSI_INFO_EXCEPTIONS_PARAM_LEN 4 449 450 #define READ_LOG_EXT_LOG_DIRECTORY 0 451 #define READ_LOG_EXT_NCQ_ERROR_RECOVERY 0x10 452 #define SMART_SELFTEST_LOG_PAGE 6 453 #define EXT_SMART_SELFTEST_LOG_PAGE 7 454 455 /* 456 * SATA NCQ error recovery page (0x10) 457 */ 458 struct sata_ncq_error_recovery_page { 459 uint8_t ncq_tag; 460 uint8_t reserved1; 461 uint8_t ncq_status; 462 uint8_t ncq_error; 463 uint8_t ncq_sector_number; 464 uint8_t ncq_cyl_low; 465 uint8_t ncq_cyl_high; 466 uint8_t ncq_dev_head; 467 uint8_t ncq_sector_number_ext; 468 uint8_t ncq_cyl_low_ext; 469 uint8_t ncq_cyl_high_ext; 470 uint8_t reserved2; 471 uint8_t ncq_sector_count; 472 uint8_t ncq_sector_count_ext; 473 uint8_t reserved3[242]; 474 uint8_t ncq_vendor_unique[255]; 475 uint8_t ncq_checksum; 476 }; 477 478 /* 479 * SMART data structures 480 */ 481 struct smart_data { 482 uint8_t smart_vendor_specific[362]; 483 uint8_t smart_offline_data_collection_status; 484 uint8_t smart_selftest_exec_status; 485 uint8_t smart_secs_to_complete_offline_data[2]; 486 uint8_t smart_vendor_specific2; 487 uint8_t smart_offline_data_collection_capability; 488 uint8_t smart_capability[2]; 489 uint8_t smart_error_logging_capability; 490 uint8_t smart_vendor_specific3; 491 uint8_t smart_short_selftest_polling_time; 492 uint8_t smart_extended_selftest_polling_time; 493 uint8_t smart_conveyance_selftest_polling_time; 494 uint8_t smart_reserved[11]; 495 uint8_t smart_vendor_specific4[125]; 496 uint8_t smart_checksum; 497 }; 498 499 struct smart_selftest_log_entry { 500 uint8_t smart_selftest_log_lba_low; 501 uint8_t smart_selftest_log_status; 502 uint8_t smart_selftest_log_timestamp[2]; 503 uint8_t smart_selftest_log_checkpoint; 504 uint8_t smart_selftest_log_failing_lba[4]; /* from LSB to MSB */ 505 uint8_t smart_selftest_log_vendor_specific[15]; 506 }; 507 508 #define NUM_SMART_SELFTEST_LOG_ENTRIES 21 509 struct smart_selftest_log { 510 uint8_t smart_selftest_log_revision[2]; 511 struct smart_selftest_log_entry 512 smart_selftest_log_entries[NUM_SMART_SELFTEST_LOG_ENTRIES]; 513 uint8_t smart_selftest_log_vendor_specific[2]; 514 uint8_t smart_selftest_log_index; 515 uint8_t smart_selftest_log_reserved[2]; 516 uint8_t smart_selftest_log_checksum; 517 }; 518 519 struct smart_ext_selftest_log_entry { 520 uint8_t smart_ext_selftest_log_lba_low; 521 uint8_t smart_ext_selftest_log_status; 522 uint8_t smart_ext_selftest_log_timestamp[2]; 523 uint8_t smart_ext_selftest_log_checkpoint; 524 uint8_t smart_ext_selftest_log_failing_lba[6]; 525 uint8_t smart_ext_selftest_log_vendor_specific[15]; 526 }; 527 528 struct smart_ext_selftest_log { 529 uint8_t smart_ext_selftest_log_rev; 530 uint8_t smart_ext_selftest_log_reserved; 531 uint8_t smart_ext_selftest_log_index[2]; 532 struct smart_ext_selftest_log_entry smart_ext_selftest_log_entries[19]; 533 uint8_t smart_ext_selftest_log_vendor_specific[2]; 534 uint8_t smart_ext_selftest_log_reserved2[11]; 535 uint8_t smart_ext_selftest_log_checksum; 536 }; 537 538 struct read_log_ext_directory { 539 uint8_t read_log_ext_vers[2]; /* general purpose log version */ 540 uint8_t read_log_ext_nblks[255][2]; /* # of blks @ log addr index+1 */ 541 }; 542 543 /* 544 * SMART specific data 545 * These eventually need to go to a generic scsi hearder file 546 * for now they will reside here 547 */ 548 #define PC_CUMULATIVE_VALUES 0x01 549 #define PAGE_CODE_GET_SUPPORTED_LOG_PAGES 0x00 550 #define PAGE_CODE_SELF_TEST_RESULTS 0x10 551 #define PAGE_CODE_INFORMATION_EXCEPTIONS 0x2f 552 #define PAGE_CODE_SMART_READ_DATA 0x30 553 554 555 struct log_parameter { 556 uint8_t param_code[2]; /* parameter dependant */ 557 uint8_t param_ctrl_flags; /* see defines below */ 558 uint8_t param_len; /* # of bytes following */ 559 uint8_t param_values[1]; /* # of bytes defined by param_len */ 560 }; 561 562 /* param_ctrl_flag fields */ 563 #define LOG_CTRL_LP 0x01 /* list parameter */ 564 #define LOG_CTRL_LBIN 0x02 /* list is binary */ 565 #define LOG_CTRL_TMC 0x0c /* threshold met criteria */ 566 #define LOG_CTRL_ETC 0x10 /* enable threshold comparison */ 567 #define LOG_CTRL_TSD 0x20 /* target save disable */ 568 #define LOG_CTRL_DS 0x40 /* disable save */ 569 #define LOG_CTRL_DU 0x80 /* disable update */ 570 571 #define SMART_MAGIC_VAL_1 0x4f 572 #define SMART_MAGIC_VAL_2 0xc2 573 #define SMART_MAGIC_VAL_3 0xf4 574 #define SMART_MAGIC_VAL_4 0x2c 575 576 #define SCT_STATUS_LOG_PAGE 0xe0 577 578 /* 579 * Acoustic management 580 */ 581 582 struct mode_acoustic_management { 583 struct mode_page mode_page; /* common mode page header */ 584 uchar_t acoustic_manag_enable; /* Set to 1 enable, Set 0 disable */ 585 uchar_t acoustic_manag_level; /* Acoustic management level */ 586 uchar_t vendor_recommended_value; /* Vendor recommended value */ 587 }; 588 589 #define PAGELENGTH_DAD_MODE_ACOUSTIC_MANAGEMENT 3 /* Acoustic manag pg len */ 590 #define P_CNTRL_CURRENT 0 591 #define P_CNTRL_CHANGEABLE 1 592 #define P_CNTRL_DEFAULT 2 593 #define P_CNTRL_SAVED 3 594 595 #define ACOUSTIC_DISABLED 0 596 #define ACOUSTIC_ENABLED 1 597 598 #define MODEPAGE_ACOUSTIC_MANAG 0x30 599 600 #ifdef __cplusplus 601 } 602 #endif 603 604 #endif /* _SATA_DEFS_H */ 605