1*7c478bd9Sstevel@tonic-gate /* 2*7c478bd9Sstevel@tonic-gate * CDDL HEADER START 3*7c478bd9Sstevel@tonic-gate * 4*7c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*7c478bd9Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*7c478bd9Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*7c478bd9Sstevel@tonic-gate * with the License. 8*7c478bd9Sstevel@tonic-gate * 9*7c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*7c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*7c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 12*7c478bd9Sstevel@tonic-gate * and limitations under the License. 13*7c478bd9Sstevel@tonic-gate * 14*7c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*7c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*7c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*7c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*7c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*7c478bd9Sstevel@tonic-gate * 20*7c478bd9Sstevel@tonic-gate * CDDL HEADER END 21*7c478bd9Sstevel@tonic-gate */ 22*7c478bd9Sstevel@tonic-gate /* 23*7c478bd9Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*7c478bd9Sstevel@tonic-gate * Use is subject to license terms. 25*7c478bd9Sstevel@tonic-gate */ 26*7c478bd9Sstevel@tonic-gate 27*7c478bd9Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 28*7c478bd9Sstevel@tonic-gate 29*7c478bd9Sstevel@tonic-gate #include <sys/types.h> 30*7c478bd9Sstevel@tonic-gate #include <sys/param.h> 31*7c478bd9Sstevel@tonic-gate #include <sys/var.h> 32*7c478bd9Sstevel@tonic-gate #include <sys/thread.h> 33*7c478bd9Sstevel@tonic-gate #include <sys/cpuvar.h> 34*7c478bd9Sstevel@tonic-gate #include <sys/kstat.h> 35*7c478bd9Sstevel@tonic-gate #include <sys/uadmin.h> 36*7c478bd9Sstevel@tonic-gate #include <sys/systm.h> 37*7c478bd9Sstevel@tonic-gate #include <sys/errno.h> 38*7c478bd9Sstevel@tonic-gate #include <sys/cmn_err.h> 39*7c478bd9Sstevel@tonic-gate #include <sys/procset.h> 40*7c478bd9Sstevel@tonic-gate #include <sys/processor.h> 41*7c478bd9Sstevel@tonic-gate #include <sys/debug.h> 42*7c478bd9Sstevel@tonic-gate #include <sys/cyclic.h> 43*7c478bd9Sstevel@tonic-gate #include <sys/pool_pset.h> 44*7c478bd9Sstevel@tonic-gate 45*7c478bd9Sstevel@tonic-gate /* 46*7c478bd9Sstevel@tonic-gate * cpu_intr_on - determine whether the CPU is participating 47*7c478bd9Sstevel@tonic-gate * in I/O interrupts. 48*7c478bd9Sstevel@tonic-gate */ 49*7c478bd9Sstevel@tonic-gate int cpu_intr_on(cpu_t * cp)50*7c478bd9Sstevel@tonic-gatecpu_intr_on(cpu_t *cp) 51*7c478bd9Sstevel@tonic-gate { 52*7c478bd9Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 53*7c478bd9Sstevel@tonic-gate return ((cp->cpu_flags & CPU_ENABLE) != 0); 54*7c478bd9Sstevel@tonic-gate } 55*7c478bd9Sstevel@tonic-gate 56*7c478bd9Sstevel@tonic-gate /* 57*7c478bd9Sstevel@tonic-gate * Return the next on-line CPU handling interrupts. 58*7c478bd9Sstevel@tonic-gate */ 59*7c478bd9Sstevel@tonic-gate cpu_t * cpu_intr_next(cpu_t * cp)60*7c478bd9Sstevel@tonic-gatecpu_intr_next(cpu_t *cp) 61*7c478bd9Sstevel@tonic-gate { 62*7c478bd9Sstevel@tonic-gate cpu_t *c; 63*7c478bd9Sstevel@tonic-gate 64*7c478bd9Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 65*7c478bd9Sstevel@tonic-gate 66*7c478bd9Sstevel@tonic-gate c = cp->cpu_next_onln; 67*7c478bd9Sstevel@tonic-gate while (c != cp) { 68*7c478bd9Sstevel@tonic-gate if (cpu_intr_on(c)) { 69*7c478bd9Sstevel@tonic-gate return (c); 70*7c478bd9Sstevel@tonic-gate } 71*7c478bd9Sstevel@tonic-gate c = c->cpu_next_onln; 72*7c478bd9Sstevel@tonic-gate } 73*7c478bd9Sstevel@tonic-gate return (NULL); 74*7c478bd9Sstevel@tonic-gate } 75*7c478bd9Sstevel@tonic-gate 76*7c478bd9Sstevel@tonic-gate /* 77*7c478bd9Sstevel@tonic-gate * cpu_intr_count - count how many CPUs are handling I/O interrupts. 78*7c478bd9Sstevel@tonic-gate */ 79*7c478bd9Sstevel@tonic-gate int cpu_intr_count(cpu_t * cp)80*7c478bd9Sstevel@tonic-gatecpu_intr_count(cpu_t *cp) 81*7c478bd9Sstevel@tonic-gate { 82*7c478bd9Sstevel@tonic-gate cpu_t *c; 83*7c478bd9Sstevel@tonic-gate int count = 0; 84*7c478bd9Sstevel@tonic-gate 85*7c478bd9Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 86*7c478bd9Sstevel@tonic-gate c = cp; 87*7c478bd9Sstevel@tonic-gate do { 88*7c478bd9Sstevel@tonic-gate if (cpu_intr_on(c)) { 89*7c478bd9Sstevel@tonic-gate ++count; 90*7c478bd9Sstevel@tonic-gate } 91*7c478bd9Sstevel@tonic-gate } while ((c = c->cpu_next) != cp); 92*7c478bd9Sstevel@tonic-gate return (count); 93*7c478bd9Sstevel@tonic-gate } 94*7c478bd9Sstevel@tonic-gate 95*7c478bd9Sstevel@tonic-gate /* 96*7c478bd9Sstevel@tonic-gate * Enable I/O interrupts on this CPU, if they are disabled. 97*7c478bd9Sstevel@tonic-gate */ 98*7c478bd9Sstevel@tonic-gate void cpu_intr_enable(cpu_t * cp)99*7c478bd9Sstevel@tonic-gatecpu_intr_enable(cpu_t *cp) 100*7c478bd9Sstevel@tonic-gate { 101*7c478bd9Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 102*7c478bd9Sstevel@tonic-gate if (!cpu_intr_on(cp)) { 103*7c478bd9Sstevel@tonic-gate cpu_enable_intr(cp); 104*7c478bd9Sstevel@tonic-gate cpu_set_state(cp); 105*7c478bd9Sstevel@tonic-gate } 106*7c478bd9Sstevel@tonic-gate } 107*7c478bd9Sstevel@tonic-gate 108*7c478bd9Sstevel@tonic-gate /* 109*7c478bd9Sstevel@tonic-gate * cpu_intr_disable - redirect I/O interrupts targetted at this CPU. 110*7c478bd9Sstevel@tonic-gate * 111*7c478bd9Sstevel@tonic-gate * semantics: We check the count of CPUs that are accepting 112*7c478bd9Sstevel@tonic-gate * interrupts, because it's stupid to take the last CPU out 113*7c478bd9Sstevel@tonic-gate * of I/O interrupt participation. This also permits the 114*7c478bd9Sstevel@tonic-gate * p_online syscall to fail gracefully in uniprocessor configurations 115*7c478bd9Sstevel@tonic-gate * without having to perform any special platform-specific operations. 116*7c478bd9Sstevel@tonic-gate */ 117*7c478bd9Sstevel@tonic-gate int cpu_intr_disable(cpu_t * cp)118*7c478bd9Sstevel@tonic-gatecpu_intr_disable(cpu_t *cp) 119*7c478bd9Sstevel@tonic-gate { 120*7c478bd9Sstevel@tonic-gate int e = EBUSY; 121*7c478bd9Sstevel@tonic-gate 122*7c478bd9Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 123*7c478bd9Sstevel@tonic-gate if ((cpu_intr_count(cp) > 1) && (cpu_intr_next(cp) != NULL)) { 124*7c478bd9Sstevel@tonic-gate if (cpu_intr_on(cp)) { 125*7c478bd9Sstevel@tonic-gate /* 126*7c478bd9Sstevel@tonic-gate * Juggle away cyclics, but don't fail if we don't 127*7c478bd9Sstevel@tonic-gate * manage to juggle all of them away; we want to allow 128*7c478bd9Sstevel@tonic-gate * CPU-bound cyclics to continue to fire on the 129*7c478bd9Sstevel@tonic-gate * sheltered CPU. 130*7c478bd9Sstevel@tonic-gate */ 131*7c478bd9Sstevel@tonic-gate (void) cyclic_juggle(cp); 132*7c478bd9Sstevel@tonic-gate e = cpu_disable_intr(cp); 133*7c478bd9Sstevel@tonic-gate } 134*7c478bd9Sstevel@tonic-gate } 135*7c478bd9Sstevel@tonic-gate if (e == 0) 136*7c478bd9Sstevel@tonic-gate cpu_set_state(cp); 137*7c478bd9Sstevel@tonic-gate return (e); 138*7c478bd9Sstevel@tonic-gate } 139